DE112014002781B9 - Verfahren zur Kontrolle der Sauerstoffpräzipitation in stark dotierten Siliciumwafern, geschnitten aus nach dem Czochralski-Verfahren gezüchteten Ingots, und Silicumwafer - Google Patents

Verfahren zur Kontrolle der Sauerstoffpräzipitation in stark dotierten Siliciumwafern, geschnitten aus nach dem Czochralski-Verfahren gezüchteten Ingots, und Silicumwafer Download PDF

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DE112014002781B9
DE112014002781B9 DE112014002781.2T DE112014002781T DE112014002781B9 DE 112014002781 B9 DE112014002781 B9 DE 112014002781B9 DE 112014002781 T DE112014002781 T DE 112014002781T DE 112014002781 B9 DE112014002781 B9 DE 112014002781B9
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single crystal
concentration
silicon single
type silicon
precipitates
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DE112014002781B4 (de
DE112014002781T5 (de
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Robert J. Falster
Vladimir V. Voronkov
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GlobalWafers Co Ltd
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GlobalWafers Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/60—Impurity distributions or concentrations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3822—Controlling the interface between substrate and epitaxial layer, e.g. by ion implantation followed by annealing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/12—Diffusion of dopants within, into or out of semiconductor bodies or layers between a solid phase and a gaseous phase
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
    • H10P32/171—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P36/00—Gettering within semiconductor bodies
    • H10P36/20—Intrinsic gettering, i.e. thermally inducing defects by using oxygen present in the silicon body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P54/00—Cutting or separating of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering

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DE112014002781.2T 2013-06-11 2014-05-23 Verfahren zur Kontrolle der Sauerstoffpräzipitation in stark dotierten Siliciumwafern, geschnitten aus nach dem Czochralski-Verfahren gezüchteten Ingots, und Silicumwafer Active DE112014002781B9 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/914,925 US9634098B2 (en) 2013-06-11 2013-06-11 Oxygen precipitation in heavily doped silicon wafers sliced from ingots grown by the Czochralski method
US13/914,925 2013-06-11
PCT/US2014/039363 WO2014200686A1 (en) 2013-06-11 2014-05-23 Oxygen precipitation in heavily doped silicon wafers sliced from ingots grown by the czochralski method

Publications (3)

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DE112014002781T5 DE112014002781T5 (de) 2016-03-10
DE112014002781B4 DE112014002781B4 (de) 2020-06-18
DE112014002781B9 true DE112014002781B9 (de) 2021-07-29

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DE112014002781.2T Active DE112014002781B9 (de) 2013-06-11 2014-05-23 Verfahren zur Kontrolle der Sauerstoffpräzipitation in stark dotierten Siliciumwafern, geschnitten aus nach dem Czochralski-Verfahren gezüchteten Ingots, und Silicumwafer
DE112014007334.2T Active DE112014007334B3 (de) 2013-06-11 2014-05-23 Sauerstoffpräzipitation in stark dotierten Siliciumwafern, geschnitten aus nach dem Czochralski-Verfahren gezüchteten Ingots

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US (1) US9634098B2 (https=)
JP (1) JP6289621B2 (https=)
KR (3) KR102071304B1 (https=)
DE (2) DE112014002781B9 (https=)
WO (1) WO2014200686A1 (https=)

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US9945048B2 (en) * 2012-06-15 2018-04-17 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structure and method
US20150243494A1 (en) * 2014-02-25 2015-08-27 Texas Instruments Incorporated Mechanically robust silicon substrate having group iiia-n epitaxial layer thereon
KR101680213B1 (ko) * 2015-04-06 2016-11-28 주식회사 엘지실트론 실리콘 단결정 잉곳의 성장 방법
KR101759876B1 (ko) 2015-07-01 2017-07-31 주식회사 엘지실트론 웨이퍼 및 웨이퍼 결함 분석 방법
JP6610056B2 (ja) * 2015-07-28 2019-11-27 株式会社Ｓｕｍｃｏ エピタキシャルシリコンウェーハの製造方法
KR101674819B1 (ko) * 2015-08-12 2016-11-09 주식회사 엘지실트론 단결정 성장 방법
JP6447439B2 (ja) * 2015-09-28 2019-01-09 信越半導体株式会社 貼り合わせｓｏｉウェーハの製造方法
US10573517B2 (en) 2015-10-01 2020-02-25 Globalwafers Co., Ltd. Epitaxial growth of defect-free, wafer-scale single-layer graphene on thin films of cobalt
JP6579046B2 (ja) * 2016-06-17 2019-09-25 株式会社Sumco シリコン単結晶の製造方法
JP7110204B2 (ja) * 2016-12-28 2022-08-01 サンエディソン・セミコンダクター・リミテッド イントリンシックゲッタリングおよびゲート酸化物完全性歩留まりを有するシリコンウエハを処理する方法
JP7306536B1 (ja) 2022-06-14 2023-07-11 信越半導体株式会社 エピタキシャルウェーハの製造方法
CN118507557A (zh) * 2023-09-27 2024-08-16 隆基绿能科技股份有限公司 一种混合掺杂的硅片
DE102024122739A1 (de) * 2024-08-08 2026-02-12 Christoph Bergmann Verfahren zur Herstellung eines supraleitenden Werkstücks oder zur Veränderung der supraleitenden Eigenschaften eines Werkstücks

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Also Published As

Publication number Publication date
KR102071304B1 (ko) 2020-01-31
JP6289621B2 (ja) 2018-03-07
DE112014002781B4 (de) 2020-06-18
WO2014200686A1 (en) 2014-12-18
US20140361408A1 (en) 2014-12-11
DE112014007334B3 (de) 2023-08-24
KR20160019495A (ko) 2016-02-19
KR102172905B1 (ko) 2020-11-03
US9634098B2 (en) 2017-04-25
KR20200044152A (ko) 2020-04-28
JP2016526783A (ja) 2016-09-05
KR20200011563A (ko) 2020-02-03
KR102172904B1 (ko) 2020-11-03
DE112014002781T5 (de) 2016-03-10

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