DE1115486B - Verzoegerungsleitungsrechner - Google Patents

Verzoegerungsleitungsrechner

Info

Publication number
DE1115486B
DE1115486B DEI17052A DEI0017052A DE1115486B DE 1115486 B DE1115486 B DE 1115486B DE I17052 A DEI17052 A DE I17052A DE I0017052 A DEI0017052 A DE I0017052A DE 1115486 B DE1115486 B DE 1115486B
Authority
DE
Germany
Prior art keywords
line
gate
pulse
delay
digit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DEI17052A
Other languages
German (de)
English (en)
Inventor
John Howard Galichotte
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE1115486B publication Critical patent/DE1115486B/de
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491—Computations with decimal numbers radix 12 or 20.
    • G06F7/4912—Adding; Subtracting
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/491—Indexing scheme relating to groups G06F7/491 - G06F7/4917
    • G06F2207/49195—Using pure decimal representation, e.g. 10-valued voltage signal, 1-out-of-10 code
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/492—Indexing scheme relating to groups G06F7/492 - G06F7/496
    • G06F2207/4924—Digit-parallel adding or subtracting

Landscapes

  • Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Manipulation Of Pulses (AREA)
DEI17052A 1958-10-03 1959-10-01 Verzoegerungsleitungsrechner Pending DE1115486B (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US765253A US2920823A (en) 1958-10-03 1958-10-03 Addition and subtraction circuit utilizing electrical delay lines having a short-circuit termination

Publications (1)

Publication Number Publication Date
DE1115486B true DE1115486B (de) 1961-10-19

Family

ID=25073046

Family Applications (1)

Application Number Title Priority Date Filing Date
DEI17052A Pending DE1115486B (de) 1958-10-03 1959-10-01 Verzoegerungsleitungsrechner

Country Status (5)

Country Link
US (1) US2920823A (US07714131-20100511-C00001.png)
DE (1) DE1115486B (US07714131-20100511-C00001.png)
FR (1) FR1246798A (US07714131-20100511-C00001.png)
GB (1) GB869950A (US07714131-20100511-C00001.png)
NL (2) NL243275A (US07714131-20100511-C00001.png)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3215982A (en) * 1959-06-08 1965-11-02 Ibm Core matrix control circuit for selection of cores by true and complement signals

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB741418A (en) * 1951-03-17 1955-12-07 Electronique & Automatisme Sa Improvements in or relating to electric adding and subtracting devices

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL187428B (nl) * 1953-05-13 Cables De Lyon Geoffroy Delore Inrichting voor het vervaardigen van een beschermingsmantel van een optische vezel.

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB741418A (en) * 1951-03-17 1955-12-07 Electronique & Automatisme Sa Improvements in or relating to electric adding and subtracting devices

Also Published As

Publication number Publication date
NL135486C (US07714131-20100511-C00001.png)
FR1246798A (fr) 1960-11-25
US2920823A (en) 1960-01-12
NL243275A (US07714131-20100511-C00001.png)
GB869950A (en) 1961-06-07

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