FR1246798A - Circuits d'addition et de soustraction - Google Patents

Circuits d'addition et de soustraction

Info

Publication number
FR1246798A
FR1246798A FR806584A FR806584A FR1246798A FR 1246798 A FR1246798 A FR 1246798A FR 806584 A FR806584 A FR 806584A FR 806584 A FR806584 A FR 806584A FR 1246798 A FR1246798 A FR 1246798A
Authority
FR
France
Prior art keywords
addition
subtraction circuits
subtraction
circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR806584A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of FR1246798A publication Critical patent/FR1246798A/fr
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491—Computations with decimal numbers radix 12 or 20.
    • G06F7/4912—Adding; Subtracting
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/491—Indexing scheme relating to groups G06F7/491 - G06F7/4917
    • G06F2207/49195—Using pure decimal representation, e.g. 10-valued voltage signal, 1-out-of-10 code
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/492—Indexing scheme relating to groups G06F7/492 - G06F7/496
    • G06F2207/4924—Digit-parallel adding or subtracting

Landscapes

  • Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Manipulation Of Pulses (AREA)
FR806584A 1958-10-03 1959-10-02 Circuits d'addition et de soustraction Expired FR1246798A (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US765253A US2920823A (en) 1958-10-03 1958-10-03 Addition and subtraction circuit utilizing electrical delay lines having a short-circuit termination

Publications (1)

Publication Number Publication Date
FR1246798A true FR1246798A (fr) 1960-11-25

Family

ID=25073046

Family Applications (1)

Application Number Title Priority Date Filing Date
FR806584A Expired FR1246798A (fr) 1958-10-03 1959-10-02 Circuits d'addition et de soustraction

Country Status (5)

Country Link
US (1) US2920823A (fr)
DE (1) DE1115486B (fr)
FR (1) FR1246798A (fr)
GB (1) GB869950A (fr)
NL (2) NL135486C (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3215982A (en) * 1959-06-08 1965-11-02 Ibm Core matrix control circuit for selection of cores by true and complement signals

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1034099A (fr) * 1951-03-17 1953-07-17 Electronique & Automatisme Sa Perfectionnements apportés aux circuits calculateurs
NL187428B (nl) * 1953-05-13 Cables De Lyon Geoffroy Delore Inrichting voor het vervaardigen van een beschermingsmantel van een optische vezel.

Also Published As

Publication number Publication date
US2920823A (en) 1960-01-12
GB869950A (en) 1961-06-07
DE1115486B (de) 1961-10-19
NL243275A (fr)
NL135486C (fr)

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