DE1114940B - Legierform zum Herstellen von Halbleiteranordnungen - Google Patents

Legierform zum Herstellen von Halbleiteranordnungen

Info

Publication number
DE1114940B
DE1114940B DEN18803A DEN0018803A DE1114940B DE 1114940 B DE1114940 B DE 1114940B DE N18803 A DEN18803 A DE N18803A DE N0018803 A DEN0018803 A DE N0018803A DE 1114940 B DE1114940 B DE 1114940B
Authority
DE
Germany
Prior art keywords
alloy
layer
molybdenum
alloy mold
mold according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DEN18803A
Other languages
German (de)
English (en)
Inventor
Dirk De Nobel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of DE1114940B publication Critical patent/DE1114940B/de
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/24—Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/148—Silicon carbide

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical Vapour Deposition (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Electrodes Of Semiconductors (AREA)
DEN18803A 1959-08-25 1960-08-22 Legierform zum Herstellen von Halbleiteranordnungen Pending DE1114940B (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL242671 1959-08-25

Publications (1)

Publication Number Publication Date
DE1114940B true DE1114940B (de) 1961-10-12

Family

ID=19751890

Family Applications (1)

Application Number Title Priority Date Filing Date
DEN18803A Pending DE1114940B (de) 1959-08-25 1960-08-22 Legierform zum Herstellen von Halbleiteranordnungen

Country Status (5)

Country Link
US (1) US3080841A (instruction)
CH (1) CH399596A (instruction)
DE (1) DE1114940B (instruction)
GB (1) GB887037A (instruction)
NL (2) NL242671A (instruction)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1282794B (de) * 1965-04-01 1975-10-09 Siemens AG, Berlin und München, 8000 München Verfahren zum herstellen einer legierungsmaske fuer die gleichzeitige fertigung mehrerer halbleiteranordnungen

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1051451A (instruction) * 1963-02-08
US3571919A (en) * 1968-09-25 1971-03-23 Texas Instruments Inc Semiconductor device fabrication
US3719981A (en) * 1971-11-24 1973-03-13 Rca Corp Method of joining solder balls to solder bumps
US3894329A (en) * 1972-07-28 1975-07-15 Sperry Rand Corp Method of making high density electronic interconnections in a termination device
JPS5277590A (en) * 1975-12-24 1977-06-30 Toshiba Corp Semiconductor producing device
DE2656019C3 (de) * 1976-12-10 1980-07-17 Brown, Boveri & Cie Ag, 6800 Mannheim Vorrichtung zum Ausrichten und Anlöten von Podesten bzw. Ronden bezüglich der bzw. an den lötfähigen ohmschen Kontakten) von Halbleiterbauelementen
US6864570B2 (en) * 1993-12-17 2005-03-08 The Regents Of The University Of California Method and apparatus for fabricating self-assembling microstructures

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2756483A (en) * 1953-05-11 1956-07-31 Sylvania Electric Prod Junction forming crucible
DE1027322B (de) 1956-04-14 1958-04-03 Philips Patentverwaltung Verfahren zur Herstellung von Halbleiteranordnungen mittels Legierformen

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE525280A (instruction) * 1952-12-31 1900-01-01
US2879188A (en) * 1956-03-05 1959-03-24 Westinghouse Electric Corp Processes for making transistors
US2879189A (en) * 1956-11-21 1959-03-24 Shockley William Method for growing junction semi-conductive devices
US2964431A (en) * 1959-07-28 1960-12-13 Rca Corp Jig alloying of semiconductor devices

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2756483A (en) * 1953-05-11 1956-07-31 Sylvania Electric Prod Junction forming crucible
DE1027322B (de) 1956-04-14 1958-04-03 Philips Patentverwaltung Verfahren zur Herstellung von Halbleiteranordnungen mittels Legierformen

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1282794B (de) * 1965-04-01 1975-10-09 Siemens AG, Berlin und München, 8000 München Verfahren zum herstellen einer legierungsmaske fuer die gleichzeitige fertigung mehrerer halbleiteranordnungen

Also Published As

Publication number Publication date
CH399596A (de) 1965-09-30
US3080841A (en) 1963-03-12
NL126558C (instruction)
NL242671A (instruction)
GB887037A (en) 1962-01-10

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