DE102018133089A1 - Halbleitermodul mit einem Halbleiter und einem den Halbleiter teilweise einhausenden Gehäuse - Google Patents

Halbleitermodul mit einem Halbleiter und einem den Halbleiter teilweise einhausenden Gehäuse Download PDF

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Publication number
DE102018133089A1
DE102018133089A1 DE102018133089.8A DE102018133089A DE102018133089A1 DE 102018133089 A1 DE102018133089 A1 DE 102018133089A1 DE 102018133089 A DE102018133089 A DE 102018133089A DE 102018133089 A1 DE102018133089 A1 DE 102018133089A1
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Germany
Prior art keywords
semiconductor
housing
semiconductor module
recess
module according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE102018133089.8A
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German (de)
English (en)
Inventor
André Bastos Abibe
Martin Becker
Ronald Eisele
Frank Osterwald
Jacek Rudzki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Danfoss Silicon Power GmbH
Original Assignee
Danfoss Silicon Power GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Danfoss Silicon Power GmbH filed Critical Danfoss Silicon Power GmbH
Priority to DE102018133089.8A priority Critical patent/DE102018133089A1/de
Priority to PCT/EP2019/085883 priority patent/WO2020127442A2/fr
Publication of DE102018133089A1 publication Critical patent/DE102018133089A1/de
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
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    • H01L24/92—Specific sequence of method steps
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    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
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    • H01L2224/37001—Core members of the connector
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    • H01L2224/37138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/37147—Copper [Cu] as principal constituent
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    • H01L2224/4805—Shape
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    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1032—III-V
    • H01L2924/1033—Gallium nitride [GaN]

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
DE102018133089.8A 2018-12-20 2018-12-20 Halbleitermodul mit einem Halbleiter und einem den Halbleiter teilweise einhausenden Gehäuse Ceased DE102018133089A1 (de)

Priority Applications (2)

Application Number Priority Date Filing Date Title
DE102018133089.8A DE102018133089A1 (de) 2018-12-20 2018-12-20 Halbleitermodul mit einem Halbleiter und einem den Halbleiter teilweise einhausenden Gehäuse
PCT/EP2019/085883 WO2020127442A2 (fr) 2018-12-20 2019-12-18 Module semiconducteur comportant un semiconducteur et un boîtier renfermant partiellement le semiconducteur

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102018133089.8A DE102018133089A1 (de) 2018-12-20 2018-12-20 Halbleitermodul mit einem Halbleiter und einem den Halbleiter teilweise einhausenden Gehäuse

Publications (1)

Publication Number Publication Date
DE102018133089A1 true DE102018133089A1 (de) 2020-06-25

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DE102018133089.8A Ceased DE102018133089A1 (de) 2018-12-20 2018-12-20 Halbleitermodul mit einem Halbleiter und einem den Halbleiter teilweise einhausenden Gehäuse

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DE (1) DE102018133089A1 (fr)
WO (1) WO2020127442A2 (fr)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11842953B2 (en) 2021-04-28 2023-12-12 Infineon Technologies Ag Semiconductor package with wire bond joints and related methods of manufacturing

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070194441A1 (en) * 2004-09-23 2007-08-23 International Rectifier Corporation Redistributed solder pads using etched lead frame
US20150340297A1 (en) * 2014-05-20 2015-11-26 Fuji Electric Co., Ltd. Power semiconductor module

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE59100737D1 (de) * 1991-05-15 1994-01-27 Abb Ixys Semiconductor Gmbh Leistungshalbleitermodul und Verfahren zur Herstellung eines solchen Moduls.
US7397137B2 (en) * 2002-07-15 2008-07-08 International Rectifier Corporation Direct FET device for high frequency application
US10559538B2 (en) * 2015-02-25 2020-02-11 Mitsubishi Electric Corporation Power module

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070194441A1 (en) * 2004-09-23 2007-08-23 International Rectifier Corporation Redistributed solder pads using etched lead frame
US20150340297A1 (en) * 2014-05-20 2015-11-26 Fuji Electric Co., Ltd. Power semiconductor module

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WO2020127442A2 (fr) 2020-06-25

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