DE102013215592A1 - Leistungselektronische Schaltung mit planarer elektrischer Kontaktierung - Google Patents
Leistungselektronische Schaltung mit planarer elektrischer Kontaktierung Download PDFInfo
- Publication number
- DE102013215592A1 DE102013215592A1 DE201310215592 DE102013215592A DE102013215592A1 DE 102013215592 A1 DE102013215592 A1 DE 102013215592A1 DE 201310215592 DE201310215592 DE 201310215592 DE 102013215592 A DE102013215592 A DE 102013215592A DE 102013215592 A1 DE102013215592 A1 DE 102013215592A1
- Authority
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- Germany
- Prior art keywords
- power electronic
- electronic circuit
- layer
- substrate
- buffer layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/24226—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73267—Layer and HDI connectors
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83399—Material
- H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/83438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/83447—Copper [Cu] as principal constituent
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92244—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/492—Bases or plates or solder therefor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L24/80 - H01L24/90
- H01L24/92—Specific sequence of method steps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Structure Of Printed Boards (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE201310215592 DE102013215592A1 (de) | 2013-08-07 | 2013-08-07 | Leistungselektronische Schaltung mit planarer elektrischer Kontaktierung |
PCT/EP2014/066417 WO2015018721A1 (fr) | 2013-08-07 | 2014-07-30 | Circuit électronique de puissance présentant un contact électrique planaire |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE201310215592 DE102013215592A1 (de) | 2013-08-07 | 2013-08-07 | Leistungselektronische Schaltung mit planarer elektrischer Kontaktierung |
Publications (1)
Publication Number | Publication Date |
---|---|
DE102013215592A1 true DE102013215592A1 (de) | 2015-02-12 |
Family
ID=51357905
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE201310215592 Withdrawn DE102013215592A1 (de) | 2013-08-07 | 2013-08-07 | Leistungselektronische Schaltung mit planarer elektrischer Kontaktierung |
Country Status (2)
Country | Link |
---|---|
DE (1) | DE102013215592A1 (fr) |
WO (1) | WO2015018721A1 (fr) |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6295205B1 (en) * | 1998-08-29 | 2001-09-25 | Asea Brown Boveri Ag | Explosion protection for semiconductor modules |
DE10055454A1 (de) * | 2000-11-09 | 2002-05-23 | Fujitsu Siemens Computers Gmbh | Kühlkörper |
WO2003030247A2 (fr) | 2001-09-28 | 2003-04-10 | Siemens Aktiengesellschaft | Procede d'etablissement de contact pour des surfaces de contact electriques situees sur un substrat et dispositif constitue d'un substrat pourvu de surfaces de contact electriques |
DE102007005233A1 (de) * | 2007-01-30 | 2008-08-07 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Leistungsmodul |
DE102007039905A1 (de) * | 2007-08-23 | 2008-08-28 | Siemens Ag | Verfahren zur Herstellung einer wärmeleitfähigen Materialschicht |
DE102007039904A1 (de) * | 2007-08-23 | 2008-08-28 | Siemens Ag | Verfahren zur Herstellung einer wärmeleitfähigen Materialschicht |
US20090250799A1 (en) * | 2006-09-14 | 2009-10-08 | Siemens Aktiengesellschaft | Power Semiconductor Module Comprising an Explosion Protection System |
DE102012201612B3 (de) * | 2012-02-03 | 2013-06-13 | Siemens Aktiengesellschaft | Kühlelement für Leistungshalbleiter-Bauelemente |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10342295B4 (de) * | 2003-09-12 | 2012-02-02 | Infineon Technologies Ag | Anordnung eines elektrischen Bauelements mit einer elektrischen Isolationsfolie auf einem Substrat und Verfahren zum Herstellen der Anordnung |
DE10355925B4 (de) * | 2003-11-29 | 2006-07-06 | Semikron Elektronik Gmbh & Co. Kg | Leistungshalbleitermodul und Verfahren seiner Herstellung |
WO2005096374A1 (fr) * | 2004-03-15 | 2005-10-13 | Siemens Aktiengesellschaft | Produit electrotechnique comprenant un element electrique et une masse de scellement pour l'isolation electrique de l'element, et procede de fabrication associe |
DE102004061936A1 (de) * | 2004-12-22 | 2006-07-06 | Siemens Ag | Anordnung eines Halbleitermoduls und einer elektrischen Verschienung |
DE102004063039B4 (de) * | 2004-12-28 | 2011-09-22 | Siemens Ag | Anordnung mit einem elektrischen Leistungshalbleiterbauelement und einer Zwei-Phasen-Kühlvorrichtung |
DE102005034873B4 (de) * | 2005-07-26 | 2013-03-07 | Siemens Aktiengesellschaft | Anordnung eines elektrischen Bauelements und eines auf dem Bauelement auflaminierten Folienverbunds und Verfahren zur Herstellung der Anordnung |
DE102007006706B4 (de) * | 2007-02-10 | 2011-05-26 | Semikron Elektronik Gmbh & Co. Kg | Schaltungsanordnung mit Verbindungseinrichtung sowie Herstellungsverfahren hierzu |
DE102010062547B4 (de) * | 2010-12-07 | 2021-10-28 | Semikron Elektronik Gmbh & Co. Kg | Verfahren zur Herstellung einer Schaltungsanordnung |
DE102011083627A1 (de) * | 2011-09-28 | 2013-03-28 | Continental Automotive Gmbh | Verfahren zur Kontaktierung eines elektronischen Bauteils und Baugruppe mit einem elektronischen Bauteil auf einem Substrat |
-
2013
- 2013-08-07 DE DE201310215592 patent/DE102013215592A1/de not_active Withdrawn
-
2014
- 2014-07-30 WO PCT/EP2014/066417 patent/WO2015018721A1/fr active Application Filing
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6295205B1 (en) * | 1998-08-29 | 2001-09-25 | Asea Brown Boveri Ag | Explosion protection for semiconductor modules |
DE10055454A1 (de) * | 2000-11-09 | 2002-05-23 | Fujitsu Siemens Computers Gmbh | Kühlkörper |
WO2003030247A2 (fr) | 2001-09-28 | 2003-04-10 | Siemens Aktiengesellschaft | Procede d'etablissement de contact pour des surfaces de contact electriques situees sur un substrat et dispositif constitue d'un substrat pourvu de surfaces de contact electriques |
US20090250799A1 (en) * | 2006-09-14 | 2009-10-08 | Siemens Aktiengesellschaft | Power Semiconductor Module Comprising an Explosion Protection System |
DE102007005233A1 (de) * | 2007-01-30 | 2008-08-07 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Leistungsmodul |
DE102007039905A1 (de) * | 2007-08-23 | 2008-08-28 | Siemens Ag | Verfahren zur Herstellung einer wärmeleitfähigen Materialschicht |
DE102007039904A1 (de) * | 2007-08-23 | 2008-08-28 | Siemens Ag | Verfahren zur Herstellung einer wärmeleitfähigen Materialschicht |
DE102012201612B3 (de) * | 2012-02-03 | 2013-06-13 | Siemens Aktiengesellschaft | Kühlelement für Leistungshalbleiter-Bauelemente |
Also Published As
Publication number | Publication date |
---|---|
WO2015018721A1 (fr) | 2015-02-12 |
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R119 | Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee |