DE102008063427B4 - Verfahren zum selektiven Herstellen eines Transistors mit einem eingebetteten verformungsinduzierenden Material mit einer graduell geformten Gestaltung - Google Patents
Verfahren zum selektiven Herstellen eines Transistors mit einem eingebetteten verformungsinduzierenden Material mit einer graduell geformten Gestaltung Download PDFInfo
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- DE102008063427B4 DE102008063427B4 DE102008063427A DE102008063427A DE102008063427B4 DE 102008063427 B4 DE102008063427 B4 DE 102008063427B4 DE 102008063427 A DE102008063427 A DE 102008063427A DE 102008063427 A DE102008063427 A DE 102008063427A DE 102008063427 B4 DE102008063427 B4 DE 102008063427B4
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0128—Manufacturing their channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/64—Double-diffused metal-oxide semiconductor [DMOS] FETs
- H10D30/66—Vertical DMOS [VDMOS] FETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
- H10D30/797—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in source or drain regions, e.g. SiGe source or drain
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/01—Manufacture or treatment
- H10D62/021—Forming source or drain recesses by etching e.g. recessing by etching and then refilling
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/013—Manufacturing their source or drain regions, e.g. silicided source or drain regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0147—Manufacturing their gate sidewall spacers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0167—Manufacturing their channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0184—Manufacturing their gate sidewall spacers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Priority Applications (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE102008063427A DE102008063427B4 (de) | 2008-12-31 | 2008-12-31 | Verfahren zum selektiven Herstellen eines Transistors mit einem eingebetteten verformungsinduzierenden Material mit einer graduell geformten Gestaltung |
| US12/640,765 US8202777B2 (en) | 2008-12-31 | 2009-12-17 | Transistor with an embedded strain-inducing material having a gradually shaped configuration |
| CN200980157544.6A CN102362344B (zh) | 2008-12-31 | 2009-12-29 | 有具逐渐成形构造的嵌入应变引发材料的晶体管 |
| JP2011542724A JP5795260B2 (ja) | 2008-12-31 | 2009-12-29 | 段階的な形状の構造を有する埋め込み歪誘起材質を伴うトランジスタ |
| KR1020117017916A KR101537079B1 (ko) | 2008-12-31 | 2009-12-29 | 점진적으로 만들어진 형태의 구성을 가지는 매립 스트레인 유도 물질을 갖는 트랜지스터 |
| PCT/EP2009/009306 WO2010076017A1 (en) | 2008-12-31 | 2009-12-29 | A transistor with an embedded strain inducing material having a gradually shaped configuration |
| US13/470,441 US8466520B2 (en) | 2008-12-31 | 2012-05-14 | Transistor with an embedded strain-inducing material having a gradually shaped configuration |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE102008063427A DE102008063427B4 (de) | 2008-12-31 | 2008-12-31 | Verfahren zum selektiven Herstellen eines Transistors mit einem eingebetteten verformungsinduzierenden Material mit einer graduell geformten Gestaltung |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE102008063427A1 DE102008063427A1 (de) | 2010-07-08 |
| DE102008063427B4 true DE102008063427B4 (de) | 2013-02-28 |
Family
ID=42234622
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE102008063427A Active DE102008063427B4 (de) | 2008-12-31 | 2008-12-31 | Verfahren zum selektiven Herstellen eines Transistors mit einem eingebetteten verformungsinduzierenden Material mit einer graduell geformten Gestaltung |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US8202777B2 (https=) |
| JP (1) | JP5795260B2 (https=) |
| KR (1) | KR101537079B1 (https=) |
| CN (1) | CN102362344B (https=) |
| DE (1) | DE102008063427B4 (https=) |
| WO (1) | WO2010076017A1 (https=) |
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| DE102011004320B4 (de) * | 2011-02-17 | 2016-02-04 | Globalfoundries Dresden Module One Llc & Co. Kg | Verfahren zur Herstellung komplementärer Transistoren mit Metallgateelektrodenstrukturen mit großem ε und epitaktisch hergestellten Halbleitermaterialien in den Drain- und Sourcebereichen |
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2008
- 2008-12-31 DE DE102008063427A patent/DE102008063427B4/de active Active
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- 2009-12-29 KR KR1020117017916A patent/KR101537079B1/ko active Active
- 2009-12-29 WO PCT/EP2009/009306 patent/WO2010076017A1/en not_active Ceased
- 2009-12-29 CN CN200980157544.6A patent/CN102362344B/zh active Active
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Also Published As
| Publication number | Publication date |
|---|---|
| CN102362344B (zh) | 2014-03-19 |
| CN102362344A (zh) | 2012-02-22 |
| KR101537079B1 (ko) | 2015-07-16 |
| DE102008063427A1 (de) | 2010-07-08 |
| KR20120030033A (ko) | 2012-03-27 |
| US8466520B2 (en) | 2013-06-18 |
| US20100164020A1 (en) | 2010-07-01 |
| US20120223363A1 (en) | 2012-09-06 |
| JP5795260B2 (ja) | 2015-10-14 |
| US8202777B2 (en) | 2012-06-19 |
| WO2010076017A1 (en) | 2010-07-08 |
| JP2012514317A (ja) | 2012-06-21 |
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