DE102004042538B8 - Verfahren zum Herstellen eines Gehäuses für eine elektronische Komponente - Google Patents

Verfahren zum Herstellen eines Gehäuses für eine elektronische Komponente Download PDF

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Publication number
DE102004042538B8
DE102004042538B8 DE102004042538A DE102004042538A DE102004042538B8 DE 102004042538 B8 DE102004042538 B8 DE 102004042538B8 DE 102004042538 A DE102004042538 A DE 102004042538A DE 102004042538 A DE102004042538 A DE 102004042538A DE 102004042538 B8 DE102004042538 B8 DE 102004042538B8
Authority
DE
Germany
Prior art keywords
housing
producing
electronic component
electronic
component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE102004042538A
Other languages
English (en)
Other versions
DE102004042538B4 (de
DE102004042538A1 (de
Inventor
Tomohito Kariya Kunda
Tsukasa Kitakyushu Fukurai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yoshikawa Kogyo Co Ltd
Denso Corp
Original Assignee
Yoshikawa Kogyo Co Ltd
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yoshikawa Kogyo Co Ltd, Denso Corp filed Critical Yoshikawa Kogyo Co Ltd
Publication of DE102004042538A1 publication Critical patent/DE102004042538A1/de
Publication of DE102004042538B4 publication Critical patent/DE102004042538B4/de
Application granted granted Critical
Publication of DE102004042538B8 publication Critical patent/DE102004042538B8/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00261—Processes for packaging MEMS devices
    • B81C1/00269—Bonding of solid lids or wafers to the substrate
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01P—MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P1/00—Details of instruments
    • G01P1/02—Housings
    • G01P1/023—Housings for acceleration measuring devices
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01P—MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P15/00—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration
    • G01P15/02—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses
    • G01P15/08—Measuring acceleration; Measuring deceleration; Measuring shock, i.e. sudden change of acceleration by making use of inertia forces using solid seismic masses with conversion into electric or magnetic values
    • G01P15/0802—Details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48145—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Pressure Sensors (AREA)
DE102004042538A 2003-09-24 2004-09-02 Verfahren zum Herstellen eines Gehäuses für eine elektronische Komponente Expired - Fee Related DE102004042538B8 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2003-331718 2003-09-24
JP2003331718A JP4026573B2 (ja) 2003-09-24 2003-09-24 電子装置を収納するパッケージの製造方法

Publications (3)

Publication Number Publication Date
DE102004042538A1 DE102004042538A1 (de) 2005-05-19
DE102004042538B4 DE102004042538B4 (de) 2007-10-11
DE102004042538B8 true DE102004042538B8 (de) 2008-04-10

Family

ID=34308946

Family Applications (1)

Application Number Title Priority Date Filing Date
DE102004042538A Expired - Fee Related DE102004042538B8 (de) 2003-09-24 2004-09-02 Verfahren zum Herstellen eines Gehäuses für eine elektronische Komponente

Country Status (3)

Country Link
US (1) US7320940B2 (de)
JP (1) JP4026573B2 (de)
DE (1) DE102004042538B8 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4367165B2 (ja) * 2004-02-13 2009-11-18 株式会社デンソー 半導体力学量センサの検査方法
JP4618790B2 (ja) * 2005-04-07 2011-01-26 田中貴金属工業株式会社 ハーメチックシールカバー及びその製造方法
JP4740678B2 (ja) * 2005-07-27 2011-08-03 Ｏｋｉセミコンダクタ株式会社 半導体装置
US20080257045A1 (en) * 2007-04-18 2008-10-23 Denso Corporation Sensor device for detecting physical quantity
CN102139365A (zh) * 2010-12-30 2011-08-03 东莞市星河精密压铸模具有限公司 一种去除压铸件毛刺的加工工艺
JP5732286B2 (ja) * 2011-03-16 2015-06-10 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP6387818B2 (ja) 2014-12-11 2018-09-12 日立金属株式会社 気密封止用蓋材の製造方法
JP6417970B2 (ja) 2015-01-28 2018-11-07 ミツミ電機株式会社 モジュール及びその製造方法
US20170199217A1 (en) * 2016-01-13 2017-07-13 Seiko Epson Corporation Electronic device, method for manufacturing electronic device, and physical-quantity sensor
CN106744644A (zh) * 2016-10-11 2017-05-31 中国科学院地质与地球物理研究所 一种mems传感器低应力封装管壳及封装系统
JP7310598B2 (ja) * 2019-12-25 2023-07-19 株式会社デンソー 電子装置
JP2023050622A (ja) * 2021-09-30 2023-04-11 セイコーエプソン株式会社 慣性センサーモジュール
CN114164468A (zh) * 2021-11-13 2022-03-11 深圳市宏钢机械设备有限公司 一种改善金属表面粘接光器件强度的表面处理工艺

Citations (4)

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US4243729A (en) * 1978-07-31 1981-01-06 Semi-Alloys, Inc. Metallic hermetic sealing cover for a container
EP0951069A1 (de) * 1998-04-17 1999-10-20 Interuniversitair Microelektronica Centrum Vzw Herstellungsverfahren für eine Mikrostruktur mit Innenraum
EP0989605A2 (de) * 1998-09-24 2000-03-29 Sumitomo Special Metals Company Limited Verpackung für elektronische Komponente, Material für Verpackungsdeckel und Herstellungsverfahren für das Deckelmaterial
US20010055836A1 (en) * 2000-06-26 2001-12-27 Tomohito Kunda Semiconductor dynamic sensor and method of manufacturing the same

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JPS58197277A (ja) * 1982-05-08 1983-11-16 Mitsubishi Gas Chem Co Inc 金属の化学的溶解処理液
JPS60221585A (ja) * 1984-04-18 1985-11-06 Oki Electric Ind Co Ltd ニツケル酸化被膜除去方法
US4820659A (en) * 1986-07-16 1989-04-11 General Electric Company Method of making a semiconductor device assembly
EP0265578A1 (de) * 1986-10-30 1988-05-04 Jan-Olof Eriksson Zusammensetzung eines nicht abschleifenden Polier- und Reinigungsmittels und Verfahren zu ihrer Herstellung
JPH06209058A (ja) * 1993-01-12 1994-07-26 Mitsubishi Electric Corp 半導体装置及びその製造方法，並びにその実装方法
JP3299640B2 (ja) * 1994-10-05 2002-07-08 東芝テック株式会社 ネットワーク対応ファクシミリ装置
JPH08162583A (ja) 1994-11-30 1996-06-21 Toshiba Corp リードフレームの製造方法
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JPH1110540A (ja) * 1997-06-23 1999-01-19 Speedfam Co Ltd Ｃｍｐ装置のスラリリサイクルシステム及びその方法
US6110011A (en) * 1997-11-10 2000-08-29 Applied Materials, Inc. Integrated electrodeposition and chemical-mechanical polishing tool
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Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4243729A (en) * 1978-07-31 1981-01-06 Semi-Alloys, Inc. Metallic hermetic sealing cover for a container
EP0951069A1 (de) * 1998-04-17 1999-10-20 Interuniversitair Microelektronica Centrum Vzw Herstellungsverfahren für eine Mikrostruktur mit Innenraum
EP0989605A2 (de) * 1998-09-24 2000-03-29 Sumitomo Special Metals Company Limited Verpackung für elektronische Komponente, Material für Verpackungsdeckel und Herstellungsverfahren für das Deckelmaterial
US20010055836A1 (en) * 2000-06-26 2001-12-27 Tomohito Kunda Semiconductor dynamic sensor and method of manufacturing the same

Also Published As

Publication number Publication date
DE102004042538B4 (de) 2007-10-11
US20050062067A1 (en) 2005-03-24
US7320940B2 (en) 2008-01-22
JP2005101192A (ja) 2005-04-14
JP4026573B2 (ja) 2007-12-26
DE102004042538A1 (de) 2005-05-19

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8396 Reprint of erroneous front page
8396 Reprint of erroneous front page
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee