CN2911960Y - 芯片封装件 - Google Patents

芯片封装件 Download PDF

Info

Publication number
CN2911960Y
CN2911960Y CN 200620079175 CN200620079175U CN2911960Y CN 2911960 Y CN2911960 Y CN 2911960Y CN 200620079175 CN200620079175 CN 200620079175 CN 200620079175 U CN200620079175 U CN 200620079175U CN 2911960 Y CN2911960 Y CN 2911960Y
Authority
CN
China
Prior art keywords
chip
plastic
framework
utility
dao
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN 200620079175
Other languages
English (en)
Inventor
慕蔚
王永忠
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xi'an TianSheng Electronics Co., Ltd.
Original Assignee
Tianshui Huatian Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tianshui Huatian Technology Co Ltd filed Critical Tianshui Huatian Technology Co Ltd
Priority to CN 200620079175 priority Critical patent/CN2911960Y/zh
Application granted granted Critical
Publication of CN2911960Y publication Critical patent/CN2911960Y/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

本实用新型公开了一种芯片封装件，以解决现有芯片封装结构存在的散热能力差、压焊金线较长、生产成本较高的问题。本实用新型包括基岛、导电胶、芯片、框架内引脚、框架外引脚、金丝、塑封体，基岛通过导电胶与芯片相连，芯片上的焊盘通过金丝与框架内引脚相接；基岛和框架外引脚与塑封体下表面处于同一平面，芯片上表面、金丝、框架内引脚、框架外引脚上表面被塑封体包围成一整体。本实用新型利用基岛与框架外引脚外露，并且与塑封体下表面处于同一平面，可增强散热性，提高功率因子。本实用新型扩大应用范围，生产成本低。

Description

芯片封装件
技术领域
本实用新型涉及一种芯片封装结构。
背景技术
QFN(无引线四方扁平封装)封装是在90年代中期，随着通讯及便携式小型数码电子产品的产生(数码相机、手机、PC、MP3)而发展起来的、适用于高频、宽带、低噪声、高导热、小体积，高速度等电性要求的中小规模集成电路的封装。QFN和CPS有些相似，但元件底部没有焊球，与PCB的电气连接是通过在PCB焊盘上先印刷焊膏，再将器件自动贴片在PCB板的对应位置，然后经过回流焊形成的焊点来实现的。
通用QFN芯片封装结构包括基岛、导电胶、芯片、框架内引脚、框架外引脚、金丝、塑封体；基岛和框架内引脚都不打弯，并且外露处于同一平面；所以芯片上的焊盘与框架内引脚较远，因此金线也较长，生产成本较高，并且塑封时容易交丝和坍丝。
实用新型内容
本实用新型的目的是提供一种芯片封装件，以解决现有芯片封装结构存在的散热能力差、压焊金线较长、生产成本较高的问题。
本实用新型包括基岛、导电胶、芯片、框架内引脚、框架外引脚、金丝、塑封体，基岛通过导电胶与芯片相连，芯片上的焊盘通过金丝与框架内引脚相接；所述基岛和框架外引脚与塑封体下表面处于同一平面，芯片上表面、金丝、框架内引脚、框架外引脚上表面被塑封体包围成一整体。
本实用新型利用基岛与框架外引脚外露，并且与塑封体下表面处于同一平面，可增强散热性，提高功率因子。本实用新型扩大应用范围，生产成本低。
下面结合附图对本实用新型作进一步详细的说明。
附图说明
图1是本实用新型第一种实施方式的结构示意图；
图2是本实用新型第二种实施方式的结构示意图；
图3是本实用新型第三种实施方式的结构示意图。
具体实施方式
本实用新型包括基岛1、导电胶2、芯片3、框架内引脚5、框架外引脚6、金丝7、塑封体9，基岛1通过导电胶2与芯片3相连，芯片3上的焊盘通过压焊金丝7与框架内引脚5相接，形成信号通道。基岛1和框架外引脚6与塑封体9下表面处于同一平面，芯片3上表面、金丝7、框架内引脚5、框架外引脚6上表面被塑封体9包围成一整体。
可增强散热性，提高功率因子。
图1示出了本实用新型的第一种实施方式，框架内引脚5的顶端弯曲与基岛1平行，框架内引脚5的顶端位于塑封体9的中心；用以提高塑封料与框架(电路)内引脚的结合牢度，并且可缩短金丝的长度，节约成本。
图2示出了本实用新型的第二种实施方式，框架内引脚5的顶端弯曲与基岛1平行，框架内引脚5的顶端位于塑封体9的中心；基岛1底部开有环形槽16，槽形部分覆盖有塑封料并与塑封体9相连；既可阻止溢料向基岛表面渗透，又可增强基岛与塑封料的结合牢度。
图3示出了本实用新型的第三种实施方式，基岛1底部开有环形槽16；框架外引脚6底部开有长方形槽17，槽形部分覆盖有塑封料并与塑封体9相连；既增加了塑封体与基岛、框架(电路)外引脚的结合牢度，又可防止溢料向基岛和框架(电路)外引线6底面渗透。

Claims (4)

1、一种芯片封装件，包括基岛、导电胶、芯片、框架内引脚、框架外引脚、金丝、塑封体，基岛通过导电胶与芯片相连，芯片上的焊盘通过金丝与框架内引脚相接；其特征在于：所述基岛(1)和框架外引脚(6)与塑封体(9)下表面处于同一平面，芯片(3)上表面、金丝(7)、框架内引脚(5)、框架外引脚(6)上表面被塑封体(9)包围成一整体。
2、根据权利要求1所述的芯片封装件，其特征在于：所述框架内引脚(5)的顶端弯曲与基岛(1)平行，框架内引脚(5)的顶端位于塑封体(9)的中心。
3、根据权利要求1所述的芯片封装件，其特征在于：所述框架内引脚(5)的顶端弯曲与基岛(1)平行，框架内引脚(5)的顶端位于塑封体(9)的中心；基岛(1)底部开有环形槽(16)，槽形部分覆盖有塑封料并与塑封体(9)相连。
4、根据权利要求1所述的芯片封装件，其特征在于：所述基岛(1)底部开有环形槽(16)；框架外引脚(6)底部开有长方形槽(17)，槽形部分覆盖有塑封料并与塑封体(9)相连。
CN 200620079175 2006-06-13 2006-06-13 芯片封装件 Expired - Fee Related CN2911960Y (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 200620079175 CN2911960Y (zh) 2006-06-13 2006-06-13 芯片封装件

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 200620079175 CN2911960Y (zh) 2006-06-13 2006-06-13 芯片封装件

Publications (1)

Publication Number Publication Date
CN2911960Y true CN2911960Y (zh) 2007-06-13

Family

ID=38133822

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 200620079175 Expired - Fee Related CN2911960Y (zh) 2006-06-13 2006-06-13 芯片封装件

Country Status (1)

Country Link
CN (1) CN2911960Y (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101533038B (zh) * 2009-04-11 2011-06-29 叶隆盛 一种测试座
WO2023098266A1 (zh) * 2021-11-30 2023-06-08 广州金升阳科技有限公司 模块电源的引脚结构和模块电源

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101533038B (zh) * 2009-04-11 2011-06-29 叶隆盛 一种测试座
WO2023098266A1 (zh) * 2021-11-30 2023-06-08 广州金升阳科技有限公司 模块电源的引脚结构和模块电源

Similar Documents

Publication Publication Date Title
US7279784B2 (en) Semiconductor package
CN102201386B (zh) 方形扁平无引线半导体封装及其制作方法
CN103474406A (zh) 一种aaqfn框架产品无铜扁平封装件及其制作工艺
WO2011137676A1 (zh) 一种无线通讯模块产品
CN2911961Y (zh) 芯片倒装型封装件
CN201112415Y (zh) 引脚式大功率led器件
CN2911960Y (zh) 芯片封装件
CN2911958Y (zh) 外接散热片型芯片封装件
CN100514659C (zh) 指纹辨识器的薄膜封装构造
CN100481407C (zh) 晶片上引脚球格阵列封装构造
CN202111082U (zh) 多圈排列ic芯片封装件
CN205542749U (zh) 一种倒装芯片模组
CN201946589U (zh) 一种改进的引线框架
CN102376666B (zh) 一种球栅阵列封装结构及其制造方法
CN201417764Y (zh) 阵列式扁平无引脚芯片的封装结构
CN202178252U (zh) 多圈排列无载体双ic芯片封装件
CN203521396U (zh) 一种aaqfn框架产品无铜扁平封装件
KR100331070B1 (ko) 칩싸이즈반도체패키지의 구조 및 그 제조 방법
CN202307872U (zh) 方形扁平无引脚封装结构
CN203589007U (zh) 一种基于框架的多器件smt扁平封装件
CN203674197U (zh) 新型qfn引线框架
CN207587727U (zh) 一种多载体引线框架
CN201298549Y (zh) 一种led恒流驱动集成电路封装结构
CN201804855U (zh) 表面贴装型半导体装置
JP2004031451A5 (zh)

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
ASS Succession or assignment of patent right

Owner name: XI AN TIANSHENG ELECTRONICS CO., LTD.

Free format text: FORMER OWNER: HUATIAN SCIENCE + TECHNOLOGY CO., LTD., TIANSHUI

Effective date: 20100921

C41 Transfer of patent application or patent right or utility model
COR Change of bibliographic data

Free format text: CORRECT: ADDRESS; FROM: 741000 TO: 710018

TR01 Transfer of patent right

Effective date of registration: 20100921

Address after: 710018 west section of Fengcheng six road, Xi'an economic and Technological Development Zone, Shaanxi

Patentee after: Xi'an TianSheng Electronics Co., Ltd.

Address before: 741000 Gansu province Tianshui District Shuangqiao Road No. 14

Patentee before: Huatian Science & Technology Co., Ltd., Tianshui

DD01 Delivery of document by public notice

Addressee: Liu Guanghui

Document name: Notification of Passing Examination on Formalities

C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20070613

Termination date: 20120613