CN210575938U - 一种用于lga封装的基板结构 - Google Patents
一种用于lga封装的基板结构 Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
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Abstract
本实用新型公开了一种用于LGA封装的基板结构,属于半导体芯片封装技术领域。其包括基板本体(11)和金属线路层,金属线路层根据设计需要复数层分布在基板本体(11)内,其包括上层金属线路层(15)、下层金属线路层(16)和内部金属线路层,共同形成基板结构的内部电路,且其上层金属线路层(15)设置在基板本体的上表面(111),其下层金属线路层(16)内嵌在基板本体(11)内,所述下层金属线路层(16)的下表面(161)露出基板本体的下表面(113),形成LGA焊垫面,所述LGA焊垫面与基板本体(11)的下表面(113)共面。本实用新型可以改善基板背面球垫平整性,避免了芯片在塑封时导致的芯片折裂,提高了产品良率。
Description
技术领域
本实用新型涉及一种用于LGA封装的基板结构,属于半导体芯片封装技术领域。
背景技术
在常规的LGA(LGA全称是Land Grid Array,栅格阵列封装)基板结构设计中,其背面设置有铜材质的LGA焊垫面14,称为大铜面。为了更好地保护基板的金属线路12和LGA焊垫面14,基板10的正面和背面均会涂覆有阻焊作用的绿漆层,分别为上绿漆层31、下绿漆层33,如图1所示,这种在LGA产品的pad面存在的下绿漆层33与LGA的大铜面会存在高度差,如图中Ⅰ区和Ⅱ区所示,这种高度差导致产品在塑封时(塑封层41),因基板下绿漆层33凸点导致的应力集中,出现封装在其基板10上的芯片20断裂的问题,从而影响产品良率。
发明内容
本实用新型的目的在于克服现有技术中存在的不足,提供一种用于LGA封装的基板结构,解决由于基板不平整导致的芯片折裂的问题。
本实用新型的目的是这样实现的:
本实用新型一种用于LGA封装的基板结构,其包括基板本体和金属线路层,金属线路层根据设计需要复数层分布在基板本体内,其包括上层金属线路层、下层金属线路层和内部金属线路层,共同形成基板结构的内部电路,且其上层金属线路层设置在基板本体的上表面,其下层金属线路层内嵌在基板本体内,其下表面露出基板本体的下表面,形成LGA焊垫面,所述LGA焊垫面与基板本体的下表面共面;
所述基板结构的上表面覆盖绿漆层,并形成绿漆层的镂空图案,所述绿漆层的镂空图案露出所述基板结构的上层金属线路层的上表面,用于贴装芯片。
进一步地,所述芯片通过芯片下金属凸块及其焊锡料倒装于上层金属线路层的上表面,并与金属线路层形成电讯连接。
进一步地,还包括塑封层,所述塑封层塑封芯片和绿漆层的裸露面,并填充芯片的底部。
有益效果
本实用新型一种用于LGA封装的基板结构,可以改善基板背面LGA焊垫面的平整性,避免了芯片在塑封时导致的芯片折裂,提高了产品良率。
附图说明
图1为一般LGA基板封装后的剖面图;
图2为本实用新型的一种用于LGA封装的基板结构的剖面图;
图中:
基板本体11
上层金属线路层15
下层金属线路层16
芯片20
芯片下金属凸块21
绿漆层32
塑封层42。
具体实施方式
下面结合附图对本实用新型的具体实施方式进行详细说明。为了易于说明,可以使用空间相对术语(诸如“在…下方”、“之下”、“下部”、“在…上方”、“上部”等)以描述图中所示一个元件或部件与另一个元件或部件的关系。除图中所示的定向之外,空间相对术语还包括使用或操作中设备的不同定向。装置可以以其他方式定向(旋转90度或处于其他定向),本文所使用的空间相对描述可因此进行类似的解释。
本实用新型一种用于LGA封装的基板结构,其包括基板本体11和金属线路层。金属线路层根据设计需要复数层分布在基板本体11内,其包括上层金属线路层15、下层金属线路层16和内部金属线路层,共同形成基板结构的内部电路,且其上层金属线路层15设置在基板本体的上表面111,其下层金属线路层16内嵌在基板本体11内,其下表面161露出基板本体的下表面113,形成LGA焊垫面。LGA焊垫面的形状包括但不限于正方形和长方形,其个数根据实际需要设计。
LGA焊垫面与基板本体的下表面113共面,使焊盘主体内埋在基板本体11的介电材料内,焊盘表面与介电材料在同一平面从而保证基板背面是一个平滑的平面,提高了基板的平整性,从而避免传统基板下表面绿漆的凸点效应,解决了芯片20折裂的问题。绿漆层32覆盖在基板本体的上表面111,并形成绿漆层32镂空图案。该绿漆层32镂空图案露出上层金属线路层15的部分上表面,用于贴装芯片20。
实际封装时,芯片20通过芯片下金属凸块21及其焊锡料倒装于上层金属线路层15的上表面,并与金属线路层形成电讯连接。塑封料塑封芯片20和绿漆层32的裸露面,并填充芯片20的底部,形成塑封层42。
以上所述的具体实施方式,对本实用新型的目的、技术方案和有益效果进行了进一步地详细说明,所应理解的是,以上所述仅为本实用新型的具体实施方式而已,并不用于限定本实用新型的保护范围。凡在本实用新型的精神和原则之内,所做的任何修改、等同替换、改进等,均应包含在本实用新型的保护范围之内。
Claims (3)
1.一种用于LGA封装的基板结构,其特征在于,其包括基板本体(11)和金属线路层,金属线路层根据设计需要复数层分布在基板本体(11)内,其包括上层金属线路层(15)、下层金属线路层(16)和内部金属线路层,共同形成基板结构的内部电路,且其上层金属线路层(15)设置在基板本体的上表面(111),其下层金属线路层(16)内嵌在基板本体(11)内,所述下层金属线路层(16)的下表面(161)露出基板本体的下表面(113),形成LGA焊垫面,所述LGA焊垫面与基板本体的下表面(113)共面;
所述基板结构的上表面覆盖绿漆层(32),并形成绿漆层(32)的镂空图案,所述绿漆层(32)的镂空图案露出所述基板结构的上层金属线路层(15)的上表面,用于贴装芯片(20)。
2.根据权利要求1所述的基板结构,其特征在于,所述芯片(20)通过芯片下金属凸块(21)及其焊锡料倒装于上层金属线路层(15)的上表面,并与金属线路层形成电讯连接。
3.根据权利要求2所述的基板结构,其特征在于,还包括塑封层(42),所述塑封层(42)塑封芯片(20)和绿漆层(32)的裸露面,并填充芯片(20)的底部。
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