CN206451702U - A kind of high-power integrated device lead frames of DFN - Google Patents
A kind of high-power integrated device lead frames of DFN Download PDFInfo
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- CN206451702U CN206451702U CN201720116285.4U CN201720116285U CN206451702U CN 206451702 U CN206451702 U CN 206451702U CN 201720116285 U CN201720116285 U CN 201720116285U CN 206451702 U CN206451702 U CN 206451702U
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- cover plate
- dfn
- support plate
- chip
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Abstract
The utility model discloses a kind of high-power integrated device lead frames of DFN in chip manufacturing field, including support plate and cover plate, some chip regions are uniformly machined with support plate, the Ji Dao that chip region processing is in depression, the projection that some Ji Dao with depression coordinate is machined with cover plate, the utility model replaces existing bonding wire by using full wafer cover plate, the surge ability to bear of finished device is greatly improved in DFN encapsulation fields, improve reliability, crash rate is substantially reduced, available in the high-power integrated device encapsulation of DFN.
Description
Technical field
The utility model is related to a kind of manufacturing method of chip, more particularly to a kind of high-power integrated device manufacture method.
Background technology
As current mobile phone market volume is constantly reduced, thickness constantly thinning, function is continuously increased, each on mobile phone
The research and development of class component all develop towards the big direction of integrated, function, it is necessary to rely on advanced designing technique, material technology,
Particularly Mems technologies etc. realize this series of target.
The development of designing technique, material technology, particularly Mems technologies brings up to the research and development of SMD components and module
One new level, is filled micron-sized sensing element, signal processor, data processing using semiconductor packaging
Put function integrated on the integrated mainstream development technology for being increasingly becoming chip design on the same chip, same chip increasingly
Many, power is increasing, and high-power chip needs to be assemblied in the wiring board of interior of mobile phone after encapsulating, and realizes that acoustic-electric is propagated, resisted
Electrostatic, quick charge etc. function.
Under this background, it is desirable to by multi-functional high-power chip, by rational encapsulating material, packaging technology by core
Piece is packaged into finished product, realizes the various functions that chip possesses in itself.
It is how that powerful chip package is small into size, while the finished product of the profile of thickness of thin, is put in semiconductor element
Road encapsulates a problem of producer after device.
In the high-power integrated device of existing a DFN encapsulation, the circuit for being assemblied in the protection of interior of mobile phone antisurge, profile
It is that DFN2*2-3L encapsulation, i.e. appearance and size are 2*2mm, thickness is 0.6mm, and outside has 3 PAD（Pad）；It is original
DFN2*2-3L framework drawings, pad1, pad2, pad3 are 3 pads respectively, are to disconnect between pad1 and pad2, pad3 is base
Island；High-power chip is welded on the pad3 of framework, the copper wires of 3 diameters 38 respectively by high-power chip surface and pad1 and
Pad2 is connected；Semi-finished product form finished product after plastic packaging process, exposed 3 pads, be respectively pad1 on framework,
Pad2 and pad3；This exposed pad will be welded on mobile phone antisurge protection circuit plate, realize its function.Its weak point exists
In：
First, because the area of pad1, pad2 pad is smaller, during welding wiring board, if 1 pad solder exists
Bonding area on wiring board is incomplete（Weldering partially）, the electric current throughput of this side, when meeting surge impact, device will certainly be influenceed
It will burn.
As long as the solder joint for the 2, having 1 root wire has rosin joint, the magnitude of current passed through on this side pad will have an impact, side electricity
But, whole device will fail for circulation.
Utility model content
The purpose of this utility model is to provide a kind of high-power integrated device lead frames of DFN, greatly improves finished device
Surge ability to bear, improve reliability, crash rate substantially reduces.
What the purpose of this utility model was realized in：A kind of high-power integrated device lead frames of DFN, including support plate and
Uniformly it is machined with some chip regions, the Ji Dao that the chip region processing is in depression, the cover plate and processes on cover plate, the support plate
There is the projection that some Ji Dao with the depression coordinate.
Compared with prior art, the beneficial effects of the utility model are：The utility model is by using full wafer cover plate generation
For existing bonding wire, the surge ability to bear of finished device is greatly improved in DFN encapsulation fields, reliability, crash rate is improved
Substantially reduce；Fixed, relative to the mounting means that bonding wire needs professional equipment, greatly improved by the structure cover type of full wafer
Operating efficiency, saves cost of labor；The utility model solves ultrathin small size（Below thickness 0.6mm）Encapsulation is difficult to carry
The problem of high current, meanwhile, the utility model will be processed on lead frame support plate, lead frame cover plate it is corresponding it is recessed, under
Convex domain, it is ensured that the accuracy of bond pad locations；Ensure the fastness that framework is welded with chip；Ensure the super of overall package size
Bao Xing.The utility model can be used in the high-power integrated device encapsulation of DFN.
In order that cover plate fit with support plate and assembles more convenient, it is multiple fixed that the edge of the support plate and cover plate is machined with
Position hole.
In order that obtaining structural stability after the upper support plate of cover plate laminating, more preferably, the edge of the cover plate is machined with fin, institute
The edge for stating support plate is machined with the breach coordinated with the fin.
Brief description of the drawings
Fig. 1 is lead frame carrying board structure schematic diagram in the utility model.
Fig. 2 is lead frame covering plate structure schematic diagram in the utility model.
Fig. 3 is lead frame support plate, lead frame cover plate and chip assembling schematic diagram in the utility model.
Wherein, 1 support plate, 1a Ji Dao, 1b breach, 1c positioning holes, 2 cover plates, 2a is raised, 2b fins, 2c positioning holes, 3 chips.
Embodiment
On the high-power integrated device lead frames of a kind of DFN as Figure 1-3, including support plate 1 and cover plate 2, support plate 1
Even be machined with some chip regions, the base island 1a that the processing of the area of chip 3 is in depression, cover plate 2 is machined with some base island 1a with depression
The raised 2a of cooperation, support plate 1 is corresponding with the edge of cover plate 2 to be machined with multiple positioning hole 1c, 2c, the edge processing of cover plate 2
There is fin 2b, the edge of support plate 1 is machined with the breach coordinated with fin 2b.
A kind of high-power integrated devices of DFN are manufactured using the utility model to comprise the following steps：
1）The area of chip 3 on lead frame support plate 1 is processed into the base island 1a being in depression by etching process, by lead frame
Convex planar structure is processed into down in region corresponding with the area of chip 3 by etching process on cover plate 2；
2）Lead frame support plate 1, the surface of lead frame cover plate 2 are through graphene coating film treatment, the graphene plated film
Processing method is as follows：Lead frame support plate 1, the lead frame cover plate 2 that copper sheet is made are put into chemical vapor depsotition equipment, true
By air pressure adjustment to 1 × 10 under empty condition5Pa, then by copper sheet with 12 DEG C/min programming rates, be warming up to 900 DEG C and carry out hot place
Reason, heat treatment time is 30min, and heat treatment is warming up to 1000 DEG C after terminating, and is filled with CH4、H2, Ar gases, CH4Flow is
6.5sccm, H2Flow 20sccm, Ar flow are 980sccm, and sedimentation time is：5min, in its surface coating, generation is continuous equal
Even graphene film plating layer, thickness is 0.2~1nm, and natural cooling is no less than 3 hours at room temperature after the completion of plated film, is coated with
The copper sheet of graphene film.
3）Chip 3 is stained with the 1a of base island；
4）Tin cream is stained with the upper surface of chip 3；
5）The lid of lead frame cover plate 2 is pressed on support plate 1, and by some lower convex portions on lead frame cover plate 2 by core
Piece 3 is pressed on the base island 1a of lead frame support plate 1, can will process the pin of needs, monoblock cover plate on cover plate 2 as needed
2 instead of original bonding wire；
6）Overall structure is sent into reflow soldering so that the tin cream on the surface of chip 3 melts, so as to realize chip 3 and cover plate 2
Fixed electrical connection；
7）Plastic packaging will be carried out by the lead frame of reflow soldering；
8）Lead frame after plastic packaging is carried out going to give up, electroplated, is cut, test processes, obtain integrated device finished product.
The utility model replaces existing bonding wire by using full wafer cover plate 2, and finished product is greatly improved in DFN encapsulation fields
The surge ability to bear of device, improves reliability, and crash rate is substantially reduced；Fixed by the structure cover type of full wafer, relative to
Bonding wire needs the mounting means of professional equipment, greatly improves operating efficiency, saves cost of labor；The utility model solves super
Thin-type small-size（Below thickness 0.6mm）Encapsulation is difficult to the problem for carrying high current, meanwhile, the utility model carries lead frame
Corresponding recessed, lower convex domain is processed on plate 1, lead frame cover plate 2, it is ensured that the accuracy of bond pad locations；Ensure framework
The fastness welded with chip 3；Ensure the ultra-thin property of overall package size.
The utility model is not limited to above-described embodiment, on the basis of technical scheme disclosed in the utility model, this
The technical staff in field is according to disclosed technology contents, it is not necessary to which performing creative labour just can be special to some of which technology
Levy and make some replacements and deform, these are replaced and deformed in protection domain of the present utility model.
Claims (3)
1. a kind of high-power integrated device lead frames of DFN, it is characterised in that including support plate and cover plate, uniform on the support plate
It is machined with some chip regions, the Ji Dao that the chip region processing is in depression, the cover plate and is machined with some and depression
The projection that Ji Dao coordinates.
2. the high-power integrated device lead frames of a kind of DFN according to claim 1, it is characterised in that the support plate and
The edge correspondence of cover plate is machined with multiple positioning holes.
3. the high-power integrated device lead frames of a kind of DFN according to claim 1, it is characterised in that the cover plate
Edge is machined with fin, and the edge of the support plate is machined with the breach coordinated with the fin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720116285.4U CN206451702U (en) | 2017-02-08 | 2017-02-08 | A kind of high-power integrated device lead frames of DFN |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720116285.4U CN206451702U (en) | 2017-02-08 | 2017-02-08 | A kind of high-power integrated device lead frames of DFN |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206451702U true CN206451702U (en) | 2017-08-29 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201720116285.4U Active CN206451702U (en) | 2017-02-08 | 2017-02-08 | A kind of high-power integrated device lead frames of DFN |
Country Status (1)
| Country | Link |
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| CN (1) | CN206451702U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106783791A (en) * | 2017-02-08 | 2017-05-31 | 扬州江新电子有限公司 | A kind of high-power integrated device manufacture methods of DFN and lead frame |
-
2017
- 2017-02-08 CN CN201720116285.4U patent/CN206451702U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106783791A (en) * | 2017-02-08 | 2017-05-31 | 扬州江新电子有限公司 | A kind of high-power integrated device manufacture methods of DFN and lead frame |
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