CN205542765U - 半导体封装结构 - Google Patents

半导体封装结构 Download PDF

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CN205542765U
CN205542765U CN201620275866.8U CN201620275866U CN205542765U CN 205542765 U CN205542765 U CN 205542765U CN 201620275866 U CN201620275866 U CN 201620275866U CN 205542765 U CN205542765 U CN 205542765U
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semiconductor package
layer
dielectric substance
welding resisting
semiconductor element
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顏立盛
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Team Expert Management Consulting Service Ltd
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Abstract

本实用新型涉及一种半导体封装结构，包括：埋设有一线路层的防焊层、设于该防焊层上并电性连接该线路层的半导体元件、以及包覆该半导体元件的介电体，以藉此方式能大幅降低整体结构的厚度。

Description

半导体封装结构
技术领域
本实用新型有关一种半导体封装结构，尤指一种薄型化半导体封装结构。
背景技术
随着半导体封装技术的演进，半导体装置(Semiconductor device)已开发出不同的封装型态。其中，球栅阵列式(Ball grid array，简称BGA)，例如PBGA、EBGA、FCBGA等，为一种先进的半导体封装技术，其特点在于采用一封装基板来安置半导体元件，并于该封装基板背面植置多数个成栅状阵列排列的锡球(Solder ball)，使相同单位面积的承载件上可容纳更多输入/输出连接端(I/O connection)以符合高度集积化(Integration)的半导体芯片的需求，并藉该些锡球将整个封装单元焊结并电性连接至外部电子装置。
此外，为了符合半导体封装件轻薄短小、多功能、高速度及高频化的开发方向，半导体芯片封装用的电路板(或封装基板)已朝向细线路及小孔径发展。现有电路板制程从传统100微米的线路尺寸，如导线宽度(Line width)、线路间距(Space)及深宽比(Aspectratio)等，已缩减至20微米，并持续朝向更小的线路精度进行研发。
如图1所示，悉知半导体封装件1包括一基板结构10、设于基板结构10上的一半导体芯片11、包覆该半导体芯片11的封装胶体12、以及设于该基板结构10底侧的多个焊球13。
具体地，该基板结构10由多层介电层100构成主体，且各该介电层100上设有线路层101，并于各该线路层101之间以多个导电盲孔102作层间电性连接，又该焊球13电性连接该线路层101。该基板结构10也可为两层线路的封装基板、或具有核心板的封装基板等。
此外，该半导体芯片11具有相对的作用面11a与非作用面11b，该作用面11a上具有多个电极垫110，以藉由该导电盲孔102电性连接该电极垫110与该线路层101。
然而，悉知半导体封装件1中，用以承载半导体芯片11的基板结构10为多层线路的封装基板、或具有核心板的封装基板，致使该半导体封装件1的厚度较厚，因而难以符合薄化的需求。
因此，如何克服悉知技术中的问题，实已成目前亟欲解决的课题。
实用新型内容
鉴于上述悉知技术的缺失，本实用新型提供一种半导体封装结构，以大幅降低整体结构的厚度。
本实用新型的半导体封装结构包括：防焊层；一线路层，其埋设于该防焊层中且部分外露于该防焊层；半导体元件，其设于该防焊层上，且具有相对的作用面与非作用面，其中，该半导体元件藉其作用面电性连接该线路层；以及介电体，其形成于该防焊层上以包覆该半导体元件。
前述的半导体封装结构中，该防焊层形成有多个开孔，以令部分该线路层外露于该些开孔。
前述的半导体封装结构中，该半导体元件的作用面具有多个电性连接该线路层的电极垫。例如，该些电极垫藉由导电体电性连接该线路层，其中，该导电体为银胶、紫外线硬化胶、异方性导电膜、焊料合金、无铅焊料或锡金共晶焊料。
前述的半导体封装结构中，该半导体元件的非作用面外露于该介电体的表面。
前述的半导体封装结构中，该半导体元件的非作用面上形成有金属层。
前述的半导体封装结构中，形成该介电体的材质包含浸玻璃纤维织布。
前述的半导体封装结构中，该介电体中形成有至少一贯穿该介电体的导电柱，以电性连接该线路层。
另外，前述的半导体封装结构中，该介电体上形成有布线层。
由上可知，本实用新型的半导体封装结构，主要藉由防焊层的设计以取代悉知多层线路的基板或具核心层的基板，即以防焊层取代悉知介电层或悉知核心板，能降低该半导体封装结构的厚度。
附图说明
图1为悉知半导体封装件的剖面示意图；
图2为本实用新型半导体封装结构的剖面示意图；以及
图3A至图3C为本实用新型半导体封装结构的其它不同实施例的剖面示意图。
符号说明
1 半导体封装件 10 基板结构
100 介电层 101,201 线路层
102 导电盲孔 11 半导体芯片
11a,21a 作用面 11b,21b 非作用面
110,210 电极垫 12 封装胶体
13 焊球 2,3a,3b,3c 半导体封装结构
20 防焊层 200,200’,300 开孔
201a 电性接触垫 21 半导体元件
22 介电体 22a 第一表面
22b,22b’ 第二表面 23 导电元件
24 导电体 25 表面处理层
26 金属层 34 导电柱
35 布线层。
具体实施方式
以下藉由特定的具体实施例说明本实用新型的实施方式，熟悉此技艺的人士可由本说明书所揭示的内容轻易地了解本实用新型的其他优点及功效。
须知，本说明书所附图式所绘示的结构、比例、大小等，均仅用以配合说明书所揭示的内容，以供熟悉此技艺的人士的了解与阅读，并非用以限定本实用新型可实施的限定条件，故不具技术上的实质意义，任何结构的修饰、比例关系的改变或大小的调整，在不影响本实用新型所能产生的功效及所能达成的目的下，均应仍落在本实用新型所揭示的技术内容得能涵盖的范围内。同时，本说明书中所引用的如“上”、“第一”、“第二”及“一”等的用语，也仅为便于叙述的明了，而非用以限定本实用新型可实施的范围，其相对关系的改变或调整，在无实质变更技术内容下，当也视为本实用新型可实施的范畴。
图2为本实用新型的半导体封装结构2的剖面示意图。如图2所示，该半导体封装结构2包括：一埋设有一线路层201的防焊层20、一半导体元件21、以及一介电体22。
所述的防焊层20于其上侧形成有多个开孔200，以令该线路层201的部分表面外露于该些开孔200。
于本实施例中，该线路层201以电镀铜方式制作，且具有多个电性接触垫201a，使该些电性接触垫201a外露于各该开孔200。
此外，该防焊层20下侧亦可形成有多个开孔200’，以令该线路层201的部分表面外露于该些开孔200’，以供结合如焊球的导电元件23。
所述的半导体元件21设于该防焊层20上并电性连接该线路层201，且该半导体元件21具有相对的作用面21a与非作用面21b，该作用面21a上具有多个电极垫210。
于本实施例中，该半导体元件21可为主动元件、被动元件或其二者的组合。具体地，该主动元件为例如半导体芯片，而该被动元件为例如电阻、电容及电感。
此外，可于该开孔200中形成导电体24，使该半导体元件21的电极垫210藉由该导电体24结合并电性连接于各该电性接触垫201a上。具体地，该导电体24为例如银胶、紫外线硬化胶(俗称UV胶)、异方性导电膜(Anisotropic Conductive Film，简称ACF)、焊料合金、无铅焊料或锡金共晶焊料。
又，可于各该电性接触垫201a上形成表面处理层25，以利于形成该导电体24。
所述的介电体22设于该防焊层20上并包覆该半导体元件21。
于本实施例中，该介电体22具有相对的第一表面22a与第二表面22b，且该介电体22以其第一表面22a与该防焊层20相压合。
此外，该介电体22为胶含浸玻璃纤维织布(prepreg)，其由多层介电片所构成，且至少一层介电片可具有开口以容置该半导体元件21，使该半导体元件21嵌埋于该介电体22中。
因此，于制作该半导体封装结构2时，例如，先将该线路层201形成于该防焊层20中，再设置该半导体元件21于该防焊层20上，之后压合该介电体22与该防焊层20，使该介电体22包覆该半导体元件21。
图3A至图3C为本实用新型半导体封装结构3a,3b,3c的其它不同实施例的剖面示意图。
如图3A所示，于该半导体封装结构3a中，可藉由移除该介电体22的第二表面22b的部分材质，使该半导体元件21的非作用面21b外露于该介电体22的第二表面22b’，以利于该半导体元件21的散热。
于本实施例中，该半导体元件21的非作用面21b齐平该介电体22的第二表面22b。
如图3B所示，该半导体封装结构3b还包括一金属层26，其形成于该半导体元件21的非作用面21b上，且外露于该介电体22的第二表面22b(例如，该金属层26的外露表面齐平该介电体22的第二表面22b)，以令该金属层26作为散热层、应力层或屏蔽层。
如图3C所示，于该半导体封装结构3c中，藉由该介电体20取代悉知封装胶体，该介电体22可形成有多个连通该第一与第二表面22a,22b的导电柱34，以电性连接该线路层201。
于本实施例中，该介电体22的第二表面22b上形成有一布线层35，且该布线层35藉由该些导电柱34电性连接该线路层201。
此外，该防焊层20于其上侧形成有多个另一开孔300，以令该线路层201的部分表面外露于该些开孔300，以供结合及电性连接该导电柱34。
又，该布线层35可依需求设计为散热层、线路层、应力层或屏蔽层等。
另外，藉由该介电体20取代悉知封装胶体，可于该介电体20的第二表面20b上选择性设计，例如，可依需求设有线路增层结构(图略)或堆叠其它如封装件、芯片等的电子装置(图略)。
综上所述，本实用新型的半导体封装结构2,3a,3b,3c，主要藉由该防焊层20具有单一线路层201的设计以取代悉知多层线路的基板或具核心层的基板，以降低该半导体封装结构2,3a,3b,3c的厚度。
上述实施例仅用以例示性说明本实用新型的原理及其功效，而非用于限制本实用新型。任何熟习此项技艺的人士均可在不违背本实用新型的精神及范畴下，对上述实施例进行修改。因此本实用新型的权利保护范围，应如权利要求书所列。

Claims (10)

1.一种半导体封装结构，其特征在于，该半导体封装结构包括：
防焊层；
线路层，其埋设于该防焊层中且部分外露于该防焊层；
半导体元件，其设于该防焊层上，且具有相对的作用面与非作用面，其中，该半导体元件藉其作用面电性连接外露于该防焊层的该线路层；以及
介电体，其形成于该防焊层上以包覆该半导体元件。
2.如权利要求1所述的半导体封装结构，其特征在于，该防焊层形成有多个开孔，以令部分该线路层外露于该些开孔。
3.如权利要求1所述的半导体封装结构，其特征在于，该半导体元件的作用面具有多个电性连接该线路层的电极垫。
4.如权利要求3所述的半导体封装结构，其特征在于，该些电极垫藉由导电体电性连接该线路层。
5.如权利要求4所述的半导体封装结构，其特征在于，该导电体为银胶、紫外线硬化胶、异方性导电膜、焊料合金、无铅焊料或锡金共晶焊料。
6.如权利要求1所述的半导体封装结构，其特征在于，该半导体元件的非作用面外露于该介电体。
7.如权利要求1所述的半导体封装结构，其特征在于，该半导体元件的非作用面上形成有金属层。
8.如权利要求1所述的半导体封装结构，其特征在于，形成该介电体的材质包含浸玻璃纤维织布。
9.如权利要求1所述的半导体封装结构，其特征在于，该介电体中形成有至少一贯穿该介电体的导电柱，以电性连接该线路层。
10.如权利要求1所述的半导体封装结构，其特征在于，该介电体上形成有布线层。
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