CN205067935U - 一种阵列基板及显示装置 - Google Patents
一种阵列基板及显示装置 Download PDFInfo
- Publication number
- CN205067935U CN205067935U CN201520876580.0U CN201520876580U CN205067935U CN 205067935 U CN205067935 U CN 205067935U CN 201520876580 U CN201520876580 U CN 201520876580U CN 205067935 U CN205067935 U CN 205067935U
- Authority
- CN
- China
- Prior art keywords
- thin film
- film transistor
- tft
- underlay substrate
- line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000010409 thin film Substances 0.000 claims abstract description 98
- 239000000758 substrate Substances 0.000 claims abstract description 75
- 230000008878 coupling Effects 0.000 abstract description 15
- 238000010168 coupling process Methods 0.000 abstract description 15
- 238000005859 coupling reaction Methods 0.000 abstract description 15
- 230000002349 favourable effect Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 7
- 239000012212 insulator Substances 0.000 description 6
- 239000000463 material Substances 0.000 description 6
- 238000002161 passivation Methods 0.000 description 5
- 239000004973 liquid crystal related substance Substances 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 241000931705 Cicada Species 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 239000013081 microcrystal Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B30/00—Optical systems or apparatus for producing three-dimensional [3D] effects, e.g. stereoscopic images
- G02B30/20—Optical systems or apparatus for producing three-dimensional [3D] effects, e.g. stereoscopic images by providing first and second parallax images to an observer's left and right eyes
- G02B30/26—Optical systems or apparatus for producing three-dimensional [3D] effects, e.g. stereoscopic images by providing first and second parallax images to an observer's left and right eyes of the autostereoscopic type
- G02B30/27—Optical systems or apparatus for producing three-dimensional [3D] effects, e.g. stereoscopic images by providing first and second parallax images to an observer's left and right eyes of the autostereoscopic type involving lenticular arrays
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/13606—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit having means for reducing parasitic capacitance
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
- G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
- G02F2201/123—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel
Landscapes
- Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Nonlinear Science (AREA)
- General Physics & Mathematics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Optics & Photonics (AREA)
- Power Engineering (AREA)
- Mathematical Physics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Materials Engineering (AREA)
- Organic Chemistry (AREA)
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Thin Film Transistor (AREA)
Abstract
本实用新型实施例公开了一种阵列基板及显示装置。该阵列基板,包括衬底基板,在衬底基板上交叉设置的多条栅线,多条数据线,设置在相邻的栅线与相邻的数据线限定区域内的像素电极,以及在栅线和数据线交叉位置处设置的薄膜晶体管,薄膜晶体管的漏极与像素电极通过过孔连接;栅线在相邻的数据线之间设置有宽化部;所述宽化部设置有凹槽结构;所述凹槽结构在衬底基板上的正投影与薄膜晶体管的漏极在衬底基板上的正投影至少部分重叠。由于栅线在相邻的数据线之间设置有宽化部,降低了栅线的信号延迟,在上述宽化部设置有凹槽结构,该凹槽结构有利于灵活布线,薄膜晶体管的漏极经过上述凹槽结构,从而可以降低薄膜晶体管的漏极与栅线的耦合电容。
Description
技术领域
本实用新型涉及显示技术领域,尤其涉及一种阵列基板及显示装置。
背景技术
目前,薄膜晶体管液晶显示器已广泛应用于电视、手机以及公共信息显示。薄膜晶体管液晶显示器中包括薄膜晶体管阵列基板,其中,薄膜晶体管的栅极与栅线相连,栅线通过位于外围区域的栅极引线与栅极驱动电路相连,由栅极驱动电路通过栅线向栅极提供开启信号以实现图形显示。但是,由于阵列基板中有很多数据线等等,在栅线与数据线等之间会存在耦合电容,薄膜晶体管的栅极与源极和漏极之间也存在耦合电容,在信号传输的过程中,会对耦合电容充电,导致栅线的信号延迟,尤其是在较大尺寸的液晶显示器中栅线较长,使得其电阻较大,更加大了对耦合电容充电的时间,导致栅线的信号延迟的问题较严重。
实用新型内容
本实用新型实施例的目的是提供一种阵列基板及显示装置,用于解决栅线的信号延迟问题。
本实用新型实施例的目的是通过以下技术方案实现的:
一种阵列基板,包括衬底基板,在所述衬底基板上交叉设置的多条栅线,多条数据线,设置在相邻的栅线与相邻的数据线限定区域内的像素电极,以及在所述栅线和所述数据线交叉位置处设置的薄膜晶体管,所述薄膜晶体管的漏极与所述像素电极通过过孔连接;
所述栅线在相邻的数据线之间设置有宽化部;
所述宽化部设置有凹槽结构;
所述凹槽结构在所述衬底基板上的正投影与所述薄膜晶体管的漏极在所述衬底基板上的正投影至少部分重叠。
较佳地,所述薄膜晶体管的漏极在所述衬底基板上的正投影与所述凹槽结构在所述衬底基板上的正投影的重叠部分至少包括一线段,或者一曲线段。
较佳地,所述线段或曲线段的两端点之间连线的延伸方向与所述栅线的延伸方向之间的夹角大于0度且小于90度。
较佳地,所述直线段或曲线段的两端点之间连线的延伸方向与所述栅线的延伸方向之间的夹角大于30度且小于60度。
较佳地,所述薄膜晶体管的漏极与所述像素电极连接所通过的过孔在所述衬底基板上的正投影位于所述凹槽结构在所述衬底基板上的正投影的区域内。
较佳地,所述薄膜晶体管的漏极与所述像素电极连接所通过的过孔在所述衬底基板上的正投影与所述凹槽结构在所述衬底基板上的正投影部分重叠。
较佳地,所述凹槽结构在所述衬底基板上的正投影的形状为正方形,矩形,梯形或者半圆形。
一种显示装置,包括以上任一项所述的阵列基板。
本实用新型实施例的有益效果如下:
本实用新型实施例提供的一种阵列基板及显示装置中,由于栅线在相邻的数据线之间设置有宽化部,与现有技术相比,大大增加了栅线的部分位置的宽度,使得栅线的电阻减小,降低了与数据线之间的耦合电容的充电时间,从而降低了栅线的信号延迟;又由于栅线与数据线交叉处未增加宽度,就不会增加栅线与数据线之间的耦合电容。并且,在上述宽化部设置有凹槽结构,该凹槽结构有利于灵活布线,凹槽结构在衬底基板上的正投影与薄膜晶体管的漏极在衬底基板上的正投影至少部分重叠,即薄膜晶体管的漏极经过上述凹槽结构,减少了薄膜晶体管的漏极与栅线的重叠,从而可以降低薄膜晶体管的漏极与栅线的耦合电容。
附图说明
图1为本实用新型实施例提供的一种阵列基板的结构之一的示意图;
图2为本实用新型实施例中图1所示的阵列基板的AA’方向的截面图;
图3为本实用新型实施例中薄膜晶体管的漏极在衬底基板上的正投影与凹槽结构在衬底基板上的正投影的重叠部分所包括的线段的两端点之间连线的延伸方向与栅线的延伸方向之间的夹角示意图;
图4为本实用新型实施例中薄膜晶体管的漏极在衬底基板上的正投影与凹槽结构在衬底基板上的正投影的重叠部分所包括的曲线段的两端点之间连线的延伸方向与栅线的延伸方向之间的夹角示意图;
图5为本实用新型实施例提供的一种阵列基板的结构之二的示意图;
图6为本实用新型实施例提供的一种阵列基板的结构之三的示意图;
图7为本实用新型实施例提供的一种阵列基板的结构之四的示意图;
图8为本实用新型实施例提供的一种阵列基板的结构之五的示意图。
具体实施方式
本实用新型提供了一种阵列基板及显示装置,用于解决栅线的信号延迟的问题。下面结合附图和实施例对本实用新型提供的一种阵列基板及显示装置进行更详细地说明。
本实用新型实施例提供一种阵列基板,如图1所示,包括衬底基板(图1中未示出),在衬底基板上交叉设置的多条栅线1,多条数据线2,设置在相邻的栅线1与相邻的数据线2限定区域内的像素电极3,以及在栅线1和数据线2交叉位置处设置的薄膜晶体管,薄膜晶体管的漏极4与像素电极3通过过孔5连接;
栅线1在相邻的数据线2之间设置有宽化部11;
宽化部11设置有凹槽结构12;
凹槽结构12在衬底基板上的正投影与薄膜晶体管的漏极4在衬底基板上的正投影至少部分重叠。
本实用新型实施例中,由于栅线1在相邻的数据线2之间设置有宽化部,与现有技术相比,大大增加了栅线1的部分位置的宽度,使得栅线1的电阻减小,降低了与数据线2之间的耦合电容的充电时间,从而降低了栅线1的信号延迟;又由于栅线1与数据线2交叉处未增加宽度,就不会增加栅线1与数据线2之间的耦合电容。并且,在上述宽化部11设置有凹槽结构12,该凹槽结构12有利于灵活布线,凹槽结构22在衬底基板上的正投影与薄膜晶体管的漏极4在衬底基板上的正投影至少部分重叠,即薄膜晶体管的漏极4经过上述凹槽结构12,减少了薄膜晶体管的漏极4与栅线1的重叠,从而可以降低薄膜晶体管的漏极4与栅线1的耦合电容。
其中,凹槽结构12将宽化部11分成了第一宽化部111和第二宽化部112。栅线的第一宽化部111的宽度与栅线的第二宽化部112的宽度可以相同。当然,栅线的第一宽化部111的宽度与栅线的第二宽化部112的宽度也可以不同。
其中,栅线1与数据线2的交叉处设置有细化部13,该细化部13的宽度小于上述宽化部11的宽度。
其中,薄膜晶体管还包括有源层6,源极7和栅极。薄膜晶体管的源极7与数据线2连接,薄膜晶体管的栅极与栅线连接。具体的:
图1中栅线1的第一宽化部111作为薄膜晶体管的栅极。薄膜晶体管的漏极4具有相互连接的第一线段41和第二线段42;薄膜晶体管的漏极的第一线段41的延伸方向与数据线2的延伸方向平行;薄膜晶体管的漏极的第二线段42在衬底基板上的正投影与薄膜晶体管的有源层6在衬底基板上的正投影部分重叠。相应的,上述凹槽结构12在衬底基板上的正投影与薄膜晶体管的漏极的第二线段42在衬底基板上的正投影至少部分重叠,图1中已由B所表示的区域示出了该重叠部分,这里需要说明的是,B所表示的区域并不要求示出所有的重叠部分,这里B只是用于说明本实用新型实施例。
上述阵列基板还包括栅极绝缘层(图1中未示出)和钝化层(图1中未示出)。
图1中的阵列基板在AA’方向的截面图如图2所示,栅线1位于衬底基板8上;栅极绝缘层9位于衬底基板8和栅线1上;薄膜晶体管的有源层6位于栅极绝缘层9上;薄膜晶体管的源极7位于薄膜晶体管的有源层6上;薄膜晶体管的漏极4位于薄膜晶体管的有源层6和栅极绝缘层9上;钝化层10位于薄膜晶体管的漏极4、薄膜晶体管的有源层6、薄膜晶体管的源极7和栅极绝缘层9上;过孔5位于钝化层10中;像素电极3位于钝化层10上。
其中,栅线1、数据线2、薄膜晶体管的漏极4和薄膜晶体管的源极7的材料可以是铝,或其它金属材料。
其中,栅极绝缘层9可以是单层也可以是多层,其材料可以是氮化硅或者氧化硅。
其中,薄膜晶体管的有源层6的材料可以是非晶硅、多晶硅、微晶硅或者铟镓锌氧化物(IndiumGalliumZincOxide)。
其中,钝化层10的材料可以是无机物,如氮化硅;也可以是有机绝缘材料,如有机树脂材料。
其中,像素电极3的材料可以是氧化铟锡(IndiumTinOxide,ITO)、氧化铟锌(IndiumZincOxide,IZO),或其它透明金属氧化物导电材料。
上述实用新型实施例中,较佳地,薄膜晶体管的漏极4在衬底基板上的正投影与上述凹槽结构12在衬底基板上的正投影的重叠部分至少包括一线段,或者一曲线段。
本实用新型实施例中,薄膜晶体管的漏极4在衬底基板上的正投影与上述凹槽结构12在衬底基板上的正投影的重叠部分的形状,可以根据需要灵活设置成至少包括一线段或者一曲线段,使得阵列基板的设计更加灵活。
较佳地,上述线段或者曲线段的两端点之间连线的延伸方向与栅线1的延伸方向之间的夹角大于0度且小于90度。
图3中示出了上述线段的两端点之间连线的延伸方向与栅线1的延伸方向之间的夹角θ,图4中示出了上述曲线段的两端点之间连线的延伸方向与栅线1的延伸方向之间的夹角θ。图3和图4中,B所表示的区域的含义与图1中B所表示的区域的含义相同。
本实用新型实施例中,薄膜晶体管的漏极4在衬底基板上的正投影与上述凹槽结构12在衬底基板上的正投影的重叠部分所包括的上述线段或者曲线段相对栅线1倾斜设置于上述凹槽结构12内,可以使得上述凹槽结构12所占栅线1的宽度尽可能小,那么,相对的,栅线的凹槽结构12之外的宽度就会较宽,使得栅线1的电阻减小,降低了栅线1与数据线2、栅极与薄膜晶体管的源极和薄膜晶体管的漏极之间的耦合电容的充电时间,从而降低栅线1的信号延迟。
为了进一步的降低栅线1的信号延迟,较佳地,上述相关实施例中,上述线段或者曲线段的两端点之间连线的延伸方向与栅线1的延伸方向之间的夹角大于30度且小于60度。
需要说明的是,上述薄膜晶体管的漏极4在衬底基板上的正投影与上述凹槽结构12在衬底基板上的正投影的重叠部分除了包括上述线段或者曲线段,还可以包括其它的线段或其它的曲线段,在此不作具体限定。
上述相关实施例中,上述凹槽结构12的形状有多种,较佳地,上述凹槽结构12在衬底基板上的正投影的形状为正方形,矩形,梯形或者半圆形。
较佳地,上述凹槽结构12在衬底基板上的正投影的形状也可以根据需要设置成其它的多边形,等等。
本实用新型实施例中,凹槽结构12在衬底基板上的正投影可以为半圆形,参见图5,在该实施例中,薄膜晶体管的源极7在衬底基板上的正投影的形状可以呈“L”型。
相应的,薄膜晶体管的源极包括相互连接的第一边71和第二边72,薄膜晶体管的源极的第一边71的延伸方向与数据线2的延伸方向平行;薄膜晶体管的源极的第二边72的延伸方向与栅线1的延伸方向平行。
本实用新型实施例中,上述凹槽结构12在衬底基板上的正投影的形状可以为梯形,参见图6,在该实施例中,薄膜晶体管的源极7在衬底基板上的正投影的形状可以呈“U”型。
相应的,薄膜晶体管的漏极4具有相互连接的第一线段41、第二线段42和第三线段43:薄膜晶体管的漏极的第一线段41的延伸方向与数据线2的延伸方向平行;薄膜晶体管的漏极的第一线段41与像素电极3通过过孔5连接。薄膜晶体管的漏极的第二线段42的延伸方向与栅线1的延伸方向平行;薄膜晶体管的漏极的第二线段42在衬底基板上的正投影与薄膜晶体管的有源层6在衬底基板上的正投影部分重叠。上述凹槽结构12在衬底基板上的正投影与薄膜晶体管的漏极的第三线段43在衬底基板上的正投影至少部分重叠,且该重叠部分包括一线段;该线段的两端点之间连线的延伸方向与栅线1的延伸方向之间的夹角的范围可参照上述相关实施例。
相应的,薄膜晶体管的源极7具有相互连接的第一边71和第二边72:薄膜晶体管的源极的第一边71的延伸方向与栅线1的延伸方向平行,薄膜晶体管的源极的第二边72的延伸方向也与栅线1的延伸方向平行。薄膜晶体管的源极7的“U”型开口朝向薄膜晶体管的漏极的第二线段42。
上述相关实施例中,薄膜晶体管的漏极4与像素电极3连接所通过的过孔5的设置位置有多种,下面举例说明。
例如,薄膜晶体管的漏极4与像素电极3连接所通过的过孔5可以位于像素电极3对应区域的中央部。如图1所示,薄膜晶体管的漏极4与像素电极3连接所通过的过孔5在衬底基板上的正投影位于像素电极3在衬底基板上的正投影的区域中央部。这样,可以使得像素电极3上所加载的电压均衡。
又例如,上述过孔5可以完全位于上述凹槽结构12所对应的区域内。如图7所示,薄膜晶体管的漏极4与像素电极3连接所通过的过孔5在衬底基板上的正投影位于上述凹槽结构12在衬底基板上的正投影的区域内。这样,上述凹槽结构12对应的区域内有过孔5,从而使得相邻的栅线1与相邻的数据线2限定区域内的开口率提高了。
相应的,薄膜晶体管的漏极4具有相互连接的第一线段41和第二线段42:薄膜晶体管的漏极的第一线段41与像素电极3通过过孔5连接;上述凹槽结构12在衬底基板上的正投影与薄膜晶体管的漏极的第一线段41在衬底基板上的正投影至少部分重叠,该重叠部分包括一线段,该线段的两端点之间连线的延伸方向与栅线1的延伸方向之间的夹角的范围可参照上述实施例。薄膜晶体管的漏极的第二线段42的延伸方向与栅线1的延伸方向平行;薄膜晶体管的漏极的第二线段42在衬底基板上的正投影与薄膜晶体管的有源层6在衬底基板上的正投影部分重叠。
再例如,上述过孔5可以部分位于上述凹槽结构12所对应的区域内。如图8所示,薄膜晶体管的漏极4与像素电极3连接所通过的过孔5在衬底基板上的正投影与上述凹槽结构12在衬底基板上的正投影部分重叠。其余结构的设置可参见图7。
本实用新型实施例中,上述薄膜晶体管的漏极与所述像素电极通过过孔连接包括薄膜晶体管的漏极通过过孔与所述像素电极直接接触连接的情形;也包括薄膜晶体管的漏极通过过孔与像素电极电连接的情形,例如,薄膜晶体管的漏极通过过孔与其他电气结构连接,该电气结构包括导线和/或电容,像素电极与该电气结构连接,从而,薄膜晶体管的漏极通过过孔与像素电极形成电连接。
基于同样的构思,本实用新型实施例还提供一种显示装置,包括以上任意实施例所述的阵列基板。该显示装置可以为:液晶面板、电子纸、液晶电视、液晶显示器、数码相框、手机、平板电脑等具有任何显示功能的产品或部件。
本实用新型实施例中提供的一种阵列基板及显示装置,由于栅线在相邻的数据线之间设置有宽化部,与现有技术相比,大大增加了栅线的部分位置的宽度,使得栅线的电阻减小,降低了与数据线之间的耦合电容的充电时间,从而降低了栅线的信号延迟;又由于栅线与数据线交叉处未增加宽度,就不会增加栅线与数据线之间的耦合电容。并且,在上述宽化部设置有凹槽结构,该凹槽结构有利于灵活布线,凹槽结构在衬底基板上的正投影与薄膜晶体管的漏极在衬底基板上的正投影至少部分重叠,即薄膜晶体管的漏极经过上述凹槽结构,减少了薄膜晶体管的漏极与栅线的重叠,从而可以降低薄膜晶体管的漏极与栅线的耦合电容。
本实用新型实施例提供的阵列基板及显示装置,仅是以有限的阵列基板结构为例说明,具体实施时不限于本实用新型提及的阵列基板结构。另外,本实用新型实施例附图中所示的阵列基板的结构仅是用于说明本实用新型的内容,并不用于限制本实用新型。
尽管已描述了本实用新型的优选实施例,但本领域内的技术人员一旦得知了基本创造性概念,则可对这些实施例作出另外的变更和修改。所以,所附权利要求意欲解释为包括优选实施例以及落入本实用新型范围的所有变更和修改。
显然,本领域的技术人员可以对本实用新型进行各种改动和变型而不脱离本实用新型的精神和范围。这样,倘若本实用新型的这些修改和变型属于本实用新型权利要求及其等同技术的范围之内,则本实用新型也意图包含这些改动和变型在内。
Claims (8)
1.一种阵列基板,包括衬底基板,在所述衬底基板上交叉设置的多条栅线,多条数据线,设置在相邻的栅线与相邻的数据线限定区域内的像素电极,以及在所述栅线和所述数据线交叉位置处设置的薄膜晶体管,所述薄膜晶体管的漏极与所述像素电极通过过孔连接;其特征在于:
所述栅线在相邻的数据线之间设置有宽化部;
所述宽化部设置有凹槽结构;
所述凹槽结构在所述衬底基板上的正投影与所述薄膜晶体管的漏极在所述衬底基板上的正投影至少部分重叠。
2.根据权利要求1所述的阵列基板,其特征在于,所述薄膜晶体管的漏极在所述衬底基板上的正投影与所述凹槽结构在所述衬底基板上的正投影的重叠部分至少包括一线段,或者一曲线段。
3.根据权利要求2所述的阵列基板,其特征在于,所述线段或曲线段的两端点之间连线的延伸方向与所述栅线的延伸方向之间的夹角大于0度且小于90度。
4.根据权利要求3所述的阵列基板,其特征在于,所述线段或曲线段的两端点之间连线的延伸方向与所述栅线的延伸方向之间的夹角大于30度且小于60度。
5.根据权利要求1所述的阵列基板,其特征在于,所述薄膜晶体管的漏极与所述像素电极连接所通过的过孔在所述衬底基板上的正投影位于所述凹槽结构在所述衬底基板上的正投影的区域内。
6.根据权利要求1所述的阵列基板,其特征在于,所述薄膜晶体管的漏极与所述像素电极连接所通过的过孔在所述衬底基板上的正投影与所述凹槽结构在所述衬底基板上的正投影部分重叠。
7.根据权利要求1~6任一项所述的阵列基板,其特征在于,所述凹槽结构在所述衬底基板上的正投影的形状为正方形,矩形,梯形或者半圆形。
8.一种显示装置,其特征在于,包括权利要求1~7任一项所述的阵列基板。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201520876580.0U CN205067935U (zh) | 2015-11-05 | 2015-11-05 | 一种阵列基板及显示装置 |
PCT/CN2016/101767 WO2017076153A1 (zh) | 2015-11-05 | 2016-10-11 | 阵列基板及显示装置 |
US15/521,503 US11493813B2 (en) | 2015-11-05 | 2016-10-11 | Array substrate and display device |
US17/890,451 US20230017104A1 (en) | 2015-11-05 | 2022-08-18 | Array substrate and display device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201520876580.0U CN205067935U (zh) | 2015-11-05 | 2015-11-05 | 一种阵列基板及显示装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN205067935U true CN205067935U (zh) | 2016-03-02 |
Family
ID=55394468
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201520876580.0U Active CN205067935U (zh) | 2015-11-05 | 2015-11-05 | 一种阵列基板及显示装置 |
Country Status (3)
Country | Link |
---|---|
US (2) | US11493813B2 (zh) |
CN (1) | CN205067935U (zh) |
WO (1) | WO2017076153A1 (zh) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2017076153A1 (zh) * | 2015-11-05 | 2017-05-11 | 京东方科技集团股份有限公司 | 阵列基板及显示装置 |
CN112437985A (zh) * | 2019-06-25 | 2021-03-02 | 京东方科技集团股份有限公司 | 阵列基板、显示器装置和制造阵列基板的方法 |
CN113219734A (zh) * | 2020-01-21 | 2021-08-06 | 松下液晶显示器株式会社 | 液晶显示面板 |
CN113767323A (zh) * | 2020-04-01 | 2021-12-07 | 京东方科技集团股份有限公司 | 阵列基板和显示装置 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20020042898A (ko) * | 2000-12-01 | 2002-06-08 | 구본준, 론 위라하디락사 | 액정표시장치용 어레이기판과 그 제조방법 |
KR100508000B1 (ko) * | 2002-08-27 | 2005-08-17 | 엘지.필립스 엘시디 주식회사 | 액정표시장치용 어레이기판과 그 제조방법 |
KR100887997B1 (ko) * | 2002-12-26 | 2009-03-09 | 엘지디스플레이 주식회사 | 기생 용량 편차가 최소화된 액정 표시 장치용 박막트랜지스터 |
KR100519372B1 (ko) * | 2002-12-31 | 2005-10-07 | 엘지.필립스 엘시디 주식회사 | 액정표시장치 및 그 제조방법 |
JP2005084416A (ja) * | 2003-09-09 | 2005-03-31 | Sharp Corp | アクティブマトリクス基板およびそれを用いた表示装置 |
US7688392B2 (en) * | 2006-04-06 | 2010-03-30 | Chunghwa Picture Tubes, Ltd. | Pixel structure including a gate having an opening and an extension line between the data line and the source |
CN100451796C (zh) | 2006-12-26 | 2009-01-14 | 友达光电股份有限公司 | 薄膜晶体管结构 |
TWI402596B (zh) * | 2009-10-01 | 2013-07-21 | Chunghwa Picture Tubes Ltd | 具有電容補償的畫素結構 |
CN102254917B (zh) * | 2011-07-07 | 2014-05-21 | 深圳市华星光电技术有限公司 | 薄膜晶体管阵列基板及其制法 |
CN103412449B (zh) * | 2013-07-23 | 2015-11-18 | 合肥京东方光电科技有限公司 | 一种阵列基板及其制作方法、显示装置 |
CN203870366U (zh) * | 2014-06-12 | 2014-10-08 | 京东方科技集团股份有限公司 | 一种阵列基板及显示装置 |
CN104007594B (zh) * | 2014-06-17 | 2017-12-29 | 深圳市华星光电技术有限公司 | Tft阵列基板结构 |
KR102196451B1 (ko) * | 2014-06-20 | 2020-12-30 | 삼성디스플레이 주식회사 | 액정 표시 장치 |
KR20160039725A (ko) * | 2014-10-01 | 2016-04-12 | 삼성디스플레이 주식회사 | 박막 트랜지스터 표시판 |
CN205067935U (zh) | 2015-11-05 | 2016-03-02 | 京东方科技集团股份有限公司 | 一种阵列基板及显示装置 |
-
2015
- 2015-11-05 CN CN201520876580.0U patent/CN205067935U/zh active Active
-
2016
- 2016-10-11 WO PCT/CN2016/101767 patent/WO2017076153A1/zh active Application Filing
- 2016-10-11 US US15/521,503 patent/US11493813B2/en active Active
-
2022
- 2022-08-18 US US17/890,451 patent/US20230017104A1/en active Pending
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2017076153A1 (zh) * | 2015-11-05 | 2017-05-11 | 京东方科技集团股份有限公司 | 阵列基板及显示装置 |
US11493813B2 (en) | 2015-11-05 | 2022-11-08 | Boe Technology Group Co., Ltd. | Array substrate and display device |
CN112437985A (zh) * | 2019-06-25 | 2021-03-02 | 京东方科技集团股份有限公司 | 阵列基板、显示器装置和制造阵列基板的方法 |
CN112437985B (zh) * | 2019-06-25 | 2024-02-13 | 京东方科技集团股份有限公司 | 阵列基板、显示器装置和制造阵列基板的方法 |
CN113219734A (zh) * | 2020-01-21 | 2021-08-06 | 松下液晶显示器株式会社 | 液晶显示面板 |
CN113219734B (zh) * | 2020-01-21 | 2023-09-05 | 松下电器(美国)知识产权公司 | 液晶显示面板 |
CN113767323A (zh) * | 2020-04-01 | 2021-12-07 | 京东方科技集团股份有限公司 | 阵列基板和显示装置 |
CN113767323B (zh) * | 2020-04-01 | 2023-10-20 | 京东方科技集团股份有限公司 | 阵列基板和显示装置 |
Also Published As
Publication number | Publication date |
---|---|
US11493813B2 (en) | 2022-11-08 |
US20230017104A1 (en) | 2023-01-19 |
WO2017076153A1 (zh) | 2017-05-11 |
US20170307949A1 (en) | 2017-10-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN107490913B (zh) | 阵列基板、显示面板及显示装置 | |
CN102629052B (zh) | 一种液晶显示面板及其驱动方法、液晶显示器件 | |
US10050061B2 (en) | Array substrate and manufacturing method thereof, display device | |
CN205067935U (zh) | 一种阵列基板及显示装置 | |
CN104777933A (zh) | 一种阵列基板、触控显示面板及显示装置 | |
JP2001083540A (ja) | ワイドビューアングル液晶ディスプレイの電極構造の製作方法 | |
CN107065287B (zh) | 一种显示面板和显示装置 | |
CN105117069B (zh) | 一种阵列基板、触控显示面板及触控显示装置 | |
CN105824161A (zh) | 一种液晶显示面板及液晶显示装置 | |
CN106526997A (zh) | 阵列基板、显示面板及显示装置 | |
CN105404062A (zh) | 阵列基板和显示装置 | |
CN206258650U (zh) | 一种液晶显示面板及显示装置 | |
US10204929B2 (en) | Array substrate and display device | |
CN205485145U (zh) | 一种显示面板和电子设备 | |
CN205427404U (zh) | 阵列基板、显示装置 | |
CN104950540A (zh) | 阵列基板及其制作方法和显示装置 | |
CN106873225A (zh) | 阵列基板、显示面板、显示装置和阵列基板驱动方法 | |
CN103926768B (zh) | 一种阵列基板、显示面板和显示装置 | |
CN106940502A (zh) | 一种液晶显示面板及显示装置 | |
CN104698699A (zh) | 阵列基板、显示面板、显示装置及其驱动方法 | |
CN204331211U (zh) | 一种显示模组及显示装置 | |
WO2016011716A1 (zh) | 阵列基板和显示装置 | |
CN104733478A (zh) | 一种阵列基板及其制作方法、显示装置 | |
CN103913910A (zh) | 一种像素单元结构、阵列基板结构及液晶显示装置 | |
CN203773203U (zh) | 一种阵列基板及显示装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |