CN204464271U - 封装体集成电路结构 - Google Patents
封装体集成电路结构 Download PDFInfo
- Publication number
- CN204464271U CN204464271U CN201520174526.1U CN201520174526U CN204464271U CN 204464271 U CN204464271 U CN 204464271U CN 201520174526 U CN201520174526 U CN 201520174526U CN 204464271 U CN204464271 U CN 204464271U
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- integrated circuit
- packaging body
- substrate
- circuit structure
- conductive adhesive
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Wire Bonding (AREA)
Abstract
本实用新型公开了一种封装体集成电路结构,包括集成电路与基板,集成电路与基板间以助焊剂施以铜柱上,并将两者焊接相连,基板上方涂有非导电胶(NCP),基板下方设有锡球,即构成一封装体集成电路结构,藉由非导电胶(NCP)可消除基板表面有机保焊膜OSP(Organic Surface Protectant),并改善锡冷焊状况;并可阻碍助焊剂 (Flux)热扩散,提升树脂与铜垫结合能力,非导电胶(NCP)与集成电路面之间间隙由模压树脂填满,可显著减少封装流程,增加集成电路封装适用率、降低封装的成本及节省工时。
Description
技术领域
本实用新型涉及一种集成电路结构,特别是指一种封装体集成电路结构。
背景技术
目前,封装体集成电路结构,均采回焊(FC)封装体采用烘烤曲线 (Curing profile) 熔接锡,锡熔后焊接(FC)封装体采用高于锡熔点(218度)定高温直接焊接;回焊(FC)封装体采用上集成电路, 回焊烘烤, 助焊剂清洗三道制程。其缺点是成本高,费工费时,且回焊(FC) 封装体只适用于宽间隙(Wide Pitch) bumps 芯片封装,不适合于细间隙(Fine Pitch) bumps 芯片封装,因此适用率不高。
本实用新型的设计人以从事封装体集成电路及其相关产品制造多年深知其优缺点,乃致力于改良其缺点,期使封装体集成电路结构更为实用,符合使用者的需求,经由多年试验改良,终于创作出本实用新型一种封装体集成电路结构。
实用新型内容
本实用新型的目的在于提供一种封装体的集成电路,其可减少封装流程,增加封集成电路封装适用率、降低封装的成本及节省工时。
为了达成上述目的,本实用新型的解决方案是:
一种封装体集成电路结构,其特征在于,包括:一集成电路及涂有非导电胶的基板,集成电路与基板之间以沾有助焊剂的铜柱焊接相连,基板下方设有多个锡球,形成一封装体集成电路结构。
采用上述结构后,本实用新型封装体集成电路是于可于基板表面涂一层非导电胶(NCP),因涂非导电胶为胶材涂印机的内建功能,故不影响工时,但与习用集成电路封装制程比较,因为可减少了回焊烘烤, 助焊剂清洗二道制程,故可以减少封装流程,可适用于细间隙芯片封装,增加封集成电路封装适用率、降低封装的成本及节省工时。
本实用新型的集成电路与基板之间以铜柱相连接,集成电路凸点沾有助焊剂,然后施以锡熔后焊接(MTD),兹因基板上方涂有非导电胶(NCP),故可于焊接时,可消除基板表面OSP(Organic Surface Protectant) 有机保焊膜,并改善锡冷焊状况。
本实用新型与习用封装体的集成电路相较,习用的集成电路与基板连接须采用,回焊(FC)封装体烘烤曲线 (Curing profile) 熔接锡,锡熔后焊接(FC)封装体采用高于锡熔点(218度)定高温直接焊接;回焊(FC)封装体采用沾助焊剂在集成电路上回焊烘烤, 助焊剂清洗三道制程;本实用新型锡熔后焊接(FC)封装体,于基板上方涂有非导电胶(NCP)采用锡熔后焊接一道制程,故可节省工时与成本。
附图说明
图1为本实用新型分解示意图,说明主要组件及其相对关系;
图2为本实用新型较佳实施例的立体结构示意图;
图3为本实用新型较佳实施例的结构剖视图。
其中:
集成电路1
助焊剂2
非导电胶(NCP)3
基板4
锡球5。
具体实施方式
为了进一步解释本实用新型的技术方案,下面通过具体实施例来对本实用新型进行详细阐述。
本实用新型为一种封装体集成电路结构,随附图例示的本实用新型具体实施例及其构件中,所有关于前与后、左与右、顶部与底部、上部与下部、以及水平与垂直的参考,仅用于方便进行描述,并非限制本实用新型,亦非将其构件限制于任何位置或空间方向。下述实施例和图式并非限定本实用新型的产品形态和式样,任何所属技术领域的普通技术人员对其所做的适当变化或修饰,皆应视为不脱离本实用新型的专利范畴。
如图1至图3,本实用新型一种封装体集成电路结构,包括集成电路1及基板4,集成电路1与基板4间以助焊剂2施以铜柱上,并将两者焊接相连、而基板上方涂有非导电胶(NCP)3,基板下方设有锡球5,即构成一封装体集成电路结构。
Claims (1)
1.一种封装体集成电路结构,其特征在于,包括:一集成电路及涂有非导电胶的基板,集成电路与基板之间以沾有助焊剂的铜柱焊接相连,基板下方设有多个锡球,形成一封装体集成电路结构。
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105633047A (zh) * | 2016-03-10 | 2016-06-01 | 三星半导体(中国)研究开发有限公司 | 半导体封装件及其制造方法 |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN105633047A (zh) * | 2016-03-10 | 2016-06-01 | 三星半导体(中国)研究开发有限公司 | 半导体封装件及其制造方法 |
CN105633047B (zh) * | 2016-03-10 | 2018-07-06 | 三星半导体(中国)研究开发有限公司 | 半导体封装件及其制造方法 |
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