CN203134793U - Novel LED chip - Google Patents
Novel LED chip Download PDFInfo
- Publication number
- CN203134793U CN203134793U CN2012207055069U CN201220705506U CN203134793U CN 203134793 U CN203134793 U CN 203134793U CN 2012207055069 U CN2012207055069 U CN 2012207055069U CN 201220705506 U CN201220705506 U CN 201220705506U CN 203134793 U CN203134793 U CN 203134793U
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- CN
- China
- Prior art keywords
- led chip
- chip
- common
- new led
- luminous
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
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- Led Device Packages (AREA)
Abstract
The utility model relates to a novel LED chip and improves the scribing and splintering processes in LED chip cutting process. A plurality of conventional small LED chip structures are maintained on a same substrate to maintain undercurrent power supply and high current density during working of the chip. The LED chip is directly encapsulated on a highly thermal-conductive substrate and connected with an electrode through weld lines, and a line layer is arranged on the highly thermal-conductive substrate. Based on present process flow, the novel LED chip substantially simplifies LED module group packaging processes and improves production efficiency.
Description
Technical field
The present invention relates to the semiconductor light emitting technical field.
Background technology
Present LED technical field, after the making flow process of chip through scribing and sliver, generally form independently various criterion size, need in the practical application according to power and heat radiation requirement each little chip to be encapsulated, for example for 1 * 1 square millimeter chip, 64 square millimeters light-emitting area then need be carried out solid brilliant process 64 times at 64 chips if desired, what need is consuming time longer, has reduced production efficiency; And if monoblock chip customized 64 square millimeters, then because the current density that needs during its work is bigger, job stability and thermal diffusivity lag far behind the combination of 1 * 1 square millimeter of little chip.Therefore need a kind of can enhancing productivity badly, can guarantee the New LED chip of job stability simultaneously again.
Summary of the invention
For overcoming the lower problem of operating efficiency in the existing little chip encapsulation flow process, main purpose of the present invention designs a kind of New LED chip exactly, enhances productivity, and keeps the stability of LED module work simultaneously.
Preferably, described a kind of New LED chip, different chip light emittings minizone arranges the border on same substrate, and all luminous minizones have common substrate, described each luminous minizone is connected to power supply respectively on the electrode by bonding wire, realizes that led chip is luminous.
Preferably, described a kind of New LED chip, common suprabasil chip light emitting face has been divided into independently minizone, and each interval links to each other with electrode by bonding wire, realizes independently-powered work.
Preferably, described a kind of New LED chip is between suprabasil each individual cell, for being total to anode construction or common cathode structure.
Preferably, described a kind of New LED chip, between common suprabasil each individual cell, its intrinsic luminescence center wavelength is identical, by plating fluorescent material, realizes the light outgoing of different centre wavelengths between each individual cell.
Description of drawings
Fig. 1 is led chip encapsulating structure schematic diagram in the present technology.
Fig. 2 is the structural representation of a kind of New LED chip encapsulation of the present invention.
The main element description of symbols
The 1:LED chip.
2: bonding wire.
3: electrode.
Embodiment
Below by embodiment, and by reference to the accompanying drawings, technical scheme of the present invention is carried out specific description.
Fig. 1 has showed the structural representation that single little chip encapsulates respectively in the present technology, and led chip among the figure (1) quantity has 4, each led chip (1) need be encapsulated on the heat-radiating substrate, needs the encapsulation flow process altogether 4 times.Each led chip (1) is connected with electrode (3) by bonding wire (2), realizes independently-powered.
Fig. 2 has showed a kind of New LED chip of the present invention, dotted line is represented different chip light emitting section boundaries on the same substrate among the figure, the chip light emitting face is divided into 4, but 4 minizones have common substrate, it is same integral body physically, therefore only need one-time positioning is carried out in substrate, can realize the location of four luminous minizones, simplified the encapsulation flow process.Each little light-emitting area is connected on the electrode by bonding wire among the figure, realizes power supply respectively, and the bonding wire principle is similar to Example 1.
By above execution mode, be not difficult to find out the design that the utility model proposes a kind of New LED chip, can increase substantially the encapsulation flow process of LED module.In the present design, the quantity of luminous minizone can change in each substrate, be not limited to show in above-described embodiment 4.
Above embodiment only is the design of explanation the technology of the present invention and characteristics; its purpose is to allow the people that is familiar with this technology understand content of the present invention and is implemented; can not limit protection scope of the present invention with this, all little variations such as spirit essence is done according to the present invention or modify all are encompassed in protection scope of the present invention.
Claims (4)
1. New LED chip, it is characterized in that: described led chip, different chip light emittings minizone arranges the border on same substrate, all luminous minizones have common substrate, described each luminous minizone is connected to power supply respectively on the electrode by bonding wire, realizes that led chip is luminous.
2. a kind of New LED chip according to claim 1 is characterized in that: common suprabasil chip light emitting face, be divided into independently minizone, and each interval links to each other with electrode by bonding wire, realizes independently-powered work.
3. a kind of New LED chip according to claim 2 is characterized in that: between suprabasil each individual cell, for being total to anode construction or common cathode structure.
4. a kind of New LED chip according to claim 2 is characterized in that: between common suprabasil each individual cell, its intrinsic luminescence center wavelength is identical, by plating fluorescent material, realizes the light outgoing of different centre wavelengths between each individual cell.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012207055069U CN203134793U (en) | 2012-12-19 | 2012-12-19 | Novel LED chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2012207055069U CN203134793U (en) | 2012-12-19 | 2012-12-19 | Novel LED chip |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203134793U true CN203134793U (en) | 2013-08-14 |
Family
ID=48942739
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2012207055069U Expired - Fee Related CN203134793U (en) | 2012-12-19 | 2012-12-19 | Novel LED chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203134793U (en) |
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2012
- 2012-12-19 CN CN2012207055069U patent/CN203134793U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130814 Termination date: 20181219 |