CN203133271U

CN203133271U - Multi-channel coherent frequency synthesizer of high-frequency ground wave radar

Info

Publication number: CN203133271U
Application number: CN 201320118836
Authority: CN
Inventors: 万显荣; 方亮
Original assignee: Wuhan University WHU
Current assignee: Wuhan University WHU
Priority date: 2013-03-15
Filing date: 2013-03-15
Publication date: 2013-08-14
Anticipated expiration: 2023-03-15

Abstract

The utility model relates to the technical field of a frequency synthesizer and especially relates to a multi-channel coherent frequency synthesizer of a high-frequency ground wave radar. A four-channel high-speed digital analog converter AD9148 is adopted by the frequency synthesizer to be a main body for generation of waveforms, a high-speed SRAM is employed to serve as a waveform data buffer memory circuit, and an ARM and an FPG are adopted to be control cores. The advantages of the frequency synthesizer are that: firstly, through utilization of multiple channels with excellent coherence, both a single-frequency signal and a multi-frequency signal containing a plurality of frequency components can be independently obtained, so that the frequency synthesizer is quite suitable for a multi-channel radar system; secondly, processing of most signals is moved out of hardware, such that sources of stray of output signals are minimized and the signal frequency spectrum purity is effectively improved; thirdly, any complicated waveforms with high precision and stability can be generated, the frequency covers high frequency band, and the waveforms are quite convenient and flexible to adjust; and fourthly, a concise hardware structure helps to guarantee stability and reliability of the system, and the frequency synthesizer exhibits the characteristics of a general hardware platform.

Description

A kind of high-frequency ground wave radar hyperchannel coincidence frequency compositor

Technical field

The utility model relates to the frequency synthesizer technical field, relates in particular to a kind of high-frequency ground wave radar hyperchannel coincidence frequency compositor.

Background technology

Frequency synthesizer is the important component part of high-frequency ground wave radar, and it has determined various technical parameters and the detection performance of radar to a great extent, has also determined task and the purposes of radar simultaneously.Current high performance radar frequency source is all realized by frequency synthesis technique, is namely carried out computing by one or more high stabilities and high-precision reference frequency source and obtain required signal frequency.

What frequency synthesis technique dropped into application at first is direct frequency synthesis (DS) technology, DS has advantages such as short, nearly carrier frequency phase noise performance of frequency agility time is good, but because a large amount of links such as frequency multiplication, frequency division, mixing and filtering that adopt, complex structure, volume are big, cost is higher, be easy to generate too much spuious component, be difficult to satisfy the requirement of the purity of frequency spectrum.

Frequency synthesis (IS) technology is owing to used this inertia link of phaselocked loop indirectly, and locking time is longer, can not satisfy the requirement of frequency agility, and if realizes that higher frequency resolution need reduce the phase noise index.

Direct Digital frequency synthesis (DDS) technology is a kind of waveform generation technique of total digitalization, and its frequency resolution is high, the frequency hopping time is short, frequency stability is high.Special-purpose integrated DDS chip frequency can reach 1GHz at present, obviously being better than traditional waveform generation scheme aspect cost, volume, the weight, has obtained widespread use in system for high-frequency earth wave radar.The weak point that adopts the higher-frequency radar frequency synthesizer of DDS technology is that the waveform adjustment is difficult, the spuious complex distribution of frequency spectrum of output signal, and the spuious source of DDS and inhibition thereof remain the hot subject of current frequency synthesis area research.

Utilize the higher-frequency radar frequency synthesizer of Digital Up Convert principle design that good application prospects is also arranged.Since adopted waveform library and digital mixing, the waveform flexibility and changeability that Digital Upward Frequency Conversion Technology produces, and signal frequency degree of stability and resolution height can be realized that the victory of frequency becomes, but still have the spuious problem of output signal.

In addition, Direct Digital Waveform synthetic (DDWS) is read the Wave data that is stored in the high-speed memory with certain sampling rate, through D/A conversion output simulating signal.This method principle is simple, simple for structure, can produce the random waveform signal, effectively improves the purity of frequency spectrum of signal.Weak point is that the slewing rate of the capacity of storer and speed and D/A converter is had relatively high expectations, in many application scenarios even can't realize.Under the background that current microelectric technique and special digital integrated chip technology develop rapidly, these contradictions progressively are eased or solve.(in 3 ~ 30MHz) radar systems, existing high-speed DAC device and high-speed large capacity memory can satisfy the requirement of hardware system and be applied to engineering practice at high band.

And in the Project Realization of hyperchannel multifrequency radar system, our hope frequency compositor can be realized multi channel signals output, and not only the coherence will get well between the passage, and can realize the synthetic of multiple-frequency signal.

Summary of the invention

The purpose of this utility model provides a kind of high-frequency ground wave radar hyperchannel coincidence frequency compositor, this frequency synthesizer adopts the Direct Digital Waveform synthetic technology, can realize that multi channel signals produces, the waveform of each passage can independently be controlled, the simple signal weighted stacking of a plurality of independent controls can get one tunnel composite signal that contains multiple frequency content.

For achieving the above object, the utility model adopts following technical scheme:

A kind of high-frequency ground wave radar hyperchannel coincidence frequency compositor is characterized in that, comprising: the Waveform generating circuit that includes multi-channel high-speed DAC module; The Wave data buffer circuit that includes the high-speed SRAM module; The governor circuit that includes ARM chip and fpga chip; Described Waveform generating circuit all links to each other with the Wave data buffer circuit with governor circuit, and governor circuit links to each other with the Wave data buffer circuit.

At above-mentioned a kind of high-frequency ground wave radar hyperchannel coincidence frequency compositor, described Waveform generating circuit comprises high speed LVDS driving circuit, multi-channel high-speed DAC module, difference commentaries on classics single-end circuit and totalizer; High speed LVDS driving circuit links to each other with the data-in port of multi-channel high-speed DAC module, fpga chip links to each other with multi-channel high-speed DAC modules configured port, the analog output of multi-channel high-speed DAC module connects difference changes the single-end circuit input end, difference is changeed the single-end circuit output terminal and is not only connected the input end of totalizer but also can export simple signal separately, totalizer output multiple-frequency signal.

At above-mentioned a kind of high-frequency ground wave radar hyperchannel coincidence frequency compositor, described Wave data buffer circuit comprises four SRAM modules, the address of these four SRAM modules, DCB link to each other with fpga chip simultaneously, and the data bus of four SRAM modules links to each other with high speed LVDS driving circuit simultaneously simultaneously.

At above-mentioned a kind of high-frequency ground wave radar hyperchannel coincidence frequency compositor, described governor circuit comprises fpga chip, ARM chip and FLASH storer; The address of described ARM chip, DCB link to each other with fpga chip simultaneously, and the ARM chip extends out the FLASH storer; Fpga chip inside comprises SRAM interface module and DAC interface module.

The utlity model has following advantage and good effect: 1 uses the good a plurality of passages of coherence, can independently obtain the multiple-frequency signal that simple signal also can obtain containing multiple radio-frequency component, is highly suitable for the hyperchannel radar system; 2 shift out hardware with most of signal processing, have reduced the source of the spuious generation of output signal, have effectively improved signal spectrum purity; 3 can produce very any complicated wave form of high precision and degree of stability, and frequency covers high band, and the waveform adjustment is very convenient, flexible; 4 simple hardware configuration have guaranteed stability and the reliability of system, have the feature of general hardware platform.

Description of drawings

Fig. 1 is system chart of the present utility model.

Fig. 2 is main body circuit connection diagram of the present utility model.

Fig. 3 is fpga chip internal SRAM interface module of the present utility model and DAC interface module work synoptic diagram.

Embodiment

The utility model is described in further detail by reference to the accompanying drawings with specific embodiment below.

Referring to Fig. 1, Fig. 2, the utility model comprises the Waveform generating circuit based on multi-channel high-speed DAC module, based on the Wave data buffer circuit of high-speed SRAM module, based on the governor circuit of ARM chip and fpga chip.

In the present embodiment, multi-channel high-speed DAC module is selected the four-way digital to analog converter AD9148 of ADI company for use, and this chip has 16 conversion accuracies, and the sampling rate up to 1GSPS is provided.It also has the signal handling property when keeping two-forty, and first-class dynamic range and low noise, low power capabilities are provided.AD9148 has simplified the clock design proposal of a plurality of ALT-CH alternate channels, and the consistance of phase place is easier to be guaranteed.Before AD9148 effectively works, need dispose it by the SPI mouth, configuration parameter comprises: data entry mode parameter, data routing parameter, timing parameter etc.

In the present embodiment, SRAM selects the IS61WV102416 of ISSI company for use, capacity is 1M * 16bit, the highest access rate is up to 125MHz, according to the Nyquist sampling thheorem, realize that high band (launch, and waveform sampling speed will be higher than 60MHz, and this SRAM can satisfy this requirement by all standing of 3 ~ 30MHz) signals.SRAM1, SRAM2, SRAM3, SRAM4 are respectively applied to buffer memory passage 1,2,3,4 Wave data, when the input service of AD9148 data in the twoport pattern, SRAM1 and SRAM2 are corresponding to P1 mouth data source, SRAM3 and SRAM4 are corresponding to P2 mouth data source.

In the present embodiment, the ARM chip is selected the LPC2292 of PHILIPS Co. for use, this chip internal has the ARM7 kernel, support multiple to go up peripheral hardware, comprise external memory access, SPI, UART and CAN etc., its external memory access interface is visited SRAM by FPGA, and the SPI interface disposes AD9148 by FPGA.

In the present embodiment, fpga chip is selected the EP2C35F484 of altera corp for use, comprises SRAM interface module and AD9148 interface module.Its chip pin IO0-IO39, IO44 link to each other with LPC2292, and pin IO45-IO128 links to each other with SRAM, are used for realizing SRAM interface and the control of AD9148 interface sequence; Pin IO40-IO43 links to each other with LPC2292, and pin IO129-IO132 links to each other with AD9148, is used for realizing AD9148 configuration sequential.In FPGA, realize with hardware description language Verilog, provide very big dirigibility to system development.

Fig. 3 is fpga chip internal SRAM interface module and DAC interface module work synoptic diagram.When system works, at first ARM puts CON_9148 low, forbid the work of AD9148 interface module, ARM is by address bus ARMA[1..20 simultaneously], data bus ARMD[0..15], chip selection signal ARM_CS0, write signal ARM_WE, and SRAM visit useful signal SRAM1_SELECT, SRAM2_SELECT, SRAM3_SELECT, SRAM4_SELECT write corresponding SRAM respectively with the four-way Wave data.ARM puts high CON_9148 then, make the work of AD9148 interface module, this module produces address signal SRAM12A_IN[0..19 under the driving of DCIA clock], SRAM34A_IN[0..19], chip selection signal SRAM1_CS_IN, SRAM2_CS_IN, SRAM3_CS_IN, SRAM4_CS_IN, read signal SRAM1_OE_IN, SRAM2_OE_IN, SRAM3_OE_IN, SRAM4_OE_IN.Last SRAM interface module produces address signal SRAM12A [0..19], SRAM34A [0..19], chip selection signal SRAM1_CS, SRAM2_CS, SRAM3_CS, SRAM4_CS, read signal SRAM1_OE, SRAM2_OE, SRAM3_OE, SRAM4_OE, Wave data among SRAM1 and the SRAM2 is imported the P1 mouth of AD9148, the DCIA rising edge imports the data among the SRAM1, and the DCIA negative edge imports the data among the SRAM2; With the P2 mouth of the importing of the Wave data among SRAM3 and SRAM4 AD9148, the DCIA rising edge imports the data among the SRAM3, and the DCIA negative edge imports the data among the SRAM4.

The concrete workflow of system is as follows: before system's life's work, generate needed Wave data file by upper computer software MATLAB, download among the outer extension memory FLASH of ARM through the CAN bus then, do not lose with the power down that guarantees data.During the system life's work, at first finish a series of initialization by ARM, wait for the configuration parameter that transmits from the CAN bus then.After receiving parameter, ARM will dispose system again according to these parameters, and the waveform reproduction data are in SRAM.This moment, frequency synthesizer was ready, as long as receive the start signal of transmitted waveform, DAC just begins life's work, produces specific waveform signal.

Above disclosed only is preferred embodiment of the present utility model, can not limit the interest field of the utility model certainly with this, and therefore the equivalence of doing according to the utility model claim changes, and still belongs to protection domain of the present utility model.

Claims

1. a high-frequency ground wave radar hyperchannel coincidence frequency compositor is characterized in that, comprising: the Waveform generating circuit that includes multi-channel high-speed DAC module; The Wave data buffer circuit that includes the high-speed SRAM module; The governor circuit that includes ARM chip and fpga chip; Described Waveform generating circuit all links to each other with the Wave data buffer circuit with governor circuit, and governor circuit links to each other with the Wave data buffer circuit.

2. a kind of high-frequency ground wave radar hyperchannel coincidence frequency compositor according to claim 1 is characterized in that, described Waveform generating circuit comprises high speed LVDS driving circuit, multi-channel high-speed DAC module, difference commentaries on classics single-end circuit and totalizer; High speed LVDS driving circuit links to each other with the data-in port of multi-channel high-speed DAC module, fpga chip links to each other with multi-channel high-speed DAC modules configured port, the analog output of multi-channel high-speed DAC module connects difference changes the single-end circuit input end, difference is changeed the single-end circuit output terminal and is not only connected the input end of totalizer but also can export simple signal separately, totalizer output multiple-frequency signal.

3. a kind of high-frequency ground wave radar hyperchannel coincidence frequency compositor according to claim 2, it is characterized in that, described Wave data buffer circuit comprises four SRAM modules, the address of these four SRAM modules, DCB link to each other with fpga chip simultaneously, and the data bus of four SRAM modules links to each other with high speed LVDS driving circuit simultaneously simultaneously.

4. a kind of high-frequency ground wave radar hyperchannel coincidence frequency compositor according to claim 3 is characterized in that described governor circuit comprises fpga chip, ARM chip and FLASH storer; The address of described ARM chip, DCB link to each other with fpga chip simultaneously, and the ARM chip extends out the FLASH storer; Fpga chip inside comprises SRAM interface module and DAC interface module.