CN104660218A - Arbitrary waveform synthesizer - Google Patents
Arbitrary waveform synthesizer Download PDFInfo
- Publication number
- CN104660218A CN104660218A CN201310572632.0A CN201310572632A CN104660218A CN 104660218 A CN104660218 A CN 104660218A CN 201310572632 A CN201310572632 A CN 201310572632A CN 104660218 A CN104660218 A CN 104660218A
- Authority
- CN
- China
- Prior art keywords
- adder
- waveform
- accumulator register
- wave memorizer
- converter
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
An arbitrary waveform synthesizer belongs to the technical field of waveform synthesis, and especially relates to an arbitrary waveform synthesizer. The invention provides an arbitrary waveform synthesizer with high flexibility and a simple circuit structure. The arbitrary waveform synthesizer comprises a full adder, an accumulator register, a first adder, a second adder, a waveform memory, a D/A converter, and a low-pass filter, and is characterized in that the full adder, the accumulator register, the first adder, the second adder, the waveform memory, the D/A converter and the low-pass filter are connected in sequence, the output end of the accumulator register is connected with the input end of the full adder, and the accumulator register and the waveform memory use the same reference clock.
Description
Technical field
the invention belongs to Waveform Synthesis Technology field, particularly relate to a kind of random waveform synthesizer.
Background technology
direct digital synthesis technique (DDS) technology is a kind of new frequency synthesis technique of directly synthesizing required waveform from phase place concept.It has significant characteristic in relative bandwidth, frequency switching time, phase continuity, orthogonal output, high resolution etc., and it is increasingly extensive that these characteristics make DDS apply in radar and communication system.Herein in conjunction with existing research project, based on the general principle of DDS, the FPGA Cyclone II Ep2c8 chip of altera corp is used to complete the design of a DDS system.Herein by the principle of exposed installation meter a sinusoidal wave example.
Summary of the invention
the present invention is exactly for the problems referred to above, provides a kind of flexibility good and the simple random waveform synthesizer of circuit structure.
to achieve these goals, the present invention adopts following technical scheme, the present invention includes full adder, accumulator register, first adder, second adder, wave memorizer, D/A converter, low pass filter, its structural feature full adder, accumulator register, first adder, second adder, wave memorizer, D/A converter, low pass filter are connected successively, and accumulator register output is connected with full adder input; Accumulator register and wave memorizer adopt same reference clock.
as a kind of preferred version, the data that wave memorizer second adder of the present invention exports, as the sampling address of wave memorizer, carry out the phase-amplitude conversion of waveform.
as another kind of preferred version, D/A converter of the present invention changes into analog quantity the sinusoidal wave digital quantity that wave memorizer synthesizes.
beneficial effect of the present invention.
the DDS circuit that the present invention adopts FPGA to design, the waveform of various shape can be produced, there is very large flexibility, and circuit structure is simple, the waveform that its waveform generated generates with general waveform generator is compared, have that waveform is level and smooth, impulse-free robustness, waveform stabilization degree are high, frequency stability and resolution advantages of higher, be with a wide range of applications.
Accompanying drawing explanation
in order to make technical problem solved by the invention, technical scheme and beneficial effect clearly understand, below in conjunction with the drawings and the specific embodiments, the present invention is further elaborated.Should be appreciated that embodiment described herein only in order to explain the present invention, be not intended to limit the present invention.
fig. 1 is schematic block circuit diagram of the present invention.
Embodiment
as shown in the figure, the present invention includes full adder, accumulator register, first adder, second adder, wave memorizer, D/A converter, low pass filter, its structural feature full adder, accumulator register, first adder, second adder, wave memorizer, D/A converter, low pass filter are connected successively, and accumulator register output is connected with full adder input; Accumulator register and wave memorizer adopt same reference clock.
as a kind of preferred version, the data that wave memorizer second adder of the present invention exports, as the sampling address of wave memorizer, carry out the phase-amplitude conversion of waveform.
as another kind of preferred version, D/A converter of the present invention changes into analog quantity the sinusoidal wave digital quantity that wave memorizer synthesizes.
the operation principle of DDS produces frequency, the controllable random waveform of phase place in the mode of digital controlled oscillator.Circuit generally comprises reference clock, frequency accumulator, phase accumulator, the adder of control phase, the adder of control waveform, amplitude/phase change-over circuit, D/A transducer and low pass filter (LPF).As above shown in theory diagram, wherein K is frequency control word, P is phase control words, W is Waveform Control word, fc is reference clock frequency, and D is the word length of ROM data bit and D/A transducer.Phase accumulator adds up with step-length K under the control of clock fc, as the address of waveform ROM after the N position binary code exported is added with phase control words P, Waveform Control word W, addressing is carried out to waveform ROM, waveform ROM exports amplitude code S (n) of D position, become staircase waveform S (t) through D/A transducer, more just can obtain the signal waveform of synthesis after low pass filter is level and smooth.The signal waveform shape of synthesis depends on the amplitude code stored in waveform ROM, and therefore DDS can produce random waveform.This article mainly introduce frequency preset and regulating circuit, phase accumulator, phase control adder, Waveform Control adder, wave memorizer design and implimentation phase accumulator be made up of N position adder and the cascade of N bit register.Often carry out a clock pulse fc, frequency control word K is added with the phase data that register exports by adder, then the result after addition is delivered to the data input pin of register.The phase data that adder produces after a upper clock effect is fed back to the input of adder by register; Continue to be added with frequency control word under next clock effect to make adder.Like this, phase accumulator, under the effect of clock, carries out phase-accumulated.Will produce when the phase accumulator amount of filling it up with and once overflow, complete the action of one-period.
above content is the further description done the present invention in conjunction with concrete preferred implementation; can not assert that specific embodiment of the invention is confined to these explanations; for general technical staff of the technical field of the invention; without departing from the inventive concept of the premise; some simple deduction or replace can also be made, all should be considered as belonging to the protection range that claims that the present invention submits to are determined.
Claims (3)
1.
a kind of random waveform synthesizer, comprise full adder, accumulator register, first adder, second adder, wave memorizer, D/A converter, low pass filter, it is characterized in that full adder, accumulator register, first adder, second adder, wave memorizer, D/A converter, low pass filter are connected successively, accumulator register output is connected with full adder input; Accumulator register and wave memorizer adopt same reference clock.
2.
according to claim 1, a random waveform synthesizer, is characterized in that data that described wave memorizer second adder exports are as the sampling address of wave memorizer, carry out the phase-amplitude conversion of waveform.
3.
according to claim 1, a random waveform synthesizer, is characterized in that described D/A converter changes into analog quantity the sinusoidal wave digital quantity that wave memorizer synthesizes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310572632.0A CN104660218A (en) | 2013-11-18 | 2013-11-18 | Arbitrary waveform synthesizer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310572632.0A CN104660218A (en) | 2013-11-18 | 2013-11-18 | Arbitrary waveform synthesizer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN104660218A true CN104660218A (en) | 2015-05-27 |
Family
ID=53250980
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310572632.0A Pending CN104660218A (en) | 2013-11-18 | 2013-11-18 | Arbitrary waveform synthesizer |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN104660218A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106443095A (en) * | 2016-10-17 | 2017-02-22 | 成都前锋电子仪器有限责任公司 | DDS arbitrary wave generator |
| CN107977044A (en) * | 2018-01-17 | 2018-05-01 | 优利德科技(中国)有限公司 | A kind of DDS signal generator and its linear interpolation method |
| CN109307806A (en) * | 2018-09-21 | 2019-02-05 | 北京东方计量测试研究所 | A kind of standard signal source of high accuracy |
-
2013
- 2013-11-18 CN CN201310572632.0A patent/CN104660218A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106443095A (en) * | 2016-10-17 | 2017-02-22 | 成都前锋电子仪器有限责任公司 | DDS arbitrary wave generator |
| CN107977044A (en) * | 2018-01-17 | 2018-05-01 | 优利德科技(中国)有限公司 | A kind of DDS signal generator and its linear interpolation method |
| CN107977044B (en) * | 2018-01-17 | 2023-09-01 | 优利德科技(中国)股份有限公司 | DDS signal generator and linear interpolation method thereof |
| CN109307806A (en) * | 2018-09-21 | 2019-02-05 | 北京东方计量测试研究所 | A kind of standard signal source of high accuracy |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102882517B (en) | Device and method for generating low-distortion low-frequency sinusoidal signal | |
| CN201708773U (en) | Arbitrarywaveform generator | |
| CN102035472B (en) | Programmable digital frequency multiplier | |
| CN105718404A (en) | Square-wave generator and generating method based on FPGA | |
| CN108964660A (en) | A kind of high-resolution low-power consumption spread spectrum control circuit based on phase delay compensation | |
| CN103297047A (en) | Atomic frequency standard and servo locking method | |
| CN105871337B (en) | Improved signal generator capable of modulating in segmented mode | |
| CN104660218A (en) | Arbitrary waveform synthesizer | |
| CN203014744U (en) | Arbitrary signal generator based on AD9951 chip and FPGA | |
| CN101276002A (en) | High temperature monolithic phase programmable direct numerical frequency synthetic source | |
| CN105871339B (en) | Flexible signal generator capable of modulating in segmented mode | |
| CN102497205B (en) | Improved DDS signal generator and signal generating method | |
| CN203086442U (en) | Phase-locked fast frequency hopping source based on adder | |
| CN208689465U (en) | A kind of high-precision frequency synthesizer | |
| CN203482173U (en) | Signal generator with multipath signal superposition function | |
| CN205121246U (en) | FPGA -based DDS signal generator | |
| CN109714032A (en) | A kind of impulse wave FM circuit and frequency modulation method based on DDS | |
| CN103095297B (en) | Method for generating accurate frequency by direct digital frequency synthesizer | |
| CN105005240A (en) | Arbitrary wave generator based on off-line calculation | |
| Shan et al. | Design and implementation of a FPGA-based direct digital synthesizer | |
| CN202957806U (en) | FPGA-based DDS signal generator | |
| CN203133271U (en) | Multi-channel coherent frequency synthesizer of high-frequency ground wave radar | |
| CN203352564U (en) | Passive atom frequency scale | |
| CN113504513A (en) | Time domain nonlinear frequency modulation signal generation method | |
| Daodong et al. | Design of DDS Signal Generator Based on FPGA |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20150527 |
|
| WD01 | Invention patent application deemed withdrawn after publication |