CN203014744U

CN203014744U - Arbitrary signal generator based on AD9951 chip and FPGA

Info

Publication number: CN203014744U
Application number: CN 201220738744
Authority: CN
Inventors: 周慰君; 蔡振越; 江志明; 陈焕洵
Original assignee: Fujian Liliput Optoelectronics Technology Co Ltd
Current assignee: Fujian Liliput Optoelectronics Technology Co Ltd
Priority date: 2012-12-28
Filing date: 2012-12-28
Publication date: 2013-06-19
Anticipated expiration: 2022-12-28

Abstract

The utility model discloses an arbitrary signal generator based on an AD9951 chip and an FPGA comprising a remote machine PC module, an AD9954 chip, an FPGA module, a digital analog conversion module, a CPU, a display module, a button module used for parameter input, a clock module used to provide the FPGA module and the AD 9954 chip with the clock, a signal preprocessing module, a signal selection module, and an amplitude control module. The signal preprocessing module can be used for zero-crossing comparison of a sin wave generated by the AD9954, and can be used to output a digital square wave signal. The button module, the display module, and the remote machine PC module are connected with the CPU, which is connected with the FPGA module. The signal preprocessing module, the clock module, the digital analog conversion module, and the amplitude control module are connected with the FPGA module. The signal preprocessing module and the clock module are connected with the AD 9954 chip. An output end of the digital analog conversion module is connected with an input end of the signal selection module, and an output end of the signal selection module is connected with an input end of the amplitude control module. The arbitrary signal generator has advantages of simple structure and ability of generating signals provided with arbitrary waveforms.

Description

A kind of arbitrarily signal generating device based on AD9954 chip and FPGA

Technical field

The utility model relates to a kind of signal generator, relates in particular to a kind of arbitrarily signal generating device based on AD9954 chip and FPGA.

Background technology

Signal generator is the instrument that produces various electronic signals. and synthetic (DDS) technology of Direct Digital is from the phase place concept, provides different voltage amplitudes with different phase places, last filtering, the frequency of level and smooth output.DDS can produce random waveform and the continuous characteristics of output waveform phase place, extensively is employed in the design of signal generator.With the algorithm of FPGA analog D DS, although can produce waveform, due to the restriction that is subject to system clock, can't export the high-frequency waveform, therefore can't satisfy the demand of user's needs high-frequency waveform.

The AD9954 chip is the frequency synthesizer of the high integration of the ADI employing DDS of company technology production, and it can produce the analog sine of 200MHZ.The AD9954 chip includes 1024*32RAM, can realize High Speed Modulation, and has supported several frequency sweep mode.But because the frequency control word of AD9954 chip only has 32bit, the frequency of sine wave output is minimum can only accomplish 0.1Hz, therefore can't satisfy the requirement of low frequency waveform.

Summary of the invention

The purpose of this utility model is to provide a kind of simple in structure, arbitrarily signal generating device based on AD9954 chip and FPGA that can produce random waveform.

for achieving the above object, the utility model adopts following design, and it comprises remote machine PC module, the AD9954 chip, the FPGA module, D/A converter module, CPU, display module, be used for the key-press module that parameter input and waveform are selected, the clock module of clock is provided for FPGA module and AD9954 chip, the sine wave that the AD9954 chip is produced carried out zero balancing and exported the signal pre-processing module of digital square-wave, signal selection module and amplitude control module, described key-press module, display module is connected with CPU with remote machine PC module, and described CPU is connected with the FPGA module, described signal pre-processing module, clock module, D/A converter module, the amplitude control module is connected with the FPGA module, described signal pre-processing module, clock module also is connected with the AD9954 chip, and the output of described D/A converter module connects the input of signal selection module, and the output of described signal selection module connects the input of amplitude control module.

Described FPGA module is provided with and comprises Clock management module, control module and DDS administration module, and described control module is connected with the Clock management module respectively with the DDS administration module.

Described signal generator also comprises communication module, and described communication module is connected with CPU, and described communication module comprises USB, LAN, gpib interface.

Described signal generator also comprises memory module, and described memory module is connected with the FPGA module.

Described clock module is active crystal oscillator.

Described signal pre-processing module is high speed voltage comparator.

The utility model adopts above design, can produce the sine wave of 1KHZ～200Mhz by the AD9954 chip, the FPGA module coordinates with D/A converter module, and adopts the DDS algorithm, can produce the signal of other waveforms, and then realize producing arbitrary signal; By design key-press module and display module, make that the user's is more convenient to operate; By establishing remote machine PC module, realized remote operation.

Description of drawings

Below in conjunction with the drawings and specific embodiments, the utility model is described in further detail:

Fig. 1 is the utility model structural representation.

Embodiment

as shown in Figure 1, the utility model comprises remote machine PC module 1, AD9954 chip 2, FPGA module 3, D/A converter module 4, CPU 5, display module 6, be used for the key-press module 7 that parameter input and waveform are selected, the clock module 8 of clock is provided for FPGA module 3 and AD9954 chip 2, the sine wave that the AD9954 chip is produced carried out zero balancing, and the signal pre-processing module 9 of output digital square-wave, signal selection module 10 and amplitude control module 11, described key-press module 7, display module 6 is connected with CPU 5 with remote machine PC module 1, and described CPU 5 is connected with FPGA module 3, described signal pre-processing module 9, clock module 8, D/A converter module 4, amplitude control module 11 is connected with FPGA module 3, described signal pre-processing module 9, clock module 8 also is connected with AD9954 chip 2, and the output of described D/A converter module 4 connects the input of signal selection module 10, and the output of described signal selection module 10 connects the input of amplitude control module 11.

Described FPGA module 3 is provided with and comprises Clock management module 31, control module 32 and DDS administration module 33, and described control module 32 is connected with Clock management module 31 respectively with DDS administration module 33.

Described signal generator also comprises communication module 12, and described communication module 12 is connected with CPU 5, and described communication module 12 comprises USB, LAN, gpib interface.

Described signal generator also comprises memory module 13, and described memory module 13 is connected with FPGA module 3.

Described clock module 8 is active crystal oscillator.

Described signal pre-processing module 9 is high speed voltage comparator.

Operation principle of the present utility model is as follows:

1) FPGA module 3, D/A converter module 4 are cores of whole signal generator with AD9954 chip 2, have realized producing all waveforms of signal generator.AD9954 chip 2 is for generation of the sine wave of 1KHZ ~ 200Mhz, and FPGA module 3 coordinates with D/A converter module 4, adopts the DDS algorithm, for generation of other signals;

2) CPU 5 can adopt the S3C2416 of Samsung, and mainly in order to realize man-machine interaction, and its plug-in FLASH (nonvolatile memory) can be used for depositing downloading of FPGA module 3, can effectively dwindle the required board space of configuration;

3) key-press module 7, display module 6, coordinate with CPU 5 and realize that mainly waveform is selected, the parameter input, and the function such as random wave waveform compilation makes user's operation more convenient;

4) communication module 12 is articulated on CPU 5, realizes USB, LAN, the driver of GPIB, like this can with long-range PC module 1 or other device talk;

5) clock module 8 is selected high-precision active crystal oscillators, for FPGA module 3 and AD9954 chip 2 provide clock;

6) signal pre-processing module 9 is made of high-speed comparator, and high speed voltage comparator carried out zero balancing to the sine wave that AD9954 chip 2 produces, and the output digital square-wave offers FPGA module 3;

7) Clock management module 31 is used for producing square wave and impulse wave, and clock is provided for D/A converter module 4, produces waveform;

8) signal selection module 10 is to select different signals to enter amplitude control module 11.Be sine wave more than 1KHZ when the user selects waveform, signal selection module 10 selects the output signal of AD9954 chips 2 to enter amplitude control module 11; Be square wave or random wave when the user selects waveform, signal selection module 10 will select square-wave signal to enter amplitude control module 11; When the user selects other signals, signal selection module 10 will select the output signal of D/A converter module 4 to enter amplitude control module 11;

9) amplitude control module 11 is according to the amplitude information of user's input, exports corresponding range value;

10) storage module 13 formulas are used for placing the random waveform data of user's input, realize the functions such as data are preserved, called, deletion;

11) remote machine PC module 1 coordinates communication module, can realize the parameter input of user's request, allows user's remote control signal generator on PC.

Claims

1. arbitrarily signal generating device based on AD9954 chip and FPGA, it is characterized in that: it comprises remote machine PC module, the AD9954 chip, the FPGA module, D/A converter module, CPU, display module, the key-press module that is used for the parameter input, the clock module of clock is provided for FPGA module and AD9954 chip, the sine wave that the AD9954 chip is produced carried out zero balancing and exported the signal pre-processing module of digital square-wave, signal selection module and amplitude control module, described key-press module, display module is connected with CPU with remote machine PC module, and described CPU is connected with the FPGA module, described signal pre-processing module, clock module, D/A converter module, the amplitude control module is connected with the FPGA module, described signal pre-processing module, clock module also is connected with the AD9954 chip, and the output of described D/A converter module connects the input of signal selection module, and the output of described signal selection module connects the input of amplitude control module.

2. a kind of arbitrarily signal generating device based on AD9954 chip and FPGA according to claim 1, it is characterized in that: described FPGA module is provided with and comprises Clock management module, control module and DDS administration module, and described control module is connected with the Clock management module respectively with the DDS administration module.

3. a kind of arbitrarily signal generating device based on AD9954 chip and FPGA according to claim 1, it is characterized in that: described signal generator also comprises communication module, described communication module is connected with CPU, and described communication module comprises USB, LAN, gpib interface.

4. according to claim 2 or 3 described a kind of arbitrarily signal generating devices based on AD9954 chip and FPGA, it is characterized in that: described signal generator also comprises memory module, described memory module is connected with the FPGA module.

5. a kind of arbitrarily signal generating device based on AD9954 chip and FPGA according to claim 1, it is characterized in that: described clock module is active crystal oscillator.

6. a kind of arbitrarily signal generating device based on AD9954 chip and FPGA according to claim 1, it is characterized in that: described signal pre-processing module is high speed voltage comparator.