CN203800905U - Arbitrary waveform generation device - Google Patents
Arbitrary waveform generation device Download PDFInfo
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- CN203800905U CN203800905U CN201420211177.1U CN201420211177U CN203800905U CN 203800905 U CN203800905 U CN 203800905U CN 201420211177 U CN201420211177 U CN 201420211177U CN 203800905 U CN203800905 U CN 203800905U
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Abstract
The utility model discloses an arbitrary waveform generation device, which comprises a touch screen, an on-chip system, a synchronous dynamic random access memory, a Flash memory and a digital-analog switching channel. The on-chip system comprises an embedded processor and a direct digital synthesizer; a bus connection is adopted between the on-chip system and the touch screen, the synchronous dynamic random access memory, the Flash memory and the digital-analog switching channel; the touch screen is used for inputting waveform data and frequency control signals; the embedded processor is used for carrying out analysis and processing on data stored in the Flash memory and the processed waveform data are stored in the synchronous dynamic random access memory; and the direct digital synthesizer is used for carrying out digital control modulation on the waveform data stored in the synchronous dynamic random access memory and outputting the data to the digital-analog switching channel for digital analog switching and outputting the switched signals to an oscilloscope. When the technical scheme of the utility model is adopted, human-computer interaction can be better realized, and the actual operation efficiency of a user can be greatly improved especially in several teaching experiment situations.
Description
Technical field
The utility model relates to electronic measurements field, is specifically related to a kind of optional waveform generator.
Background technology
AWG (Arbitrary Waveform Generator) is a kind of important signal source, is widely used in electronic circuit, automatically controls and the field such as scientific experiment, and prior art AWG (Arbitrary Waveform Generator) mainly completes by instrument panel keyboard operation; Also have and adopt the control interface of PC to carry out incoming wave shape parameter, PC is given SOC (system on a chip) by serial communication transfer of data, and data send to digital-to-analogue conversion (DAC) module to carry out digital-to-analogue conversion after SOC (system on a chip) is processed, and output to display waveform in oscilloscope.There is defect aspect following two in prior art:
(1) adopt keyboard or PC input, use inconvenience, lack good interactive capability;
(2) with PC, produce random waveform and need to write professional software, increased workload; And PC and SOC (system on a chip) adopt serial port easily to go out mistake.
Therefore, for the above-mentioned defect existing in currently available technology, be necessary to study in fact, so that a kind of scheme to be provided, solve the defect existing in prior art.
Utility model content
In order to overcome the defect of above-mentioned prior art, the utility model provides a kind of optional waveform generator of being inputted by touch-screen, realized better man-machine interaction, the parameter that only need to input the display waveform of wanting on touch-screen just can show in oscilloscope, greatly user-friendly.
For solving the problems of the technologies described above, the technical solution of the utility model is:
An optional waveform generator, comprises touch-screen, SOC (system on a chip), synchronous DRAM, Flash memory and dac channel; Described SOC (system on a chip) comprises flush bonding processor and direct digital synthesiser, wherein,
Between described SOC (system on a chip) and described touch-screen, synchronous DRAM, Flash memory and dac channel, adopt bus to be connected;
Described touch-screen is connected with described flush bonding processor with display device as input equipment, for incoming wave graphic data and frequency control signal;
Described Flash memory is for stored waveform data and frequency control signal;
Described flush bonding processor is used for processing being stored in the data analysis of Flash memory, and the Wave data of result is kept to described synchronous DRAM;
Described direct digital synthesiser is used for carrying out numerical control modulation to being stored in the Wave data of synchronous DRAM, and exports to dac channel;
Described dac channel is used for the output data of direct digital synthesiser to carry out digital-to-analogue conversion, and outputs signal to oscilloscope.
Preferably, also comprise the second dac channel, described SOC (system on a chip) can be exported through described the first dac channel and described the second dac channel respectively by parallel output two-way Wave data.
Preferably, to select model be the FPGA of EP3C10E144C8N to described SOC (system on a chip).
Preferably, described Flash memory is selected the storage chip EPCS16 of altera corp.
Preferably, described the first dac channel or described the second dac channel are selected the chip DAC904 of TI company.
By adopting above technical scheme, optional waveform generator of the present utility model, has realized man-machine interaction better, especially in some experimental teaching occasions, can largely improve the efficiency of user's practical operation.
Accompanying drawing explanation
Fig. 1 is the theory diagram of the utility model embodiment mono-optional waveform generator;
Fig. 2 is the theory diagram of the utility model embodiment bis-optional waveform generators;
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein is only in order to explain the utility model, and be not used in restriction the utility model.
On the contrary, the utility model contain any by claim, defined in marrow of the present utility model and scope, make substitute, modification, equivalent method and scheme.Further, for the public is had a better understanding to the utility model, in below details of the present utility model being described, detailed some specific detail sections of having described.Do not have for a person skilled in the art the description of these detail sections can understand the utility model completely yet.
Referring to Fig. 1, be depicted as the theory diagram of the optional waveform generator 10 of the utility model embodiment mono-, comprise touch-screen (11), SOC (system on a chip) (12), synchronous DRAM (13), Flash memory (14) and the first dac channel (15); SOC (system on a chip) (12) comprises flush bonding processor (121) and direct digital synthesiser (122), wherein,
Between SOC (system on a chip) (12) and touch-screen (11), synchronous DRAM (13), Flash memory (14) and the first dac channel (15), adopt bus to be connected;
Touch-screen (11) is connected with flush bonding processor (121) with display device as input equipment, for incoming wave graphic data and frequency control signal;
Flash memory (14) is for stored waveform data and frequency control signal;
Flush bonding processor (121) is for processing being stored in the data analysis of Flash memory (14), and the Wave data of result is kept to synchronous DRAM (13);
Direct digital synthesiser (122) is for carrying out numerical control modulation to being stored in the Wave data of synchronous DRAM (13), and exports to the first dac channel (15);
The first dac channel (15) is for the output data of direct digital synthesiser (122) are carried out to digital-to-analogue conversion, and outputs signal to oscilloscope.
The optional waveform generator 10 of the utility model embodiment produces waveform and comprises following step: (1) touch-screen incoming wave graphic data and frequency control signal; (2) Flash memory stores input data; (3) SOC (system on a chip) is controlled and is processed; (4) dac channel output.Between each step, by address bus, data/address bus, control bus, be connected.Touch-screen in step (1) adopts TFT touch-screen, to system, powers on and initialization, and the touch control chip on SOC (system on a chip) drive TFT touch-screen and TFT color screen are inputted random waveform data and frequency control signal on touch-screen.Step (2) is used the storage chip EPCS16 of altera corp, size is 2Mbyte, can meet the designing requirement of device, be used for storing incoming wave graphic data and the FREQUENCY CONTROL transmitting through data/address bus, it is a kind of Flash chip, have the characteristic that power down is not lost, the data of inputting when power-off and other fortuitous events appear in system so can not lost.Step (3) adopts inside to comprise the FPGA of flush bonding processor (Nios II) and direct digital synthesiser (DDS), the FPGA that the Cyclone of being III serial model No. used herein is EP3C10E144C8N, it is a kind of low-power consumption, system integration is high, the high-performance processor that cost performance is high, for user provides a large amount of I/O, multiplier etc., is similarly external memory storage interface is provided.Device utilizes the flush bonding processor (Nios II) in FPGA to carry out data and image processing to the data that are stored in Flash storage, filtering invalid signals, waveform is done after certain stretching and amplification, store data in synchronous DRAM, direct digital synthesiser carries out numerical control modulation to being stored in Wave data frequency, phase place and the amplitude of synchronous DRAM, the digital signal of output random waveform.The described dac channel output of step (4) adopts D/A translation circuit, adopts high-speed digital-analog ALT-CH alternate channel (DAC904) here, a high performance high-speed digital-analog dress die change piece that DAC904 ShiTI company releases.It has the data precision of 14bit, the highest 165MSPS switching rate.In the design, only used the high 10 of its, sampling clock is 100MHz.Such way can meet the requirement of device design completely.It carries out digital-to-analogue conversion to the digital signal of the random waveform of the output of direct digital synthesiser, and the analog signal waveform of the random waveform of formation for finally showing on oscilloscope.
Li Sa, if waveform is a kind of important waveform, is widely used in the fields such as physics teaching experiment, sensor dynamic characteristic detection and frequency measurement.Prior art adopts digital signal generator input, very inconvenient when user uses.In order to solve above technical problem, embodiment mono-has been done to further improvement.Referring to Fig. 2, be depicted as the theory diagram of the optional waveform generator 10 of the utility model embodiment bis-, root embodiment mono-compares and has also comprised the second dac channel 16, for generation of two-way random waveform.This device produce Lee's Sa as step as follows: on TFT touch-screen, select to produce different Lee's Sas as the frequency ratio button of waveform, after pressing one of them button, press the button with frequency sweep function, the input waveform producing is stored in Flash memory through data/address bus, utilize the flush bonding processor (Nios II) in FPGA to carry out data and image processing to the data that are stored in Flash memory, filtering invalid signals, waveform is done after certain stretching and amplification, store data in synchronous DRAM, direct digital synthesiser is to being stored in the Wave data frequency of synchronous DRAM, phase place and amplitude are carried out numerical control modulation, parallel characteristics due to FPGA, device is by the digital signal of output two-way random waveform, utilize two dac channels (DAC904) to carry out digital-to-analogue conversion to the digital signal of the two-way random waveform of direct digital synthesiser output, the analog signal waveform of the two-way random waveform forming is used for being connected on oscillographic X and Y passage, finally on oscilloscope, show that Lee's Sa is as waveform.
By adopting above technical scheme, the utility model adopts touch-screen to replace the control interface of PC of the prior art, user can input random waveform data and frequency control signal on touch-screen, the Wave data producing is transferred to SOC (system on a chip) by data/address bus and processes, there is better interactive capability, more meet the development of the tendency of the day, eliminate too in prior art the error message occurring while carrying out undesired serial communication because of PC and SOC (system on a chip), improved the stability of transfer of data.
The foregoing is only preferred embodiment of the present utility model; not in order to limit the utility model; all any modifications of doing within spirit of the present utility model and principle, be equal to and replace and improvement etc., within all should being included in protection range of the present utility model.
Claims (5)
1. an optional waveform generator, is characterized in that, comprises touch-screen (11), SOC (system on a chip) (12), synchronous DRAM (13), Flash memory (14) and dac channel (15); Described SOC (system on a chip) (12) comprises flush bonding processor (121) and direct digital synthesiser (122), wherein,
Between described SOC (system on a chip) (12) and described touch-screen (11), synchronous DRAM (13), Flash memory (14) and dac channel (15), adopt bus to be connected;
Described touch-screen (11) is connected with described flush bonding processor (121) with display device as input equipment, for incoming wave graphic data and frequency control signal;
Described Flash memory (14) is for stored waveform data and frequency control signal;
Described flush bonding processor (121) is for processing being stored in the data analysis of Flash memory (14), and the Wave data of result is kept to described synchronous DRAM (13);
Described direct digital synthesiser (122) is for carrying out numerical control modulation to being stored in the Wave data of synchronous DRAM (13), and exports to dac channel (15);
Described dac channel (15) is for the output data of direct digital synthesiser (122) are carried out to digital-to-analogue conversion, and outputs signal to oscilloscope.
2. optional waveform generator according to claim 1, it is characterized in that, also comprise the second dac channel (16), described SOC (system on a chip) (12) can be exported through described dac channel (15) and described the second dac channel (16) respectively by parallel output two-way Wave data.
3. optional waveform generator according to claim 1 and 2, is characterized in that, it is the FPGA of EP3C10E144C8N that described SOC (system on a chip) (12) is selected model.
4. optional waveform generator according to claim 1 and 2, is characterized in that, described Flash memory (14) is selected the storage chip EPCS16 of altera corp.
5. optional waveform generator according to claim 1 and 2, is characterized in that, described dac channel (15) or described the second dac channel (16) are selected the chip DAC904 of TI company.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420211177.1U CN203800905U (en) | 2014-04-28 | 2014-04-28 | Arbitrary waveform generation device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420211177.1U CN203800905U (en) | 2014-04-28 | 2014-04-28 | Arbitrary waveform generation device |
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| CN203800905U true CN203800905U (en) | 2014-08-27 |
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| CN201420211177.1U Expired - Fee Related CN203800905U (en) | 2014-04-28 | 2014-04-28 | Arbitrary waveform generation device |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103944538A (en) * | 2014-04-28 | 2014-07-23 | 杭州电子科技大学 | Random waveform generating device |
| CN109828631A (en) * | 2019-01-23 | 2019-05-31 | 中国科学技术大学 | Random waveform generating system |
-
2014
- 2014-04-28 CN CN201420211177.1U patent/CN203800905U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103944538A (en) * | 2014-04-28 | 2014-07-23 | 杭州电子科技大学 | Random waveform generating device |
| CN103944538B (en) * | 2014-04-28 | 2017-01-04 | 杭州电子科技大学 | A kind of optional waveform generator |
| CN109828631A (en) * | 2019-01-23 | 2019-05-31 | 中国科学技术大学 | Random waveform generating system |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140827 Termination date: 20150428 |
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| EXPY | Termination of patent right or utility model |