CN209659298U - 9kHz-6GHz radio-frequency signal source intermediate frequency hardware system and device - Google Patents
9kHz-6GHz radio-frequency signal source intermediate frequency hardware system and device Download PDFInfo
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- CN209659298U CN209659298U CN201920119735.4U CN201920119735U CN209659298U CN 209659298 U CN209659298 U CN 209659298U CN 201920119735 U CN201920119735 U CN 201920119735U CN 209659298 U CN209659298 U CN 209659298U
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Abstract
The utility model discloses a kind of 9kHz-6GHz radio-frequency signal source intermediate frequency hardware system and relevant apparatus, belong to Design of Digital Circuit and relevant control application field.It includes ARM chip, fpga chip, intermediate-freuqncy signal generation circuit and system power supply circuit, the ARM chip is connect by communication bus with the fpga chip, the fpga chip is connect by communication bus with the intermediate-freuqncy signal generation circuit, the system power supply circuit is 9kHz-6GHz radio-frequency signal source intermediate frequency hardware system power supply, the utility model can satisfy the design requirement that frequency range is 9kHz-6GHz radio-frequency signal source, realize the radiofrequency signal output of the required various functions of user.
Description
Technical field
The utility model belongs to Design of Digital Circuit and relevant control application field, specifically, being related to a kind of 9kHz-
6GHz radio-frequency signal source intermediate frequency hardware system and relevant apparatus.
Background technique
The development of present communications electronic measurement technique, it is very high to source frequency accuracy and stability requirement, while having big band
The various modulation function demands of bandwidth signals.Direct Digital Frequency Synthesizer Technology (Direct Digital Synthesize, letter in recent years
Claim DDS) it is fast-developing, having source signal output, phase noise is low, agile rate is high, frequency resolution is high, output phase connects
The features such as continuous.DDS technology is different from resonance manner, it is passed through using high stable and the frequency source of high accuracy as reference data
After addition subtraction multiplication and division basic operation technology or Digital Signal Processing processing, a large amount of discrete frequency signals are exported.This technology is removed
Outside with apparent performance advantage, its major defect is also resulted in based on its digital structure: first, it is quantitative according to sampling, it is defeated
The highest frequency of signal will be less than the half of reference clock out, therefore will be by device (such as DAC, ROM) to improve output frequency
Rate limitation；Second, stray parasitic component is big in DDS output signal, wherein output high frequency is in particular, it is unable to reach PLL frequency
The purity of frequency spectrum of rate synthesis；Third, the power consumption of DDS is directly proportional to its clock frequency, therefore the occasion that is restricted in power supply and again
It is required that there is higher rate-adaptive pacemaker, DDS just has limitation.
The utility model patent of Publication No. CN205982623U discloses a kind of marine actual combat complex electromagnetic environment of simulation
Outboard active interfere radio frequency source, comprising: cPCI cabinet, embedded real-time control system board, preceding I O board card, at intermediate-freuqncy signal
I O board card, two after reason board, cPCI backboard, cPCI power supply, down-converter unit, frequency synthesizer unit, upconverting unit, power supply, system
Secondary backboard and converter unit backboard.The advantages of utility model, is that 8GHz-18GHz frequency range and signal interference pattern can be covered
Diversification, still, the frequency range which is covered are limited, can not covering frequence range be 9kHz-6GHz radio frequency believe
Number source.
Therefore, a kind of radio-frequency signal source intermediate frequency hardware system how is designed, it is made to meet frequency range 9kHz-
The design requirement of 6GHz radio-frequency signal source is a problem for needing to solve at present.
Utility model content
1, it to solve the problems, such as
For how to design a kind of radio-frequency signal source intermediate frequency hardware system, it is made to meet frequency range 9kHz-
The design requirement of 6GHz radio-frequency signal source, the utility model provide a kind of 9kHz-6GHz radio-frequency signal source intermediate frequency hardware controls system
System and relevant apparatus, the utility model can be realized the radiofrequency signal output of the required various functions of user.
2, technical solution
To solve the above problems, the utility model adopts the following technical scheme.
A kind of 9kHz-6GHz radio-frequency signal source intermediate frequency hardware system, including ARM chip, fpga chip, intermediate-freuqncy signal
Generation circuit and system power supply circuit, the ARM chip are connect by communication bus with the fpga chip, the FPGA core
Piece is connect by communication bus with the intermediate-freuqncy signal generation circuit, and the system power supply circuit is the 9kHz-6GHz radio frequency
The power supply of signal source intermediate frequency hardware system.
Preferably, the ARM chip is connected separately with LCD display circuit, external communication interface circuit, SDRAM
Internal storage location and/or non-volatile memory cells.
Preferably, the external communication interface circuit includes RS232 level serial communication circuit and/or USB port
Telecommunication circuit and/or network interface telecommunication circuit.
Preferably, the Flash uses SPI communication interface.
Preferably, the fpga chip is connected separately with radio frequency control interface circuit and simulation low-frequency sampling electricity
Road.
Preferably, the simulation low-frequency sampling circuit is turned using the modulus of bit wide 12bits, sample rate 10MSPS
Parallel operation.
Preferably, the intermediate-freuqncy signal generation circuit includes the peripheral circuit of DDS chip and DDS chip, described
The peripheral circuit of DDS chip is connected to the DDS chip, and the peripheral circuit of the DDS chip includes that DDS reference clock generates
Circuit.
Preferably, the DDS built-in chip type has digital analog converter, clock multiplier circuit, digital filtering
Device and DSP functional circuit.
Preferably, the working clock frequency of the DDS chip is 1GHZ.
A kind of 9kHz-6GHz radio-frequency signal source intermediate frequency hardware controller, including 9kHz-6GHz radio-frequency signal source intermediate frequency are hard
Part control system.
3, beneficial effect
Compared with the prior art, the utility model has the following beneficial effects:
(1) the utility model is the actual design demand of 9kHz-6GHz radio-frequency signal source to frequency range for company, is made
It is hardware foundation framework with high-performance FPGA and ARM chip, is aided with intermediate-freuqncy signal generation circuit, generates under IF carrier frequency
Agile sinusoidal waveform, the final radiofrequency signal output for realizing the required various functions of user；
(2) the ARM chip of the utility model is connected separately with LCD display circuit, external communication interface circuit, in SDRAM
Memory cell and/or non-volatile memory cells, for handling the various operational requirements of user；In setting for external communication interface circuit
It sets, is provided with multiple communication interface circuit, can satisfy a variety of demands of user；
(3) fpga chip of the utility model is connected separately with radio frequency control interface circuit and simulation low-frequency sampling circuit,
Radio frequency control interface circuit provides the control of the IO level with isolation drive grade for each functional unit circuit, simulates low-frequency sampling circuit
Using the analog-digital converter of bit wide 12bits, sample rate 10MSPS, for sampling external such as audio low-frequency analog signal；
(4) the intermediate-freuqncy signal generation circuit of the utility model includes the peripheral circuit of DDS chip and DDS chip, DDS chip
Peripheral circuit include DDS reference clock generation circuit, DDS built-in chip type have digital analog converter, clock multiplier circuit,
The frequency analog that digital filter and DSP functional circuit, DDS chip and digital analog converter combination constitute digital programmable is defeated
Frequency synthesizer out can generate frequency agility sinusoidal wave pattern under the up to frequency of 400MHZ；
(5) the utility model provides a kind of 9kHz-6GHz radio-frequency signal source intermediate frequency hardware controller, practical using this
Novel proposed 9kHz-6GHz radio-frequency signal source intermediate frequency hardware system, so that the intermediate frequency hardware controller structure letter
List, design are reasonable, easily fabricated.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, the drawings in the following description are merely some embodiments of the present invention.
To those skilled in the art, it is also possible to obtain other drawings based on these drawings.
Fig. 1 is the functional block diagram of the utility model 9kHz-6GHz radio-frequency signal source intermediate frequency hardware system.
Specific embodiment
The utility model embodiment provides a kind of 9kHz-6GHz radio-frequency signal source intermediate frequency hardware system and related dress
It sets, for meeting the design requirement that frequency range is 9kHz-6GHz radio-frequency signal source.
To enable the goal of the invention, feature and advantage of the utility model more obvious and understandable, below with reference to
The drawings and specific embodiments, next the present invention will be described in detail.Here, the illustrative embodiments and their description of the utility model are for solving
The utility model is released, but is not intended to limit the scope of the present invention.
A kind of 9kHz-6GHz radio-frequency signal source intermediate frequency hardware system can use setting demand according to user, use height
Performance fpga chip carries out the various modulation algorithm processing of digital signal, and data after processing are led to by external storage controller EMC
Believe that bus transfer makes the chip export specific intermediate signal to high-performance Direct Digital Frequency Synthesizers DDS chip, then through radio frequency
Partial circuit is converted in carrier frequency set by user.The task of the processing various setting demands of user is executed by ARM chip,
It is responsible for whole system peripheral interface function, such as human-computer interaction control display supports R2232/USB/Ethernet communication to realize
The functions such as long-range control, system ambient temperature detection.
Fig. 1 is turned next to, is described in detail to the utility model:
The 9kHz-6GHz radio-frequency signal source intermediate frequency hardware system mainly includes ARM chip, fpga chip, intermediate frequency letter
Number generation circuit and system power supply circuit, the ARM chip are connect by communication bus with the fpga chip, the FPGA
Chip is connect by communication bus with the intermediate-freuqncy signal generation circuit, and the system power supply circuit is that the 9kHz-6GHz is penetrated
The power supply of frequency source signal intermediate frequency hardware system.
Intermediate-freuqncy signal generation circuit includes the peripheral circuit of DDS chip and DDS chip, the peripheral circuit connection of DDS chip
In DDS chip, the peripheral circuit of DDS chip includes DDS reference clock generation circuit, the DDS core of intermediate-freuqncy signal generation circuit
Piece working clock frequency is 1GHz, is exported by the synthesizer chip of integrated VCO；Fpga chip can pass through serial bus interface
The programmed configurations DDS chip interior controls register, and modulation data information can also be transmitted by parallel bus to the chip, makes it
Export the intermediate-freuqncy signal with carrier wave.
Above-mentioned DDS chip, preferably high performance DDS chip, and DDS built-in chip type 14bit have digital analog converter,
Clock multiplier circuit, digital filter and other DSP functional circuits support the sampling rate for being up to 1GSPS.It uses advanced
DDS patented technology can greatly reduce power consumption under the premise of not sacrificing performance.DDS and digital analog converter combination constitute number
The programmable frequency analog output frequency synthesizer of word can generate frequency agility sine wave under the up to frequency of 400MHz
Shape.Its static RAM being internally integrated can support the multiple combinations of frequency, phase and amplitude modulation；The height of the DDS built-in chip type
Fast parallel data input port is able to achieve the direct modulation of frequency, phase, amplitude or pole, to realize more advanced modulation function
Energy；
Wherein, digital analog converter (Digital-to-analog converter, abbreviation DAC) be it is a kind of will be digital
The equipment that signal is converted to analog signal (in the form of electric current, voltage or charge) is corresponding with ADC, it can be by discrete number
Word signal is converted to continuously varying analog signal.
Fpga chip is connected with its peripheral circuit, and the peripheral circuit of fpga chip includes radio frequency control interface circuit and mould
Quasi- low-frequency sampling circuit, fpga chip and its peripheral circuit mainly set demand according to user, and selectivity controls the output of DDS unit
Single-tone or intermediate-freuqncy signal with various modulation intelligences.The data of various modulation intelligences are on the basis of baseband signal data
Such as interpolation and filtering Digital Signal Processing are carried out, result is then transferred to DDS chip by parallel busses.The signal of base band
Generating can be calculated according to internal modulation function, can also sample external analog low frequency signal by ADC and obtain.
Wherein, radio frequency control interface circuit provides for each functional unit circuit of signal source radio frequency part with isolation drive grade
The control of IO level.Local oscillator cell signal outputs such as at different levels control, the selection of pre-filtering channel switch controls, radio-frequency channel at different levels is put
Big device and attenuator working state control and intermediate-freuqncy signal channel amplifier and attenuator working state control etc.；
It simulates low-frequency sampling circuit and uses the analog-digital converter (Analog-to- of bit wide 12bits, sample rate 10MSPS
Digital Converter, abbreviation ADC) for sampling external such as audio low-frequency analog signal.Base-band digital letter after sampling
It number send to carrying out filter inside FPGA and the Digital Signal Processing such as wave is inserted, further according to the modulation type of user's setting signal output
Relevant parameter, data are sent to DDS chip, finally by the data information of the low frequency signal of external sampling after further data processing
It is modulated in intercarrier signal and exports.
ARM chip and its peripheral circuit major function are the processing various operational requirements of user, and user is set demand task
After instruction parsing, specific control information is sent to fpga chip by EMC communication bus, is finally controlled by fpga chip
The setting of frequency signal output and radio frequency frequency conversion channel relevant parameter；
It should be noted that the peripheral circuit of above-mentioned ARM chip mainly has LCD display driver circuit, external communication interface
Circuit, sdram memory unit and/or non-volatile memory cells are (related to factory configuration information etc. for system calibration data
The storage of parameter) and some basic peripheral circuits, such as system clock, reset, power supply power supply it is some substantially peripheral
Circuit.
It should be noted that external communication interface circuit includes RS232 level serial communication circuit, USB port communication electricity
Road and network interface telecommunication circuit are provided with multiple communication interface circuit, can satisfy in the setting of external communication interface circuit
The a variety of demands of user；
Sdram memory unit full name is Synchronous Dynamic Random Access Memory, synchronous dynamic
Random access memory, SDRAM use 3.3v operating voltage, and bandwidth 64, SDRAM locks CPU and RAM by an identical clock
Together, RAM and CPU is enable to share a clock cycle, with the work of identical speed sync, the speed compared with EDO memory
50% can be improved.SDRAM is based on double bank structures, includes two staggered storage arrays, when CPU is from a memory bank or battle array
When column access data, another has just been that read-write data are got ready, and by the close switching of the two storage arrays, is read
Efficiency can be increased exponentially, and the SDRAM internal storage location that capacity is 128Mbits is used to penetrate by the utility model embodiment
In frequency source signal intermediate frequency hardware system, reading efficiency can be increased substantially using sdram memory unit, improves radio frequency letter
The performance of number source intermediate frequency hardware system；
It should be noted that the preferred Flash flash cell of non-volatile memory cells in the utility model embodiment,
For Flash flash cell as a kind of non-volatile (Non-Volatile) memory, it is single that data deletion, which is not with single byte,
Position but as unit of fixed block, also can muchly keep data under conditions of the supply of no electric current, storage is special
Property is equivalent to hard disk, and memory reliability is strong, is used for the 9kHz-6GHz radio-frequency signal source intermediate frequency hardware controls of the utility model
In system, the stability of radio-frequency signal source intermediate frequency hardware system can be improved, in the utility model used in embodiment
Flash flash cell is specially the four-way SPI Flash unit that capacity is 32Mbits, handling capacity is up to 40Mbps；
It should be noted that the ARM chip in the utility model embodiment is NXP company Cortex-M4 and Cortex-M0
The LPC4357JET256 of dual core, ARM chip maximum operating frequency 204MHz.ARM Cortex-M4 kernel CPU uses 3
Level production line and Harvard framework have independent local instruction and data bus and the third bus for system peripheral, together
When also include the inside pre-fetch unit for supporting uncertain branch operation.ARM Cortex-M4 supports monocycle digital signal
Processing and SIMD instruction and kernel integrated hardware floating point processor.ARM chip is communicated with fpga chip to be controlled using external storage
Device EMC communication bus, bus data position are 32bit, and highest bus clock is 204Mbps.
Radio-frequency signal source intermediate frequency hardware system in the utility model embodiment is powered by system power supply circuit,
The radio-frequency signal source intermediate frequency hardware system supports the input of 9-17V Width funtion, the voltage through Switching Power Supply output nominal value 5V.
The 5V voltage is respectively supplied to the analog cell circuits such as DDS chip and the sampling of low frequency ADC chip through the filtering processing of 3 road ∏ types and supplies
Electricity, ARM chip and the power supply of fpga chip element circuit.Wherein ARM chip and the 5V voltage of fpga chip element circuit divide again
Not Jing Guo multi-channel switch power processing of circuit reach the various voltage requirements of chip operation, and the 5V voltage of analog portion is to avoid out
Interference of the powered-down source insertion switch frequency to sampled signal, each road demand voltage are all made of linear voltage dropping circuit processing.
Utility model works principle is as follows: the radio-frequency signal source intermediate frequency hardware system can be set according to user's use
Determine demand, carries out the various modulation algorithms of digital signal using High Performance FPGA and handle, data after processing are deposited by outside
Controller EMC transmission is stored up to high-performance Direct Digital Frequency Synthesizers DDS chip, exports the chip in specific
Frequency signal, then be converted in carrier frequency set by user through radio frequency part circuit.Handle the task of the various setting demands of user
It is executed by ARM chip, is responsible for whole system peripheral interface function, R2232/USB/ is supported in such as human-computer interaction control display
The functions such as long-range control, system ambient temperature detection are realized in Ethernet communication.
The utility model also discloses a kind of 9kHz-6GHz radio-frequency signal source intermediate frequency hardware controller, utilizes this reality
The 9kHz-6GHz radio-frequency signal source intermediate frequency hardware system proposed with novel above-described embodiment, uses high-performance FPGA core
Piece carries out the various modulation algorithm processing of digital signal, and data after processing are passed through external storage controller EMC transmission
It is converted in carrier frequency set by user to high-performance Direct Digital Frequency Synthesizers DDS chip, then through radio frequency part circuit.
The task of the processing various setting demands of user is executed by ARM chip, is responsible for whole system peripheral interface function, such as man-machine mutual
Dynamic control display supports R2232/USB/Ethernet communication to realize the functions such as long-range control, system ambient temperature detection, so that
It is the intermediate frequency hardware controller simple structure and reasonable design, easily fabricated.
Schematically the utility model is created above and embodiments thereof are described, description is not limiting,
Shown in the drawings is also one of the embodiment that the utility model is created, and actual structure is not limited to this.So such as
Those of ordinary skill in the art are inspired by it for fruit, in the case where not departing from this creation objective, not inventively designs
Frame mode similar with the technical solution and embodiment, should belong to the protection scope of this patent.
Claims (10)
1. a kind of 9kHz-6GHz radio-frequency signal source intermediate frequency hardware system, it is characterised in that: including ARM chip, FPGA core
Piece, intermediate-freuqncy signal generation circuit and system power supply circuit, the ARM chip are connect by communication bus with the fpga chip,
The fpga chip is connect by communication bus with the intermediate-freuqncy signal generation circuit, and the system power supply circuit is described
The power supply of 9kHz-6GHz radio-frequency signal source intermediate frequency hardware system.
2. 9kHz-6GHz radio-frequency signal source intermediate frequency hardware system according to claim 1, it is characterised in that: described
ARM chip is connected separately with LCD display circuit, external communication interface circuit, sdram memory unit and/or non-volatile memories
Unit.
3. 9kHz-6GHz radio-frequency signal source intermediate frequency hardware system according to claim 2, it is characterised in that: described
External communication interface circuit includes RS232 level serial communication circuit and/or USB port telecommunication circuit and/or network interface telecommunication circuit.
4. 9kHz-6GHz radio-frequency signal source intermediate frequency hardware system according to claim 2, it is characterised in that: described
Non-volatile memory cells are Flash, and the Flash uses SPI communication interface.
5. 9kHz-6GHz radio-frequency signal source intermediate frequency hardware system according to claim 1, it is characterised in that: described
Fpga chip is connected separately with radio frequency control interface circuit and simulation low-frequency sampling circuit.
6. 9kHz-6GHz radio-frequency signal source intermediate frequency hardware system according to claim 5, it is characterised in that: described
It simulates low-frequency sampling circuit and uses the analog-digital converter of bit wide 12bits, sample rate 10MSPS.
7. 9kHz-6GHz radio-frequency signal source intermediate frequency hardware system according to claim 1, it is characterised in that: described
Intermediate-freuqncy signal generation circuit includes the peripheral circuit of DDS chip and DDS chip, and the peripheral circuit of the DDS chip is connected to institute
DDS chip is stated, the peripheral circuit of the DDS chip includes DDS reference clock generation circuit.
8. 9kHz-6GHz radio-frequency signal source intermediate frequency hardware system according to claim 7, it is characterised in that: described
DDS built-in chip type has digital analog converter, clock multiplier circuit, digital filter and DSP functional circuit.
9. 9kHz-6GHz radio-frequency signal source intermediate frequency hardware system according to claim 7, it is characterised in that: described
The working clock frequency of DDS chip is 1GHZ.
10. a kind of 9kHz-6GHz radio-frequency signal source intermediate frequency hardware controller, it is characterised in that: any including claim 1-9
9kHz-6GHz radio-frequency signal source intermediate frequency hardware system described in one.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113890590A (en) * | 2021-10-12 | 2022-01-04 | 北京微纳星空科技有限公司 | Satellite-borne data transmission transmitting device, system and intelligent terminal |
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- 2019-01-24 CN CN201920119735.4U patent/CN209659298U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113890590A (en) * | 2021-10-12 | 2022-01-04 | 北京微纳星空科技有限公司 | Satellite-borne data transmission transmitting device, system and intelligent terminal |
| CN113890590B (en) * | 2021-10-12 | 2022-07-05 | 北京微纳星空科技有限公司 | Satellite-borne data transmission transmitting device, system and intelligent terminal |
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