CN203054516U

CN203054516U - Multi-waveform signal generator based on FPGA

Info

Publication number: CN203054516U
Application number: CN 201320052639
Authority: CN
Inventors: 卢超
Original assignee: Shaanxi University of Technology
Current assignee: Shaanxi University of Technology
Priority date: 2013-01-30
Filing date: 2013-01-30
Publication date: 2013-07-10
Anticipated expiration: 2023-01-30

Abstract

The utility model relates to a multi-waveform signal generator based on an FPGA. The multi-waveform signal generator based on an FPGA comprises an FPGA, a touch screen display and input module, an off-chip storage module, a D/A converter, and a JTAG interface, wherein a NiosII soft core CPU, a signal generation module and a relevant interface control logic circuit are configured in the FPGA; all of the touch screen display and input module, the off-chip storage module, the D/A converter, and the JTAG interface are connected with the FPGA; the FPGA is connected with a PC through the JTAG interface; and the FPGA outputs waveforms through the D/A converter. The multi-waveform signal generator based on an FPGA is characterized in that the DDS technology is adopted; performance in terms of relative bandwidth, frequency conversion time, accompanied continuity, quadrature output, high resolution and integration is favorable; a CPU and characteristics of the CPU can be made to order according needs of a user based on an SOPC system of the NiosII; the multi-waveform signal generator based on an FPGA is strong in flexibility and generality.

Description

A kind of many waveform generators based on FPGA

Technical field:

The utility model relates to a kind of signal generator, is a kind of many waveform generators based on FPGA specifically.

Background technology:

Development along with modern electronic technology and large scale integrated circuit, the DDS technology is a kind of frequency synthesis technique of novelty, and obtained development at full speed, become most important frequency synthesis technique, its have the control of being easy to, phase place continuously, output frequency degree of stability height, frequency inverted speed is fast and the resolution advantages of higher.On SOPC (the system on a programmable chip) sheet programmable system be a kind of flexibly, SOC solution efficiently, it bears a double meaning, it at first is SOC (system on a chip), there is single chip to finish the main logic function of total system, secondly he is programmable system, have the design flexible mode, can reduce, extendible, scalable, and have software and hardware in the function of system programmable.By NiosII Implementation of Embedded System SOPC, design a kind of many waveform generators based on FPGA, can export common waveforms such as sine, cosine, square wave, triangular wave and sawtooth wave, simultaneously can finish multiple modulation signals such as AM modulation, FM modulation, FSK modulation, have very strong practical value.

Summary of the invention:

At the problem that above-mentioned prior art exists, the utility model provides a kind of many waveform generators based on FPGA.

To achieve these goals, the technical solution adopted in the utility model is: a kind of many waveform generators based on FPGA, comprise FPGA, touch-screen demonstration and load module, sheet external memory module, D/A converter and jtag interface, configuration NiosII soft nucleus CPU, signal generating module and relevant interface control logic circuit among the FPGA, described touch-screen demonstration all links to each other with FPGA with jtag interface with load module, sheet external memory module, D/A converter, FPGA is connected with PC by jtag interface, and FPGA is by waveform output behind the D/A converter.

As preferably, touch-screen shows and load module is the TFT liquid crystal touch screen, is responsible for interface display and outside input is controlled.

As preferably, sheet external memory module is the SDRAM storer.

Compared with prior art, advantage of the present utility model is: adopt the DDS technology, in relative bandwidth, frequency inverted time, continuity, quadrature output, high resolving power and integrated aspect of performance are better together, SOPC system based on NiosII can freely customize CPU and individual character thereof according to user's needs simultaneously, has stronger dirigibility and versatility.

Description of drawings:

Fig. 1 is the structural representation of a kind of many waveform generators based on FPGA described in the utility model.

Embodiment:

Below in conjunction with accompanying drawing the utility model is further specified.

As a kind of embodiment of the present utility model, consult Fig. 1, the utility model comprises FPGA, touch-screen demonstration and load module, sheet external memory module, D/A converter and jtag interface, configuration NiosII soft nucleus CPU, signal generating module and relevant interface control logic circuit among the FPGA, described touch-screen demonstration all links to each other with FPGA with jtag interface with load module, sheet external memory module, D/A converter, FPGA is connected with PC by jtag interface, and FPGA is by waveform output behind the D/A converter.Touch-screen shows and load module is the TFT liquid crystal touch screen, is responsible for interface display and outside input control.Sheet external memory module is the SDRAM storer.

During use, in PC, use the DSPBuilder instrument that is integrated among the Matlab under the Simulink environment, to realize the generation of many ripples signal by module programming, and be configured among the FPGA, synthetic sinusoidal, cosine, square wave, common waveform such as triangular wave and sawtooth wave, can finish simultaneously the AM modulation, the FM modulation, multiple modulation signals such as FSK modulation, D/A converter is finished numeral output and is converted to simulation output, the function of amplification and amplitude control, in PC, realize by the Matlab programming, finish user interface, editor produces Wave data, frequency control and with functions such as SOC (system on a chip) communication.

The soft nuclear of configuration NiosII is set up realization by calling the IP storehouse among the SOPC Builder among the described FPGA, mainly by NiosII CPU, sdram controller, general purpose I, EPCS controller, system ID, JTAG UART, with main five parts of the port of external linkage, be respectively system clock with reset, TFT LCD control signal wire, touch-screen control signal wire, sdram interface control line, sequence signal generator control signal wire etc., constituted the bottom most software hardware platform part of total system, system clock 100MHZ.

Described D/A converter is mainly regulated by D/A conversion, filtering, amplitude and power module is formed employing AD9764 chip, it is the digital to analog converter of a kind of high-performance, low-power consumption 14 bit resolutions, support the renewal rate of the highest 125MSPS, have single supply work flexibly and low-power consumption characteristic, adopt the manufacturing of advanced CMOS technology, segmented current source framework combines with proprietary switching technique, can reduce spuious component, and has strengthened dynamic property.

Although be that a most practical and preferred embodiment has been described the utility model in conjunction with current taking as, but be to be understood that, the utility model is not limited to the disclosed embodiments, and is intended to contain multiple modification and equivalent arrangements included in the spirit and scope of the appended claims on the contrary.

Claims

1. many waveform generators based on FPGA, comprise FPGA, touch-screen demonstration and load module, sheet external memory module, D/A converter and jtag interface, configuration NiosII soft nucleus CPU, signal generating module and relevant interface control logic circuit among the described FPGA, described touch-screen demonstration all links to each other with FPGA with jtag interface with load module, sheet external memory module, D/A converter, FPGA is connected with PC by jtag interface, and FPGA is by waveform output behind the D/A converter.

2. a kind of many waveform generators based on FPGA according to claim 1 is characterized in that: described touch-screen shows and load module is the TFT liquid crystal touch screen, is responsible for interface display and outside input is controlled.

3. a kind of many waveform generators based on FPGA according to claim 1, it is characterized in that: described external memory module is the SDRAM storer.