CN202957806U - FPGA-based DDS signal generator - Google Patents
FPGA-based DDS signal generator Download PDFInfo
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- CN202957806U CN202957806U CN 201220726659 CN201220726659U CN202957806U CN 202957806 U CN202957806 U CN 202957806U CN 201220726659 CN201220726659 CN 201220726659 CN 201220726659 U CN201220726659 U CN 201220726659U CN 202957806 U CN202957806 U CN 202957806U
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- signal generator
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- attenuator
- power amplifier
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Abstract
The utility model discloses an FPGA-based DDS signal generator belonging to the digital technical field, which aims to solve the problem that conventional ASIC-based signal generators are long in design period, large in investment and poor in flexibility. The above FPGA-based DDS signal generator comprises a singlechip, an FPGA, a D/A conversion circuit, an attenuator, a power amplifier and an oscilloscope. The control signal output end of the singlechip is connected with the control signal input end of the FPGA. The output end of the FPGA is connected with the digital signal input end of the D/A conversion circuit. The analog signal output end of the D/A conversion circuit is connected with the input end of the attenuator. The output end of the attenuator is connected with the connected with the input end of the power amplifier. The output end of the power amplifier is connected with the input end of the oscilloscope. The FPGA-based DDS signal generator is used for generating signals of various waveforms.
Description
Technical field
The utility model relates to the DDS signal generator based on FPGA, belongs to the digital technology field.
Background technology
In fields such as electronics, communications, the signal source of high accuracy, high-resolution, wide frequency ranges has a wide range of applications, and general signal source designs all proportion synthetic technologys, adopts traditionally phase-locked loop (PLL) circuit to be designed.Frequency synthesizer is the indispensable important component part of communication system, for communication system provides stable, accurate frequency working point.Direct digital frequency synthesis technology (Directed-Digital Synthesis, DDS) has the characteristics such as frequency resolution is high, frequency change speed is fast, phase error is little, thereby is used widely in communication and radar system.Along with the development of Direct Digital frequency synthesis (DDS) technology, a lot of chip companies have all been developed the DDS special integrated chip of oneself.Just can form the generator of random waveform signal with D/A converter together with low pass filter (LPF).
Adopt the signal generator of common ASIC exploitation to have design cycle length, invest shortcoming large, very flexible.
Summary of the invention
The utility model purpose is that the signal generator in order to solve the common ASIC exploitation of employing exists design cycle length, invests problem large, very flexible, and a kind of DDS signal generator based on FPGA is provided.
DDS signal generator based on FPGA described in the utility model, it comprises single-chip microcomputer, FPGA, D/A change-over circuit, attenuator, power amplifier and oscilloscope,
The control signal output of single-chip microcomputer is connected with the control signal input of FPGA;
The output of FPGA is connected with the digital signal input end of D/A change-over circuit, the analog signal output of D/A change-over circuit is connected with the input of attenuator, the output of attenuator is connected with the input of power amplifier, and the output of power amplifier is connected with oscillographic input.
Advantage of the present utility model: the DDS signal generator based on FPGA described in the utility model had both been inherited extensive, the high integration of ASIC, the advantage of high reliability, overcome again common ASIC design cycle length, invested shortcoming large, very flexible, progressively become the first-selection of complex digital hardware circuit design, integrated level is more and more higher, the construction cycle is shorter and shorter, developing instrument is more and more intelligent.
Adopt FPGA to design feasibility and the reliability that realizes the DDS circuit, also more flexible, can carry out as required the modification of input mode and the part of module of frequency control word, as long as change the data of ram table in FPGA, the DDS circuit just can produce waveform arbitrarily.Employing FPGA design realizes also having relatively wide bandwidth, frequency switching time is shorter, phase place changes continuously, the frequency resolution advantages of higher.
The accompanying drawing explanation
Fig. 1 is the structured flowchart of the DDS signal generator based on FPGA described in the utility model;
Fig. 2 is the circuit diagram of attenuator;
Fig. 3 is the circuit diagram of power amplifier.
Embodiment
Embodiment one: below in conjunction with Fig. 1 to Fig. 3, present embodiment is described, the described DDS signal generator based on FPGA of present embodiment, it comprises single-chip microcomputer 1, FPGA2, D/A change-over circuit 3, attenuator 4, power amplifier 5 and oscilloscope 8,
The control signal output of single-chip microcomputer 1 is connected with the control signal input of FPGA2;
The output of FPGA2 is connected with the digital signal input end of D/A change-over circuit 3, the analog signal output of D/A change-over circuit 3 is connected with the input of attenuator 4, the output of attenuator 4 is connected with the input of power amplifier 5, and the output of power amplifier 5 is connected with the input of oscilloscope 8.
D/A change-over circuit 3 adopts the analog-digital chip that model is AD9762AR to realize.Carry out 12 figure place mould conversions, with the phase-locked loop of FPGA2, carry out clock synchronous.The analog voltage of output is sent into amplifier and is carried out voltage amplification.
As shown in Figure 2, attenuator 4 consists of seven resistance series winding dividing potential drops the physical circuit figure of attenuator 4, and output meets a slice CD74HC4051 to be carried out 8 and select 1 channel selecting, and the channel selecting control signal has single-chip microcomputer 1 to provide.
As shown in Figure 3, due to certain carrying load ability will be arranged, the afterbody before output should connect a power amplifier 5 to the physical circuit figure of power amplifier 5, for improving the power output of signal generator.What present embodiment adopted is typical current feedback power amplification.
Embodiment two: present embodiment is described further execution mode one, and it also comprises keyboard 6, and the external command input of single-chip microcomputer 1 is connected with the output of keyboard 6.
Embodiment three: present embodiment is described further execution mode one or two, and it also comprises LCD display 7, and the display output of single-chip microcomputer 1 is connected with the display input of LCD display 7.
Program is downloaded in hardware circuit, by keyboard 6, can select waveform and output frequency, and can be observed selected data on LCD display 7.Speed issue due to single-chip microcomputer 1 self has adopted the FPGA design on body design, is mainly to take FPGA2 as main, and single-chip microcomputer 1 is auxiliary, and the single-chip microcomputer 1 here is only used for the control to FPGA2 and demonstration.Utilize oscilloscope 8 to observe the waveform of final generation, on oscilloscope 8, can be clear that waveform, along with the change of selecting, waveform also changes thereupon, and frequency is also in 1Hz～1MHz, to change.The design can use in a lot of directions and design, such as laboratory, does in experiment or other designs the effects such as waveform is provided.
Claims (4)
1. the DDS signal generator based on FPGA, is characterized in that, it comprises single-chip microcomputer (1), FPGA(2), D/A change-over circuit (3), attenuator (4), power amplifier (5) and oscilloscope (8),
The control signal output and FPGA(2 of single-chip microcomputer (1)) the control signal input be connected;
FPGA(2) output is connected with the digital signal input end of D/A change-over circuit (3), the analog signal output of D/A change-over circuit (3) is connected with the input of attenuator (4), the output of attenuator (4) is connected with the input of power amplifier (5), and the output of power amplifier (5) is connected with the input of oscilloscope (8).
2. the DDS signal generator based on FPGA according to claim 1, is characterized in that, it also comprises keyboard (6), and the external command input of single-chip microcomputer (1) is connected with the output of keyboard (6).
3. the DDS signal generator based on FPGA according to claim 1, is characterized in that, it also comprises LCD display (7), and the display output of single-chip microcomputer (1) is connected with the display input of LCD display (7).
4. the DDS signal generator based on FPGA according to claim 1, is characterized in that, D/A change-over circuit (3) adopts the analog-digital chip that model is AD9762AR to realize.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220726659 CN202957806U (en) | 2012-12-26 | 2012-12-26 | FPGA-based DDS signal generator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201220726659 CN202957806U (en) | 2012-12-26 | 2012-12-26 | FPGA-based DDS signal generator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN202957806U true CN202957806U (en) | 2013-05-29 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN 201220726659 Expired - Fee Related CN202957806U (en) | 2012-12-26 | 2012-12-26 | FPGA-based DDS signal generator |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103944566A (en) * | 2014-04-24 | 2014-07-23 | 山东交通学院 | Method and circuit for achieving DDS amplitude modulation output |
| CN107846206A (en) * | 2017-11-08 | 2018-03-27 | 昆山龙腾光电有限公司 | A kind of Waveform generating circuit |
-
2012
- 2012-12-26 CN CN 201220726659 patent/CN202957806U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103944566A (en) * | 2014-04-24 | 2014-07-23 | 山东交通学院 | Method and circuit for achieving DDS amplitude modulation output |
| CN103944566B (en) * | 2014-04-24 | 2017-03-01 | 山东交通学院 | A kind of method realizing the output of DDS amplitude modulation(PAM) and circuit |
| CN107846206A (en) * | 2017-11-08 | 2018-03-27 | 昆山龙腾光电有限公司 | A kind of Waveform generating circuit |
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| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130529 Termination date: 20141226 |
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| EXPY | Termination of patent right or utility model |