CN202957806U - FPGA-based DDS signal generator - Google Patents

Abstract

The utility model discloses an FPGA-based DDS signal generator belonging to the digital technical field, which aims to solve the problem that conventional ASIC-based signal generators are long in design period, large in investment and poor in flexibility. The above FPGA-based DDS signal generator comprises a singlechip, an FPGA, a D/A conversion circuit, an attenuator, a power amplifier and an oscilloscope. The control signal output end of the singlechip is connected with the control signal input end of the FPGA. The output end of the FPGA is connected with the digital signal input end of the D/A conversion circuit. The analog signal output end of the D/A conversion circuit is connected with the input end of the attenuator. The output end of the attenuator is connected with the connected with the input end of the power amplifier. The output end of the power amplifier is connected with the input end of the oscilloscope. The FPGA-based DDS signal generator is used for generating signals of various waveforms.

Description

FPGA-based DDS signal generator

technical field

The utility model relates to a DDS signal generator based on FPGA, which belongs to the field of digital technology.

Background technique

In the fields of electronics and communication, signal sources with high precision, high resolution and wide frequency range are widely used. The general signal source design adopts frequency synthesis technology, and traditionally adopts phase-locked loop (PLL) circuit for design. The frequency synthesizer is an indispensable and important part of the communication system, which provides a stable and precise frequency operating point for the communication system. Direct Digital Synthesis (Directed-Digital Synthesis, DDS) has the characteristics of high frequency resolution, fast frequency change speed, and small phase error, so it is widely used in communication and radar systems. With the development of direct digital frequency synthesis (DDS) technology, many chip companies have developed their own DDS ASICs. Together with D/A converter and low-pass filter (LPF), it can form a generator of arbitrary waveform signal.

The signal generator developed by common ASIC has the disadvantages of long design cycle, large investment and poor flexibility.

Contents of the invention

The purpose of the utility model is to provide a DDS signal generator based on FPGA to solve the problems of long design cycle, large investment and poor flexibility in the signal generator developed by common ASIC.

The DDS signal generator based on FPGA described in the utility model, it comprises single-chip microcomputer, FPGA, D/A conversion circuit, attenuator, power amplifier and oscilloscope,

The control signal output end of the single-chip microcomputer is connected with the control signal input end of the FPGA;

The output terminal of the FPGA is connected to the digital signal input terminal of the D/A conversion circuit, the analog signal output terminal of the D/A conversion circuit is connected to the input terminal of the attenuator, the output terminal of the attenuator is connected to the input terminal of the power amplifier, and the power amplifier The output terminal is connected to the input terminal of the oscilloscope.

Advantages of the utility model: the FPGA-based DDS signal generator of the utility model not only inherits the advantages of large-scale, high integration and high reliability of ASIC, but also overcomes the long design period, large investment and poor flexibility of ordinary ASIC However, it has gradually become the first choice for complex digital hardware circuit design, with higher and higher integration, shorter development cycle, and more intelligent development tools.

Using FPGA design to realize the feasibility and reliability of DDS circuit is also more flexible. The input mode of frequency control word and some modules can be modified according to the needs. As long as the data in the RAM table in FPGA is changed, DDS circuit can generate any waveform. The FPGA design also has the advantages of relatively wide bandwidth, short frequency conversion time, continuous phase change, and high frequency resolution.

Description of drawings

Fig. 1 is the structural block diagram of the DDS signal generator based on FPGA described in the utility model;

Fig. 2 is the circuit diagram of the attenuator;

Fig. 3 is a circuit diagram of a power amplifier.

Detailed ways

Specific embodiment one: below in conjunction with Fig. 1 to Fig. 3 illustrate this embodiment, the DDS signal generator based on FPGA described in this embodiment, it comprises single-chip microcomputer 1, FPGA2, D/A conversion circuit 3, attenuator 4, power amplifier 5 and scope 8,

The control signal output end of the single-chip microcomputer 1 is connected with the control signal input end of FPGA2;

The output end of FPGA2 is connected with the digital signal input end of D/A conversion circuit 3, the analog signal output end of D/A conversion circuit 3 is connected with the input end of attenuator 4, the output end of attenuator 4 is connected with the input of power amplifier 5 The output terminal of the power amplifier 5 is connected with the input terminal of the oscilloscope 8 .

The D/A conversion circuit 3 is realized by a digital-to-analog conversion chip whose model is AD9762AR. Perform 12-bit analog-to-analog conversion, and use the phase-locked loop of FPGA2 for clock synchronization. The output analog voltage is sent to the operational amplifier for voltage amplification.

The specific circuit diagram of the attenuator 4 is shown in Figure 2. The attenuator 4 is composed of seven resistors connected in series to divide the voltage. The output is connected to a CD74HC4051 for 8-to-1 channel selection.

The specific circuit diagram of the power amplifier 5 is shown in Figure 3. Due to the need for a certain load capacity, a power amplifier 5 should be connected to the last stage before the output to increase the output power of the signal generator. This embodiment adopts a typical current feedback power amplifier.

Embodiment 2: This embodiment further describes Embodiment 1. It also includes a keyboard 6 , and the external command input end of the single-chip microcomputer 1 is connected to the output end of the keyboard 6 .

Embodiment 3: This embodiment further describes Embodiment 1 or 2. It also includes an LCD display 7 . The display signal output end of the single-chip microcomputer 1 is connected to the display signal input end of the LCD display 7 .

Download the program to the hardware circuit, the waveform and output frequency can be selected through the keyboard 6, and the selected data can be observed on the LCD display 7. Due to the speed problem of single-chip microcomputer 1 itself, FPGA design is adopted in the main design, mainly based on FPGA2, supplemented by single-chip microcomputer 1, here single-chip microcomputer 1 is only used to control FPGA2 and display. Use the oscilloscope 8 to observe the finally generated waveform. The waveform can be clearly seen on the oscilloscope 8. As the selection changes, the waveform also changes, and the frequency can also vary within 1 Hz to 1 MHz. This design can be used in many directions and designs, such as providing functions such as waveforms in laboratory experiments or other designs.

Claims (4)

1. the DDS signal generator based on FPGA, is characterized in that, it comprises single-chip microcomputer (1), FPGA(2), D/A change-over circuit (3), attenuator (4), power amplifier (5) and oscilloscope (8),

The control signal output and FPGA(2 of single-chip microcomputer (1)) the control signal input be connected;

FPGA(2) output is connected with the digital signal input end of D/A change-over circuit (3), the analog signal output of D/A change-over circuit (3) is connected with the input of attenuator (4), the output of attenuator (4) is connected with the input of power amplifier (5), and the output of power amplifier (5) is connected with the input of oscilloscope (8).

2. the DDS signal generator based on FPGA according to claim 1, is characterized in that, it also comprises keyboard (6), and the external command input of single-chip microcomputer (1) is connected with the output of keyboard (6).

3. the DDS signal generator based on FPGA according to claim 1, is characterized in that, it also comprises LCD display (7), and the display output of single-chip microcomputer (1) is connected with the display input of LCD display (7).

4. the DDS signal generator based on FPGA according to claim 1, is characterized in that, D/A change-over circuit (3) adopts the analog-digital chip that model is AD9762AR to realize.

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