CN108964660A - A kind of high-resolution low-power consumption spread spectrum control circuit based on phase delay compensation - Google Patents
A kind of high-resolution low-power consumption spread spectrum control circuit based on phase delay compensation Download PDFInfo
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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Abstract
The invention discloses a kind of high-resolution low-power consumption spread spectrum control circuits based on phase delay compensation；The spread spectrum circuit is made of fractional frequency division circuit and triangular-wave generator, and triangular-wave generator generates the signal of fixed frequency, is superimposed upon frequency divider fractional part, so that entire fractional frequency division number is by triangular modulation, and then obtains spread spectrum output.Decimal frequency divider then uses phase delay compensation technique, there is proportional relations for phase difference between accumulator remainder and feedback signal and phase-locked loop reference signal in modulator simultaneously, remainder in accumulator is taken out, the phase (programmable delayer) of feedback signal is controlled after decoding, fractional frequency division instantaneous phase error realizes fractional frequency division truly.
Description
Technical field
The present invention relates to a kind of spread spectrum circuits, are specifically a kind of high-resolution low-power consumption based on phase delay compensation
Spread spectrum control circuit.
Background technique
Currently, spread spectrum technology is modulated processing to spike clock, so that it is turned into one from a narrow band clock has
The frequency spectrum of sideband harmonic wave reaches reduction spike energy to reach multiple frequency bands that spike energy is distributed to spread spectrum region,
Inhibit the effect of EMI.At present spread spectrum technology using more and more extensive.
It being found by retrieval, the patent of invention of patent No. CN201010169367.8 discloses a kind of spread spectrum circuit, including
One phase inverter, a current source, a control unit and a shaping circuit.Inverter input receives an original clock signal.Electricity
Stream source is coupled to the electric current transmission end of phase inverter.Control unit, including a control circuit change electric current according to original clock signal
The size of current in source is to control the charge/discharge speed of the output end of phase inverter, so that output end exports a voltage signal.Shaping electricity
Road carries out shaping to voltage signal and obtains a spread spectrum clock signal.
Patent No. CN201320529544.8 utility model disclose a kind of phase-locked loop circuits；In embodiment, the lock
Phase loop circuit includes: switched-capacitor circuit, and switched-capacitor circuit generates modulation waveform, which injects lock as an electrical current
Phase loop circuit, so that phase-lock-ring output frequency is modulated.Compared with the spread spectrum phaselocked loop of the prior art, the utility model embodiment
Spread spectrum phase-locked loop structures it is simple, power consumption is low, and silicon expense is low, and all has spirit in terms of spreading ratio and modulating frequency two
Activity.
The patent of invention of patent No. CN200510075533.7 discloses a kind of control circuit of frequency-expanding phase lock loop, tool
Have: with reference to frequency eliminator；Phase detector；Charge pumping；Filter circuit；Voltage control oscillating circuit；And modulating control circuit；
It can make the output frequency of the voltage control oscillating circuit that can make uniformly to be unfolded in fixed range by above structure, and energy can
Make uniform distribution.
But the analysis found that, existing spread spectrum control circuit has the following disadvantages, and it is low to be mainly reflected in resolution ratio, function
Consumption is high, thus can not improve the precision of spread spectrum；Therefore need to provide a kind of high-resolution low-power consumption exhibition based on phase delay compensation
Frequency control circuit meets its demand.
Summary of the invention
Therefore, in order to solve above-mentioned deficiency, it is low that the present invention provides a kind of high-resolution based on phase delay compensation herein
Power consumption spread spectrum control circuit.Have the characteristics that high-resolution low-power consumption, by controlling the phase of feedback signal, eliminates fractional frequency division
Phase error, the precision of fractional frequency division is improved, to improve the precision of spread spectrum.
The invention is realized in this way constructing a kind of high-resolution low-power consumption spread spectrum control electricity based on phase delay compensation
Road, it is characterised in that: the spread spectrum circuit has fractional frequency division circuit and triangular-wave generator；Triangular-wave generator generates fixed frequency
The signal of rate is superimposed upon the fractional part of frequency divider, so that entire fractional frequency division number is by triangular modulation, and then obtains spread spectrum
Output.
As an improvement of the above technical solution, the high-resolution low-power consumption spread spectrum based on phase delay compensation controls electricity
Road；The spread spectrum circuit specifically includes,
Pre- 4 frequency dividing circuit, pre- 4 frequency circuit structure is connected by 2 Differential Input d type flip flops (4 latch) to be constituted, and is generated
8 phase outputs；
Accumulator, accumulator add up the fractional part of decimal control word repeatedly, generate quantization output, and complementing part is then sent
Feedback signal delay is adjusted to decoder；When spread spectrum signal enables, fractional part will be in addition plus the three of the generation of spread spectrum circuit
Angle wave；
Decoder is to decode value remaining in accumulator (8), is divided into high 3 and low 5, high 3 correspondences
8 control signals of phase selector, 32 thermometer-codes of low 5 then corresponding phase interpolation devices.Corresponding decoding table is as schemed.Its
In 32 thermometer-codes by low 6 Fractional dominations, the highest order in low 6 controls the direction of thermometer-code, this is because should
When the variation of position, the phase relation of the two-way phase signal of phase interpolator input can be flipped, and done so, be ensure that entire 8
The monotonicity of position programmable delayer.
Phase selector, the effect of phase selector are the phase signals for selecting two-way to close on according to control word, but defeated
Entering signal and there was only 8 tunnels, it is meant that only 7 phase intervals closed on cannot cover whole cycle, so when decoding value is 7,
Cki<0>will be delayed by a cycle, the phase interval closed on this creates the terminal 8, and cover whole cycle.
Phase interpolator, its effect of phase interpolator are to carry out under the control of thermometer-code to input signal ck1, ck2
Phase-interpolation, the key of phase interpolator are the interpolation linearities.
N/N+1 mould frequency divider, N/N+1 mould frequency divider mainly pass through five digit counters and carry out div_ to integral frequency divisioil preset number
Int [4:0] mould frequency dividing, output frequency division clock ckp；The 8 phase clock ck [7:0] generated by four-divider are to integral frequency divisioil
Clock is sampled, and the frequency-dividing clock cki [7:0] of eight phases is generated, then defeated by phase selection signal sel [8:1] selection cki
Ck1, ck2 out, cooperation phase-interpolation module realize 8 fractional frequency divisions truly.
Triangular-wave generator, the main triangular wave generated for modulating 8 fractional frequency division values.
Wherein, the output end of pre- 4 frequency dividing circuit is connect with N/N+1 mould frequency divider, the output end of triangular-wave generator and tired
Add device input connection, accumulator output connect respectively with N/N+1 mould frequency divider and decoder, the output of N/N+1 mould frequency divider and
Phase selector connection, the output of phase selector and decoder are connect with phase interpolator respectively.
Decimal frequency divider then uses phase delay compensation technique, while accumulator remainder and feedback signal and lock in modulator
There is proportional relations for phase difference between phase ring reference signal, and the remainder in accumulator is taken out, feedback letter is controlled after decoding
Number phase (programmable delayer) realize decimal truly to eliminate fractional frequency division bring phase error
Frequency dividing.
As an improvement of the above technical solution, the high-resolution low-power consumption spread spectrum based on phase delay compensation controls electricity
Road；For triangular-wave generator, input signal div_num [8:0], ssc_ppm [3:0] and ssc_cnt [9:0] control
The slope of triangular wave: k_triangular=div_num*ssc_ppm*2^9/ssc_cnt；Ssc_ppm [3:0] controls spread spectrum
Depth ssc_depth=- (ssc_ppm * 0.000488218).
The present invention has the advantage that the spread spectrum circuit is made of fractional frequency division circuit and triangular-wave generator, triangular wave
Generator generates the signal of fixed frequency, is superimposed upon the fractional part of frequency divider, so that entire fractional frequency division number is by triangular wave
Modulation, and then obtain spread spectrum output.Decimal frequency divider then uses phase delay compensation technique, while accumulator remainder in modulator
There is proportional relations for phase difference between feedback signal and phase-locked loop reference signal, the remainder in accumulator are taken out, decoding
The phase (programmable delayer) of feedback signal is controlled later, to eliminate fractional frequency division bring phase error, is realized true
Fractional frequency division in positive meaning.The present invention proposes a kind of new spread spectrum electricity for spread spectrum circuit under conditions of meeting low-power consumption
Line structure.Fractional frequency division bring phase error can be eliminated, to improve spread spectrum precision.And frequency dividing ratio can be carried out
Configuration, and passed through simulating, verifying.
Detailed description of the invention
Fig. 1 is spread spectrum circuit general structure schematic diagram of the present invention；
Fig. 2 is the pre- 4 frequency dividing circuit schematic diagram of the present invention；
Fig. 3 is the pre- 4 frequency dividing circuit simulation waveform schematic diagram of the present invention；
Fig. 4 is multi-accumulator structure schematic diagram of the present invention；
Fig. 5 is accumulator simulation waveform schematic diagram of the present invention；
Fig. 6 is phase selector schematic diagram of the present invention；
Fig. 7 is phase interpolator overall structure diagram of the present invention；
Fig. 8 is phase interpolator simulation result schematic diagram of the present invention；
Fig. 9 is N/N+1 frequency dividing circuit structural schematic diagram of the present invention；
Figure 10 is N/N+1 frequency dividing circuit simulation result schematic diagram of the present invention；
Figure 11 is triangular-wave generator top layer control word schematic diagram of the present invention；
Figure 12 is triangular-wave generator simulation result schematic diagram of the present invention；
Figure 13 is SSC test circuit diagram of the present invention；
Figure 14 is SSC output signal schematic diagram of the present invention.
Specific embodiment
Below in conjunction with attached drawing 1- Figure 14, the present invention is described in detail, technical solution in the embodiment of the present invention
It is clearly and completely described, it is clear that described embodiments are only a part of the embodiments of the present invention, rather than whole
Embodiment.Based on the embodiments of the present invention, those of ordinary skill in the art are obtained without making creative work
The every other embodiment obtained, shall fall within the protection scope of the present invention.
The present invention provides a kind of high-resolution low-power consumption spread spectrum control electricity based on phase delay compensation by improving herein
Road；Spread spectrum circuit overall structure is as shown in Figure 1, the spread spectrum circuit is made of fractional frequency division circuit and triangular-wave generator, triangle
Wave producer generates the signal of fixed frequency, is superimposed upon the fractional part of frequency divider, so that entire fractional frequency division number is by triangle
Wave modulation, and then obtain spread spectrum output.Decimal frequency divider then uses phase delay compensation technique, while accumulator remainder and anti-
There is proportional relations for phase difference between feedback signal and phase-locked loop reference signal, the remainder in accumulator are taken out, after decoding
The phase (programmable delayer) of control feedback signal realizes real meaning to eliminate fractional frequency division bring phase error
Fractional frequency division in justice.
Wherein, the spread spectrum control circuit specifically have including；
1. pre- 4 frequency dividing circuit: pre- 4 frequency circuit structure such as Fig. 2 is connected by 2 Differential Input d type flip flops (4 latch)
It constitutes, generates 8 phase outputs.Simulation result is as shown in Figure 3.
2. accumulator: it is illustrated in figure 4 multi-accumulator structure, accumulator adds up the fractional part of decimal control word repeatedly,
Quantization output is generated, complementing part is then sent to decoder and adjusts feedback signal delay.When spread spectrum signal enables, fractional part
The triangular wave that will be in addition generated plus spread spectrum circuit.Fig. 5 is the simulation waveform of accumulator.
3. decoder: decoder is to decode value remaining in accumulator (8), is divided into high 3 and low 5, high
8 control signals of 3 corresponding phase selectors, 32 thermometer-codes of low 5 then corresponding phase interpolation devices.Corresponding decoding
Table is as schemed.Wherein for 32 thermometer-codes by low 6 Fractional dominations, the highest order in low 6 controls the direction of thermometer-code,
This is because the phase relation of the two-way phase signal of phase interpolator input can be flipped when the position changes, do so,
It ensure that the monotonicity of entire 8 programmable delayers.
4. phase selector: such as the structure and working principle that Fig. 6 is phase selector, the effect of phase selector is root
According to the phase signal that control word selection two-way closes on, but input signal only has 8 tunnels, it is meant that only 7 phase regions closed on
Between, whole cycle cannot be covered, so cki<0>will be delayed by a cycle, and this creates the terminal 8 when decoding value is 7
A phase interval closed on, and cover whole cycle.
5. phase interpolator: phase interpolator overall structure such as Fig. 7, effect is under the control of thermometer-code to defeated
Enter signal ck1, ck2 carries out phase-interpolation, and the key of phase interpolator is the interpolation linearity, and phase interpolator simulation result is such as
Fig. 8, from the point of view of simulation result, the phase interpolator linearity is good.Entire 8 delayer simulation results such as Fig. 8.
6.N/N+1 mould frequency divider: being N/N+1 mould frequency divider, mainly by five digit counters to integer point as shown in Figure 10
Frequency preset number carries out div_int [4:0] mould frequency dividing, output frequency division clock ckp；The 8 phase clock ck generated by four-divider
[7:0] samples integral frequency divisioil clock, generates the frequency-dividing clock cki [7:0] of eight phases, then by phase selection signal
Sel [8:1] selects cki to export ck1, ck2, and cooperation phase-interpolation module realizes 8 fractional frequency divisions truly.Emulation
As a result such as Figure 12.
7. triangular-wave generator: main to generate for modulating 8 if Figure 11 ssc_cnt_gen is triangular-wave generator module
The triangular wave of position fractional frequency division value.Input signal div_num [8:0], ssc_ppm [3:0] and ssc_cnt [9:0] control triangle
The slope of wave: k_triangular=div_num*ssc_ppm*2^9；Ssc_ppm [3:0] controls spread spectrum depth ssc_depth
=-(ssc_ppm*0.000488218)；Simulation result Figure 12.
For the present invention, the spread spectrum circuit derivation of equation is as follows:
(1) spread spectrum depth calculation:
(2) spread spectrum frequency calculates:
If reference clock is 25MHz,
Ssc_cnt [9:0]=01,100 01101 (397)
25MHz/ (397*2)=31.48615KHz (spread spectrum frequency)
If reference clock is 30MHz,
Ssc_cnt [9:0]=01,110 11100 (476)
30MHz/ (476*2)=31.51261KHz (spread spectrum frequency).
Spread spectrum circuit total simulation of the present invention is as follows:
We build the spread spectrum of Figure 13 such as and test circuit, configuring condition are as follows: input signal ckp, ckn 5G, frequency dividing ratio
20, spread spectrum depth ssc_ppm are 1111 (about 15*500ppm=7500ppm), and modulating frequency ssc_cnt is matched by 31.5kHz
It sets.Simulation data result is consistent with the input configured as shown in figure 14.
The foregoing description of the disclosed embodiments enables those skilled in the art to implement or use the present invention.
Various modifications to these embodiments will be readily apparent to those skilled in the art, defined herein
General Principle can realize in other embodiments without departing from the spirit or scope of the present invention.Therefore, originally
Invention is not intended to be limited to the embodiments shown herein, and is to fit to special with principles disclosed herein and novelty
The consistent widest scope of point.
Claims (3)
1. a kind of high-resolution low-power consumption spread spectrum control circuit based on phase delay compensation, it is characterised in that: the spread spectrum circuit
With fractional frequency division circuit and triangular-wave generator；Triangular-wave generator generates the signal of fixed frequency, and it is small to be superimposed upon frequency divider
Number parts so that entire fractional frequency division number is by triangular modulation, and then obtain spread spectrum output.
2. a kind of high-resolution low-power consumption spread spectrum control circuit based on phase delay compensation according to claim 1, special
Sign is: the spread spectrum circuit specifically includes；
Pre- 4 frequency dividing circuit, pre- 4 frequency circuit structure is connected by 2 Differential Input d type flip flops to be constituted, and generates 8 phase outputs；
Accumulator, accumulator add up the fractional part of decimal control word repeatedly, generate quantization output, and complementing part is then sent to and translates
Code device adjusts feedback signal delay；When spread spectrum signal enables, fractional part will be in addition plus the triangular wave of spread spectrum circuit generation；
Decoder is to decode value remaining in accumulator, is divided into high 3 and low 5, high 3 corresponding phase selectors
8 control signals, 32 thermometer-codes of low 5 then corresponding phase interpolation devices, wherein 32 thermometer-codes are by low 6 scores
It controlling, the highest order in low 6 controls the direction of thermometer-code, when position variation, the two-way phase of phase interpolator input
The phase relation of position signal can be flipped, and done so, be ensure that the monotonicity of entire 8 programmable delayers；
Phase selector, the effect of phase selector is the phase signal for selecting two-way to close on according to control word, but inputs letter
Number only 8 tunnels, it is meant that only 7 phase intervals closed on, whole cycle cannot be covered, thus when decoding value be 7 when, cki <
0 > it will be delayed by a cycle, the phase interval closed on this creates the terminal 8, and cover whole cycle；
Phase interpolator, its effect of phase interpolator are to carry out phase to input signal ck1, ck2 under the control of thermometer-code
Interpolation, the key of phase interpolator are the interpolation linearities；
N/N+1 mould frequency divider, N/N+1 mould frequency divider mainly pass through five digit counters and carry out div_int to integral frequency divisioil preset number
[4:0] mould frequency dividing, output frequency division clock ckp；The 8 phase clock ck [7:0] generated by four-divider are to integral frequency divisioil clock
It is sampled, generates the frequency-dividing clock cki [7:0] of eight phases, then by phase selection signal sel [8:1] selection cki output
Ck1, ck2, cooperation phase-interpolation module realize 8 fractional frequency divisions truly；
Triangular-wave generator, the main triangular wave generated for modulating 8 fractional frequency division values；
Wherein, the output end of pre- 4 frequency dividing circuit is connect with N/N+1 mould frequency divider, the output end and accumulator of triangular-wave generator
Input connection, the output of accumulator are connect with N/N+1 mould frequency divider and decoder respectively, the output and phase of N/N+1 mould frequency divider
Digit selector connection, the output of phase selector and decoder are connect with phase interpolator respectively；
Decimal frequency divider then uses phase delay compensation technique, while accumulator remainder and feedback signal and phaselocked loop in modulator
There is proportional relations for phase difference between reference signal, and the remainder in accumulator is taken out, control feedback signal after decoding
Phase, so that fractional frequency division bring phase error, realizes fractional frequency division truly.
3. a kind of high-resolution low-power consumption spread spectrum control circuit based on phase delay compensation according to claim 2, special
Sign is:
For triangular-wave generator, input signal div_num [8:0], ssc_ppm [3:0] and ssc_cnt [9:0] control
The slope of triangular wave: k_triangular=div_num*ssc_ppm*2^9/ssc_cnt；It is deep that ssc_ppm [3:0] controls spread spectrum
It spends ssc_depth=- (ssc_ppm*0.000488218).
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| CN109765583A (en) * | 2019-03-04 | 2019-05-17 | 华通信安(北京)科技发展有限公司 | A kind of clock synchronizing method based on GNSS receiver pulse per second (PPS) |
| WO2020215208A1 (en) * | 2019-04-23 | 2020-10-29 | 京东方科技集团股份有限公司 | Clock spread spectrum circuit, electronic device and clock spread spectrum method |
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| CN109765583A (en) * | 2019-03-04 | 2019-05-17 | 华通信安(北京)科技发展有限公司 | A kind of clock synchronizing method based on GNSS receiver pulse per second (PPS) |
| WO2020215208A1 (en) * | 2019-04-23 | 2020-10-29 | 京东方科技集团股份有限公司 | Clock spread spectrum circuit, electronic device and clock spread spectrum method |
| US11381229B2 (en) | 2019-04-23 | 2022-07-05 | Beijing Boe Technology Development Co., Ltd. | Clock spread spectrum circuit, electronic equipment, and clock spread spectrum method |
| US11916557B2 (en) | 2019-04-23 | 2024-02-27 | Beijing Boe Technology Development Co., Ltd. | Clock spread spectrum circuit, electronic equipment, and clock spread spectrum method |
| US11949420B2 (en) | 2019-04-23 | 2024-04-02 | Beijing Boe Technology Development Co., Ltd. | Clock spread spectrum circuit, electronic equipment, and clock spread spectrum method |
| WO2021008362A1 (en) * | 2019-07-17 | 2021-01-21 | 晶晨半导体(上海)股份有限公司 | Digital frequency generator and state switching method therefor |
| CN113972902A (en) * | 2020-07-23 | 2022-01-25 | 京东方科技集团股份有限公司 | Clock signal generation circuit, clock signal generation method, and electronic apparatus |
| WO2022017033A1 (en) * | 2020-07-23 | 2022-01-27 | 京东方科技集团股份有限公司 | Clock signal production circuit, clock signal production method, and electronic device |
| US11831321B2 (en) | 2020-07-23 | 2023-11-28 | Boe Technology Group Co., Ltd. | Clock signal generation circuit and method, and electronic device |
| CN114283857A (en) * | 2021-12-16 | 2022-04-05 | 上海艾为电子技术股份有限公司 | Delay compensation of frequency division signal, frequency division method, system and frequency divider |
| CN114283857B (en) * | 2021-12-16 | 2024-05-28 | 上海艾为电子技术股份有限公司 | Delay compensation of frequency division signal, frequency division method, system and frequency divider |
| CN115664388A (en) * | 2022-12-26 | 2023-01-31 | 成都信息工程大学 | Triangular wave generating circuit for delta-sigma fractional frequency division phase-locked loop |
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