CN109714032A - A kind of impulse wave FM circuit and frequency modulation method based on DDS - Google Patents
A kind of impulse wave FM circuit and frequency modulation method based on DDS Download PDFInfo
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Abstract
The present invention relates to a kind of impulse wave FM circuit based on DDS, it include: modulating wave phase accumulator, RAM memory and latch, the output end of the modulating wave phase accumulator connects the input terminal of the RAM memory, the output end of the RAM memory connects the input terminal of the latch, and the output end of the latch sends frequency control word and impulse wave edge modulation parameter to DDS circuit and pulse wave generation circuit respectively；Wherein, the RAM memory is also used to receive chirp parameter.The present invention uses logic control, chirp parameter in due course rapidly extracting and latch RAM memory, it solves the problems, such as the flashing of previous impulse wave frequency modulation, can be exported with impulse wave frequency modulation (PFM), thus the modulation function in terms of realizing pulse wave frequency rate.
Description
Technical field
The invention belongs to field of signal modulation, and in particular to a kind of impulse wave FM circuit and frequency modulation method based on DDS.
Background technique
Currently, the frequency sweep and frequency modulation function that are directed to waveform are mainly using in the field of sine wave and any wave.Such as public affairs
Generation digital modulation signals disclosed in the number of opening CN101776935A " a kind of digital modulation signal generator based on DDS "
The basic principle of scheme, frequency modulation or frequency sweep is as shown in Figure 1.The generation of the undulating path microcontroller of modulation waveform and fundamental wave is write
Enter in corresponding RAM (static random access memory), modulating wave and fundamental wave are equally realized using basic DDS principle, modulation parameter
It is generated by microcontroller, modulating wave is exported from RAM, is multiplied to obtain the frequency deviation system for having symbol with the frequency modulation of needs
Number, is finally added in real time with the frequency word of fundamental wave or subtracts each other to obtain the frequency control word of fundamental wave frequency modulation or frequency sweep, thus real
The function of existing sine wave or periodically any wave frequency sweep or frequency modulation.
But above-mentioned DDS (direct synthesizer) class signal source is not possible to solve the function of impulse wave frequency sweep and frequency modulation,
Main reason is that using above-mentioned common impulse wave frequency modulation scheme, i.e., using microcontroller it is in due course send ginseng a group by a group
Number data, it is known that the transmission of microcontroller is discontinuous；And when impulse wave carries out frequency sweep or frequency modulation, need to send is related to
It is huge to change the number of parameters such as pulse wave frequency rate, simultaneously because the variable range of frequency is too big, it is therefore desirable to number of parameters ten
It is point huge, thus the calculating of parameter and memory space consumed by storing can be bigger and lead to the problem of waveform flashing occur, institute
It still can not achieve the function of impulse wave frequency sweep and frequency modulation with the prior art.
Summary of the invention
In view of the above-mentioned problems, the object of the present invention is to provide a kind of impulse wave FM circuit and frequency modulation method based on DDS,
Realize that generating a kind of pair of pulse wave signal using FPGA (field programmable gate array) in DDS signal generator carries out frequency tune
The output of function processed carries out frequency sweep output, the result of impulse wave frequency modulation (PFM) output to impulse wave to reach.
To achieve the above object, the present invention takes following technical scheme:
Impulse wave FM circuit of one of the present invention based on DDS, comprising: modulating wave phase accumulator, RAM memory
And latch, the output end of the modulating wave phase accumulator connect the input terminal of the RAM memory, the RAM storage
The output end of device connects the input terminal of the latch, and to DDS circuit and impulse wave electricity occurs for the output end of the latch
Road sends frequency control word and impulse wave edge modulation parameter respectively；Wherein, the RAM memory is also used to receive frequency modulation ginseng
Number.
Preferably, the latch further includes Logic control module, the Logic control module receive the DDS circuit with
And the sign bit of impulse wave phase value and control signal that pulse wave generation circuit is sent respectively.
Preferably, the modulating wave phase accumulator further include: phase addition device and register, the register is to institute
State phase addition device feedback modulation wave phase value, the phase addition device calculates frequency of modulated wave and modulating wave phase value and value
And it exports to the register.
Preferably, the chirp parameter includes: frequency control word and impulse wave edge modulation parameter.
Preferably, the RAM memory is using the blocky Static RAM in FPGA.
Impulse wave frequency modulation method of one of the present invention based on DDS, comprising: according to the sign bit of impulse wave phase value to
DDS circuit sends the frequency control word latched；The impulse wave latched is sent to pulse wave generation circuit according to control signal
Edge modulation parameter.
Preferably, the method also includes: read modulating wave phase value；According to the high significance bit of the modulating wave phase value
Corresponding chirp parameter is read, and the corresponding chirp parameter is latched；The chirp parameter includes: frequency control word
And impulse wave edge modulation parameter.
Preferably, comprising: chirp parameter is stored in advance in the blocky Static RAM of FPGA.
Preferably, when the sign bit is rising edge, Xiang Suoshu DDS circuit sends the frequency control word latched.
Invention additionally discloses a kind of impulse wave frequency modulation method based on DDS, comprising: send the symbol of impulse wave phase value
Position obtains the frequency control word latched in FPGA according to the sign bit；Control signal is sent, according to the control signal acquisition
The impulse wave edge modulation parameter latched in FPGA.
Impulse wave FM circuit based on DDS and frequency modulation method in the present invention use logic control, in due course fast lock
The chirp parameter in RAM memory is deposited and extracted, solves the problems, such as the flashing of previous impulse wave frequency modulation, it can be with impulse wave frequency modulation
(PFM) it exports, thus the modulation function in terms of realizing pulse wave frequency rate.
Detailed description of the invention
Fig. 1 is sine wave or periodically any wave frequency sweep or FM circuit structural schematic diagram in the prior art；
Fig. 2 is impulse wave FM circuit structural schematic diagram in the embodiment of the present invention；
Fig. 3 A is modulating wave sine wave reference waveform figure provided by the embodiment of the present invention；
Fig. 3 B is the modulated waveform diagram of impulse wave PFM provided by the embodiment of the present invention；
Fig. 4 is the timing chart after the frequency modulation of the output of frequency modulation method provided by the embodiment of the present invention.
Specific embodiment
The present invention is described in detail below with reference to the accompanying drawings and embodiments.
The embodiment of the present invention provides a kind of impulse wave FM circuit based on DDS, as shown in Figure 2, comprising: modulating wave phase
Accumulator 201, RAM memory 202 and latch 203, the modulating wave phase accumulator 201 output end connection described in
The input terminal of RAM memory 202, the output end of the RAM memory 202 connect the input terminal of the latch 203, the lock
The output end of storage 203 sends frequency control word and impulse wave to DDS circuit 204 and pulse wave generation circuit 205 respectively
Edge modulation parameter, the frequency control word are the frequency control words for modulating afterpulse wave；Wherein, the RAM memory 202 is gone back
For receive modulation afterpulse wave needed for chirp parameter, wherein chirp parameter include modulate afterpulse wave frequency control word with
And impulse wave edge modulation parameter, and impulse wave edge modulation parameter further comprises: rising time parameter RiseTime, under
Drop is along time parameter FallTime, rising edge Floating-point Computation parameter RiseFPU and failing edge Floating-point Computation parameter FallFPU.
Preferably, the output end of the latch 203 is also to duty needed for the transmission impulse wave of pulse wave generation circuit 205
Than parameter, the impulse wave FM circuit as described in the embodiment of the present invention is primarily directed to the modulation in terms of frequency, duty ratio category
In fixed value, it is not belonging to chirp parameter, so duty cycle parameters only need microcontroller to be sent directly to a fixed register i.e.
Can, it does not need to be stored in RAM as chirp parameter.In specific embodiment, DDS circuit and pulse wave generation circuit need to be adopted
With the DDS circuit and pulse wave generation circuit of the efficient low jitter for being different from the circuit that normal pulsed wave generates, that is, pass through upper
It rises and joins along time parameter, failing edge time parameter, rising edge Floating-point Computation parameter, failing edge Floating-point Computation parameter and duty ratio
It counts to control the generation of impulse wave, the impulse wave of generation has the characteristics that low jitter.Due to the DDS circuit with efficient low jitter
And pulse wave generation circuit is not invention which is intended to be protected, therefore the specific structure of the part is not implemented in the present invention
It is repeated in example.
Specifically, frequency modulation needed for modulation afterpulse wave is stored in advance in RAM memory 202 in embodiments of the present invention
Parameter, the algorithm that the chirp parameter DATA is determined by microcontroller (not shown) according to DDS framework and the modulation being arranged
Wave type calculates chirp parameter, then by microcontroller by all tune for modulation afterpulse wave under each frequency point of impulse wave
Frequency parameter is sent to FPGA, and the chirp parameter received is written in RAM memory 202 by FPGA.Since FPGA belongs to hardware
Circuit can occupy a large amount of resources of chip so FPGA itself is not suitable for doing the calculating of floating-point class, especially division calculation, and
And the speed of service is slower, so the present invention will need the data of Floating-point Computation to calculate by microcontroller, then is stored to RAM storage
In device.Wherein, the method and non-present invention of the modulating wave type calculating chirp parameter of algorithm and setting are determined according to the framework of DDS
The range protected, therefore be not described in detail in embodiments of the present invention.Preferably, the output end of the latch 203 is first to DDS electricity
Road sends frequency control word, sends impulse wave edge modulation parameter after the delay of experience first, then to pulse wave generation circuit, should
First delay and DDS circuit calculate impulse wave phase value and to be sent to the delay of pulse wave generation circuit identical, to guarantee every time
The pulse wave frequency rate of generation changes in waveform and frequency of modulated wave with modulating wave, and the edge time of impulse wave and duty
Than can all be consistent.
In preferred embodiment, the latch further includes Logic control module 2031, the Logic control module 2031
Sign bit and the control of the impulse wave phase value that the DDS circuit 204 and pulse wave generation circuit 205 are sent are received respectively
Signal.Specifically, DDS circuit 204 carries out Accumulating generation pulse wave phase to frequency control word using impulse wave phase accumulator
The sign bit MSB of Accumulating generation impulse wave phase value is sent to latch 203 as carry signal by value, DDS circuit 204, with
The chirp parameter latched in latch 203 is read, can accomplish that different tune can be set in impulse wave under each period in this way
Frequency parameter can effectively realize the frequency dependences such as frequency sweep and the frequency modulation of impulse wave according to the data for being written to RAM memory 202
Modulation function.Wherein, the sign bit MSB of impulse wave phase value is the highest order of the phase value.
Logic control module 2031 receives the sign bit MSB for the impulse wave phase value that the DDS circuit 204 is sent, according to
Sign bit MSB receives control signal, root to after 204 feedback frequency control word of DDS circuit, then from pulse wave generation circuit 205
According to the control signal to the 205 feedback pulse wave edge modulation parameter of pulse wave generation circuit.Therefore in the embodiment of the present invention
In, Logic control module 2031 is mainly used for receiving DDS circuit 204 and pulse wave generation circuit 205 respectively to latch 203
The sign bit and control signal of the impulse wave phase value of sending, with the ginseng of frequency modulation needed for the in due course output of instruction latch 203
Number, is finally reached the effect of frequency modulation and frequency sweep.
In a preferred embodiment of the invention, since impulse wave cannot change its characteristic, institute in signal period signal
It is used after each impulse wave end cycle with the embodiment of the present invention, when the next period starts to the impulse wave of next cycle
Carry out frequency modulation.Therefore when each end cycle of impulse wave, DDS circuit 204 is by the impulse wave phase value of Accumulating generation
Sign bit MSB is sent to latch as carry signal, to change the impulse wave in next period when next cycle starts
Frequency.
Impulse wave FM circuit described in the embodiment of the present invention based on DDS, preferably, as shown in Fig. 2, the modulating wave
Phase accumulator 201 further include: phase addition device 2011 and register 2012, the register 2012 is to the phase addition
2011 feedback modulation wave phase value of device is that the phase addition device 2011 calculates frequency of modulated wave and modulating wave phase value and be worth simultaneously
Output passes through modulating wave its object is to make frequency of modulated wave is cumulative to obtain modulating wave phase value to the register 2012
Phase value reads corresponding chirp parameter to latch from RAM memory 202.Specifically, interception modulating wave phase value
High 11 virtual values read corresponding chirp parameter in RAM reservoir 202, and the chirp parameter read every time is passed through latch
203 are latched；Wait Logic control module 2031 instruction, and according to instruction latch 203 in due course to DDS circuit 204 with
And pulse wave generation circuit 205 exports required part chirp parameter respectively.
Impulse wave FM circuit described in the embodiment of the present invention based on DDS uses preferably, the RAM stores 202 devices
Blocky Static RAM in FPGA, which is FPGA included, all in this way
Frequency sweep, frequency modulation can be realized directly in FPGA, and extraneous resource is no longer rely on, and not only save hardware resource, but also data pass
Defeated more quick, timing and function are easier to design and control.
The impulse wave FM circuit based on DDS through the foregoing embodiment, using a series of logic control, in due course
, quickly extract RAM memory in chirp parameter, solve the problems, such as the flashing of previous impulse wave frequency modulation, can be with pulse
Wave frequency modulation (PFM) output, thus the modulation function in terms of realizing pulse wave frequency rate.
The embodiment of the present invention also provides a kind of impulse wave frequency modulation method based on DDS, comprising: according to impulse wave phase value
Sign bit sends the frequency control word latched to DDS circuit；It has been latched according to control signal to the transmission of pulse wave generation circuit
Impulse wave edge modulation parameter.The frequency control word is the frequency control word for modulating afterpulse wave.Specifically, DDS circuit
And pulse wave generation circuit need to use the efficient low jitter pulse wave generation circuit for being different from the circuit that normal pulsed wave generates,
Adjusted by rising time parameter, failing edge time parameter, rising edge Floating-point Computation parameter, failing edge Floating-point Computation parameter etc.
Frequency parameter and duty cycle parameters control the generation of frequency modulation afterpulse wave.Preferably, working as the symbol of impulse wave phase value
When position is rising edge, Xiang Suoshu DDS circuit sends the frequency control word latched；After the delay of experience first, then to impulse wave
Circuit occurs and sends impulse wave edge modulation parameter.Wherein, before sending chirp parameter, first the chirp parameter is latched.
Preferably, duty cycle parameters needed for sending impulse wave to pulse wave generation circuit simultaneously according to control signal.
In preferred embodiment, chirp parameter DATA is stored in advance in the blocky Static RAM of FPGA, wherein
The chirp parameter includes: frequency control word and impulse wave edge modulation parameter.
Impulse wave frequency modulation method provided in an embodiment of the present invention based on DDS, preferably, the method also includes: it reads
Modulating wave phase value；Corresponding chirp parameter is read according to the high significance bit of the modulating wave phase value, and will be corresponding described
Chirp parameter is latched；Specifically, high 11 virtual values of interception modulating wave phase value read the included bulk static state of FPGA
Corresponding chirp parameter in random access memory (BRAM) first latches the chirp parameter read every time by latch, etc.
The instruction of sign bit and control signal to impulse wave phase value, and according to instruction latch in due course to DDS circuit and arteries and veins
It rushes wave generation circuit and exports required frequency control word and impulse wave edge modulation parameter respectively.
The embodiment of the present invention also provides another impulse wave frequency modulation method based on DDS, comprising: sends impulse wave phase value
Sign bit, the frequency control word that latches in FPGA is obtained according to the sign bit；Control signal is sent, is believed according to the control
Number obtain the impulse wave edge modulation parameter latched in the FPGA.It is carried specifically, chirp parameter is pre-stored in FPGA
Blocky Static RAM (BRAM), wherein the chirp parameter include: frequency control word and impulse wave edge modulation
Parameter.And then by frequency control word and impulse wave edge modulation parameter corresponding to latches corresponding frequencies, pass through hair
The sign bit of impulse wave phase value is sent to trigger FPGA difference output frequency control word and impulse wave edge modulation parameter, it is final right
The impulse wave carries out frequency sweep or frequency modulation.
Carry out the frequency modulation method that the present invention will be described in detail is realized below by specific embodiment.
In specific embodiment, an impulse wave is needed to export in a manner of frequency modulation modulation (PFM), hereinafter referred to as PFM, this reality
Applying example uses sine wave as modulating wave.Assuming that impulse wave frequency itself is 10MHz, modulating frequency 1MHz, and impulse wave
Frequency shift (FS) be 5MHz, can be obtained by this way impulse wave frequency be minimum 5MHz (10MHz-5MHz), be up to 15MHz
(10MHz+5MHz) is using sine wave as the reference waveform of modulating wave, between amplitude normalization to ± 1 as shown in Figure 3A；Fig. 3 B
Pass through the modulated waveform diagram of PFM for modulating wave, frequency arrives the frequency modulation(PFM) of impulse wave according to the characteristic of modulating wave sine wave
Between 5MHz to 15MHz.After knowing the frequency of each frequency point of impulse wave, microcontroller calculates impulse wave need according to the frequency
Rising time parameter, failing edge time parameter, rising edge Floating-point Computation parameter and failing edge Floating-point Computation parameter are wanted, finally
Impulse wave after generating frequency modulation.
There are 16 effective widths with modulation waveform, for depth is 2048 points, the embodiment of the present invention also use with
Sine wave is the impulse wave of the equally accurate of modulating wave, therefore sets the RAM memory for storing chirp parameter to 2048 depth,
The frequency point of the modulating wave of the sinuso sine protractor in Fig. 3 B is divided into 2048 points, according in figure by sine wave phase from 0 degree to 360
Degree is stored in RAM memory in order, calculates chirp parameter corresponding to each point for 2048 points.Due to each impulse wave
There is accuracy requirement, so bit wide needed for chirp parameter is wider, therefore sets RAM memory to 108 bit wides, 2048 depth,
The chirp parameter arrangement of each frequency point as shown in Table 1, if some parameter less than 108 bit wides, with 0 by its high-order benefit
Foot.Wherein, 0~47 data bit storage frequency control word, 48~71 data bit storage rising time parameters, 72~95
Data bit stores failing edge time parameter, and 96~101 data bit store rising edge Floating-point Computation parameter, 102~107 data
Position storage failing edge Floating-point Computation parameter.
The arrangement of one impulse wave single frequency point parameter of table
As shown in Table 2, example is extracted for chirp parameter.Wherein, first it is classified as data number, second is classified as modulating wave phase
Place value, third are classified as 2048 108 data of deposit RAM memory, i.e. 2048 chirp parameters, each data An~En
It indicates, n is 0 to 2047, and the RAM memory output in table is changed according to the change of modulating wave phase value, is paid special attention to
It is that, when the frequency of modulating wave is larger, chirp parameter corresponding to some data can not necessarily be exported from RAM memory, but
It is the process for having no effect on modulation waveform, it is therefore desirable to determine which, which is exported, adjusts according to the modulating frequency actual conditions of modulating wave
Frequency parameter, when the sign bit MSB's (highest order) of pulse wave phase is upper to waiting after latch output data for RAM memory
Edge is risen, if the rising edge of MSB temporarily, chirp parameter reads from latch, if the not rising edge of MSB, always
The data for being kept for last time latched.The specific data instance such as number 1 in table, corresponding to phase modulation be 0, deposited in RAM
The chirp parameter stored in reservoir includes frequency word A0, rising time parameter RiseTime B0, failing edge time parameter
FallTime C0, rising edge Floating-point Computation parameter RiseFPU D0, failing edge Floating-point Computation parameter FallFPU F0.Latch
And then to A0, B0, C0, D0 and F0 chirp parameter is latched.When pulse wave phase sign bit MSB rising edge arrive, A0, B0, C0,
D0 and F0 is read respectively into DDS circuit and pulse wave generation circuit, and then generates required modulating pulse wave.From table
As can be seen that the output of RAM memory changes according to the change of modulating wave phase value, data are according to symbol in latch LATCH
Number position MSB rising edge temporarily can be just read, and guarantee the parameter of impulse wave in the sign bit MSB of impulse wave phase value in this way
Rising edge temporarily changes simultaneously, and the edge time of impulse wave and duty ratio can be all consistent.It is of course also possible to use working as
The failing edge of sign bit MSB as triggering latch signal, specific implementation process with it is disclosed in this invention similar.
Two chirp parameter of table extracts example
As shown in figure 4, the schematic diagram of the actual modulated afterpulse wave for impulse wave PFM (impulse wave frequency modulation) output, from figure
In it is known, the rising edge and failing edge and duty ratio of the impulse wave after frequency modulation all do not change, and the frequency of only impulse wave exists
Change, individual frequency modulation(PFM) is perfectly realized for impulse wave.
To sum up, circuit and method described in the embodiment of the present invention overcome the previous transmission number in due course using microcontroller
According to, but there are discontinuous problems.Next increases in due course logic control, cooperates DDS circuit and impulse wave that electricity occurs
Road reaches the modulation effect of pulse wave frequency rate, guarantees that data are small, transmission is fast, the characteristics of taking up less resources.
The present invention is not limited to above-mentioned preferred forms, anyone can show that other are various under the inspiration of the present invention
The product of form, however, make any variation in its shape or structure, it is all that there is skill identical or similar to the present application
Art scheme, is within the scope of the present invention.
Claims (10)
1. a kind of impulse wave FM circuit based on DDS characterized by comprising modulating wave phase accumulator, RAM memory
And latch, the output end of the modulating wave phase accumulator connect the input terminal of the RAM memory, the RAM storage
The output end of device connects the input terminal of the latch, and to DDS circuit and impulse wave electricity occurs for the output end of the latch
Road sends frequency control word and impulse wave edge modulation parameter respectively；Wherein, the RAM memory is also used to receive frequency modulation ginseng
Number.
2. the impulse wave FM circuit according to claim 1 based on DDS, which is characterized in that the latch further includes
Logic control module, the Logic control module receive the pulse that the DDS circuit and pulse wave generation circuit are sent respectively
The sign bit and control signal of wave phase value.
3. the impulse wave FM circuit according to claim 1 based on DDS, which is characterized in that the modulation wave phase is tired
Add device further include: phase addition device and register, the register is to the phase addition device feedback modulation wave phase value, institute
It states phase addition device calculates frequency of modulated wave and modulating wave phase value and value and exports to the register.
4. the impulse wave FM circuit according to claim 1 based on DDS, which is characterized in that the chirp parameter includes:
Frequency control word and impulse wave edge modulation parameter.
5. the impulse wave FM circuit according to claim 1 based on DDS, which is characterized in that the RAM memory uses
Blocky Static RAM in FPGA.
6. a kind of impulse wave frequency modulation method based on DDS characterized by comprising according to the sign bit of impulse wave phase value to
DDS circuit sends the frequency control word latched；The edge tune latched is sent to pulse wave generation circuit according to control signal
Parameter processed.
7. the impulse wave frequency modulation method according to claim 6 based on DDS, which is characterized in that the method also includes: it reads
Take modulating wave phase value；Corresponding chirp parameter is read according to the high significance bit of the modulating wave phase value, and by corresponding institute
Chirp parameter is stated to be latched；The chirp parameter includes: frequency control word and impulse wave edge modulation parameter.
8. the impulse wave frequency modulation method according to claim 7 based on DDS characterized by comprising in the bulk of FPGA
Chirp parameter is stored in advance in Static RAM.
9. the impulse wave frequency modulation method according to claim 6 based on DDS, which is characterized in that when the sign bit is upper
Rise along when, Xiang Suoshu DDS circuit sends the frequency control word that has latched.
10. a kind of impulse wave frequency modulation method based on DDS characterized by comprising the sign bit of impulse wave phase value is sent,
The frequency control word latched in FPGA is obtained according to the sign bit；Control signal is sent, according to the control signal acquisition
The impulse wave edge modulation parameter latched in FPGA.
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| CN111327301A (en) * | 2020-04-14 | 2020-06-23 | 京东方科技集团股份有限公司 | Pulse width modulation circuit, modulation method and electronic equipment |
| CN111327301B (en) * | 2020-04-14 | 2022-04-19 | 京东方科技集团股份有限公司 | Pulse width modulation circuit, modulation method and electronic equipment |
| US11949422B2 (en) | 2020-04-14 | 2024-04-02 | Beijing Boe Technology Development Co., Ltd. | Pulse width modulation circuit, method for pulse width modulation, and electronic device |
| CN114878879A (en) * | 2022-07-11 | 2022-08-09 | 天津普智芯网络测控技术有限公司 | Detection pulse modulation and use method suitable for different communication ports |
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