CN1894793A - 集成电路熔断器和制造方法 - Google Patents

集成电路熔断器和制造方法 Download PDF

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Publication number
CN1894793A
CN1894793A CNA2004800376194A CN200480037619A CN1894793A CN 1894793 A CN1894793 A CN 1894793A CN A2004800376194 A CNA2004800376194 A CN A2004800376194A CN 200480037619 A CN200480037619 A CN 200480037619A CN 1894793 A CN1894793 A CN 1894793A
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CN
China
Prior art keywords
conductive layer
type
junction
integrated circuit
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CNA2004800376194A
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English (en)
Chinese (zh)
Inventor
约翰·M·扬
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Analog Devices Inc
Original Assignee
Analog Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Analog Devices Inc filed Critical Analog Devices Inc
Publication of CN1894793A publication Critical patent/CN1894793A/zh
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/49—Adaptable interconnections, e.g. fuses or antifuses
    • H10W20/493—Fuses, i.e. interconnections changeable from conductive to non-conductive

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  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
CNA2004800376194A 2003-12-17 2004-12-17 集成电路熔断器和制造方法 Pending CN1894793A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US53014603P 2003-12-17 2003-12-17
US60/530,146 2003-12-17

Publications (1)

Publication Number Publication Date
CN1894793A true CN1894793A (zh) 2007-01-10

Family

ID=34700102

Family Applications (1)

Application Number Title Priority Date Filing Date
CNA2004800376194A Pending CN1894793A (zh) 2003-12-17 2004-12-17 集成电路熔断器和制造方法

Country Status (5)

Country Link
US (1) US20050133882A1 (https=)
EP (1) EP1702361A2 (https=)
JP (1) JP2007515072A (https=)
CN (1) CN1894793A (https=)
WO (1) WO2005059968A2 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113574693A (zh) * 2019-03-22 2021-10-29 索尼半导体解决方案公司 半导体装置和包括半导体装置的电子设备

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7146217B2 (en) * 2000-07-13 2006-12-05 Northstar Neuroscience, Inc. Methods and apparatus for effectuating a change in a neural-function of a patient
US20050258505A1 (en) * 2004-05-20 2005-11-24 Taiwan Semiconductor Manufacturing Co., Ltd. Mixed implantation on polysilicon fuse for CMOS technology
US7915093B1 (en) * 2006-10-24 2011-03-29 National Semiconductor Corporation System and method for manufacturing an integrated circuit anti-fuse in conjunction with a tungsten plug process
US9917052B2 (en) * 2015-11-25 2018-03-13 International Business Machines Corporation Method of fabricating anti-fuse for silicon on insulator devices
JP6926806B2 (ja) * 2017-08-09 2021-08-25 富士電機株式会社 半導体装置及びその製造方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5015604A (en) * 1989-08-18 1991-05-14 North American Philips Corp., Signetics Division Fabrication method using oxidation to control size of fusible link
US5384727A (en) * 1993-11-08 1995-01-24 Advanced Micro Devices, Inc. Fuse trimming in plastic package devices
US5622892A (en) * 1994-06-10 1997-04-22 International Business Machines Corporation Method of making a self cooling electrically programmable fuse
US6033939A (en) * 1998-04-21 2000-03-07 International Business Machines Corporation Method for providing electrically fusible links in copper interconnection
US5973977A (en) * 1998-07-06 1999-10-26 Pmc-Sierra Ltd. Poly fuses in CMOS integrated circuits
US6031275A (en) * 1998-12-15 2000-02-29 National Semiconductor Corporation Antifuse with a silicide layer overlying a diffusion region
US6323534B1 (en) * 1999-04-16 2001-11-27 Micron Technology, Inc. Fuse for use in a semiconductor device
JP3445536B2 (ja) * 1999-10-04 2003-09-08 三洋電機株式会社 半導体装置
US6624499B2 (en) * 2002-02-28 2003-09-23 Infineon Technologies Ag System for programming fuse structure by electromigration of silicide enhanced by creating temperature gradient
US6815800B2 (en) * 2002-12-09 2004-11-09 Micrel, Inc. Bipolar junction transistor with reduced parasitic bipolar conduction
US6911360B2 (en) * 2003-04-29 2005-06-28 Freescale Semiconductor, Inc. Fuse and method for forming
US6933591B1 (en) * 2003-10-16 2005-08-23 Altera Corporation Electrically-programmable integrated circuit fuses and sensing circuits
JP4004484B2 (ja) * 2004-03-31 2007-11-07 シャープ株式会社 固体撮像素子の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113574693A (zh) * 2019-03-22 2021-10-29 索尼半导体解决方案公司 半导体装置和包括半导体装置的电子设备

Also Published As

Publication number Publication date
US20050133882A1 (en) 2005-06-23
WO2005059968A2 (en) 2005-06-30
EP1702361A2 (en) 2006-09-20
WO2005059968A3 (en) 2005-09-09
JP2007515072A (ja) 2007-06-07

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WD01 Invention patent application deemed withdrawn after publication