CN1875463A - 于晶体管工艺中整合高k栅极电介质的方法 - Google Patents

于晶体管工艺中整合高k栅极电介质的方法 Download PDF

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CN1875463A
CN1875463A CNA2004800326142A CN200480032614A CN1875463A CN 1875463 A CN1875463 A CN 1875463A CN A2004800326142 A CNA2004800326142 A CN A2004800326142A CN 200480032614 A CN200480032614 A CN 200480032614A CN 1875463 A CN1875463 A CN 1875463A
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C·B·拉贝尔
B-Y·昂
J·S·全
A·K·霍尔布鲁克
相奇
H·钟
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Abstract

依据一示范实施例，在衬底(104)上形成场效应晶体管的方法，衬底包含位于其上的高K介电层以及位于高K介电层上的栅电极层，此方法包括蚀刻(202)步骤，蚀刻(202)栅极介电层和高K介电层以形成栅极堆叠(102)，栅极堆叠包含位于该衬底(104)上的高K电介质片段(106)以及位于该高K电介质片段(106)上的栅电极片段(108)。依据此示范实施例，该方法进一步包括在栅极堆叠(102)上进行(202)氮化处理。举例而言，氮化处理可利用含有氮的等离子体在栅极堆叠(102)的侧壁(110)上进行氮化，氮化处理造成氮进入高K电介质片段(106)并在高K电介质片段(106)中形成氧扩散阻挡层。

Description

于晶体管工艺中整合高K栅极电介质的方法
技术领域
本发明系关于半导体装置的领域，更详言之，本发明系关于场效应晶体管的制造领域。
背景技术
当诸如P型场效应晶体管(PFET)和N型场效应晶体管(NFET)的场效应晶体管(”FET”)的尺寸逐渐缩小的同时，半导体制造商利用具有高介电系数(“高K”)的栅极电介质改善FET的效能和可靠性。因诸如二氧化硅的习知栅极电介质太薄且导致高穿遂电流(tunneling current)以及其它的问题降低FET的效能和可靠性，使得高K栅极电介质在小特征尺寸技术中引起注意。然而，在将高K栅极电介质整合晶体管制造过程之时出现一些问题。
在并入高K栅极电介质的习知晶体管制造工艺中，可藉由在栅极蚀刻工艺中蚀刻栅电极层和位于栅电极层及衬底间的高K介电层而形成栅极堆叠。包括诸如多晶硅的导电材料的栅电极层以及包括诸如氧化锆、氧化铪或其它高K材料的高K介电层典型地在等离子体蚀刻室中以等离子体进行蚀刻。然而，在等离子体蚀刻期间，等离子体会破坏包括栅电极和高K电介质片段的暴露部分的栅极堆叠侧壁。例如，等离子体可蚀刻移除部份高K电介质材料，且会破坏高K电介质的化学结构。在栅极蚀刻工艺后，一般会在栅极堆叠上进行湿式清洁处理以移除污染物。然而，湿式清洁处理将同时剥除一些高K电介质材料而破坏高K电介质。此外，在后续工艺步骤时氧气会侧向扩散进入高K栅极电介质而改变高K栅极电介质材料以及晶体管栅极的特性。
因此，在此技术领域中需要一种有效率的工艺于晶体管工艺中整合高K栅极电介质。
发明内容
本发明的提出解决在此技术领域中于晶体管工艺中整合高K栅极电介质的需求。
依据一示范实施例，在衬底上形成场效应晶体管的方法包括蚀刻栅电极层和高K介电层以形成栅极堆叠的步骤，该衬底包含位于其上的高K介电层以及位于高K介电层上的栅电极层，栅极堆叠包含位于衬底上的高K电介质片段(segment)以及位于高K电介质片段的栅电极。高K电介质片段可为例如氧化铪、硅酸铪、氧化锆、硅酸锆或氧化铝，而栅电极片段可为多晶硅。
依据本示范实施例，该方法复包括在栅极堆叠上进行氮化处理(nitridation氮化物化处理，本文中简称为氮化处理)。举例而言，氮化处理可藉由等离子体对栅极堆叠的侧壁进行氮化，该等离子体包含氮，氮化处理会造成氮进入高K电介质片段并在高K电介质片段中形成氧扩散阻挡层。在一实施例中，蚀刻栅电极层和高K介电层的步骤系在第一处理室中进行，而在栅极堆叠上进行氮化处理系在第二处理室中进行。本发明的其它特征及好处将在熟悉此技术领域的人员阅读详细说明和相关的图式后更臻明确。
附图说明
图1显示具有依据本发明的一实施例的示范栅极堆叠的示范结构剖面图；以及
图2显示依据本发明的一实施例的示范方法。
具体实施方式
本发明系针对于晶体管工艺中整合高K栅极电介质的方法。接下来的叙述包含属于本发明欲达成的明确讯息。在此技术领域的技术人员将了解本发明可以不同于本申请所讨论的特定方法达成。此外，为不使本发明的焦点模糊，一些发明的特别细节将不会在此作详细的讨论。
本申请的图式和对图式的说明系针对本发明的示范实施例。为求简明，本发明的其它实施例将不在本申请中特别描述也不会特地显示在图式中。
图1显示具有依据本发明的一实施例的示范栅极堆叠的示范结构剖面图。结构100具有位于衬底104上的栅极堆叠102。栅极堆叠102包括高K电介质片段106以及栅电极片段108，并具有侧壁110。在一实施例中，栅极堆叠102包括位于高K电介质片段和衬底104间的介面层(未图标于图1中)。结构100显示在晶体管工艺中的用于形成诸如NFET或PFET的具有栅极堆叠102的FET的中间步骤流程。
如图1所示，高K电介质片段106位于衬底104上且包括诸如氧化铪、硅酸铪、氧化锆、硅酸锆或氧化铝的高K栅极电介质。在此必须注意到，上述以及本申请中其它部分所提及的高K电介质只是特定的范例，其也可使用其它的高K电介质材料，本发明并非限制于使用在此所提到的高K电介质。在进一步的范例中，高K电介质片段106的厚度范围在约20.0至大约100.0间。在图1中同时显示，栅电极片段108位于高K电介质片段106上且可由多晶硅构成。举例而言，栅电极片段108的厚度范围在大约500.0至大约1500.0之间。
包括高K电介质片段106和栅极电介质片段108的栅极堆叠102可藉由在栅极蚀刻工艺中分别对高K介电层和栅电极层进行蚀刻而形成。在栅极蚀刻工艺之前，可在衬底104上形成高K介电层而栅电极层可以在此技术领域中熟知的方法在高K介电层上形成。举例而言，在栅极蚀刻工艺中，高K介电层和栅电极层的蚀刻可在工艺室中藉由等离子体蚀刻完成。在本发明的晶体管工艺流程中，在栅极堆叠102形成后，在栅极堆叠上进行氮化处理。氮化的处理系利用包含氮的等离子体对例如侧壁110的栅极堆叠102暴露表面进行氮化，其中包含氮的等离子体亦即氮等离子体。氮化处理可在与上述栅极蚀刻工艺中形成栅极堆叠102的相同工艺室中进行。在一实施例中，氮化处理可在与执行栅极蚀刻工艺不相同的处理室中进行。在此实施例中，于栅极蚀刻工艺之后，再将具有栅极堆叠102的晶圆从执行栅极蚀刻工艺的处理室中移除，并在湿式清洁工具中于晶圆上执行湿式清洁处理。具有栅极堆叠102的晶圆于是放置于另一个工艺室中，此工艺室即是在栅极堆叠102上进行氮化处理的处理室。在一实施例中，硅化物化处理可在栅极蚀刻工艺执行后立刻在栅极堆叠102上进行。
藉由在栅极蚀刻工艺之后进行氮化处理以氮化栅极堆叠102的侧壁110，本发明工艺流程可利用氮化处理修复在栅极蚀刻处理期间于栅极堆叠102上造成的破坏。此外，在氮化处理期间，将氮引入高K电介质片段106中，藉此，引入高K电介质片段106中的氮会形成阻挡层(barrier)，以避免在后续的工艺步骤中产生不必要的氧侧向扩散。在本发明利用具有介面层的栅极堆叠的一实施例中，介面层具有氮，氮化处理可补偿在栅极蚀刻工艺间于介面层中所耗尽的氮化物。
在氮化处理进行之后，本发明的晶体管工艺流程接着进行类似习知的晶体管工艺流程。举例而言，可在邻近栅极堆叠102的衬底中布植源极/漏极区域，可在栅极堆叠102的侧壁110邻近区域形成隔间层(spacer)，可进行迅速热退火工艺以及其它可完成如FET的晶体管所需要的工艺步骤。
图2显示依据本发明的一实施例的示范方法。此将省去流程图200的某些细节和特征，因在此技术领域的技术人员已明显了解流程图200。举例而言，省去的步骤系为具有在此技术领域熟知的一个或多个子步骤或牵涉特定仪器或材料的步骤。在流程图200的步骤202中，位于衬底上的高K介电层以及位于高K介电层上的栅电极层经由蚀刻而形成栅极堆叠。举例而言，可藉由对栅电极层和高K介电层进行适当的蚀刻以及藉由在栅极蚀刻工艺中使用等离子体蚀刻的方法，以形成具有位于衬底104上的高K电介质片段106以及位于高K电介质片段106上的栅电极片段的栅极堆叠102。
在步骤204中，于栅极蚀刻工艺执行后，在栅极堆叠上进行氮化处理，氮化处理可在与栅极蚀刻工艺相同的工艺室中进行。在一实施例中，氮化处理可在与栅极蚀刻处理不相同的处理室中进行。在步骤206中，晶体管工艺流程系进行完成晶体管工艺所需的工艺步骤。举例而言，可在邻近栅极堆叠102的衬底中布植源极/漏极区域，可在栅极堆叠102的侧壁110邻近区域形成隔间层，可进行其它可完成如FET的晶体管所需要的工艺步骤。
因此，如上所述，藉由在栅极蚀刻工艺后进行氮化处理，本发明的工艺流程可利用氮化处理修复在栅极蚀刻工艺期间所造成的栅极堆叠破坏。此外，本发明的氮化处理将氮引入栅极堆叠的高K电介质片段中，使氮形成一阻挡层，可避免在后续工艺步骤中产生不必要的侧向氧扩散进入高K电介质片段。
从以上本发明的示范实施例的叙述，各种技术可用于在不违背本发明的范畴中实施本发明的概念。此外，本发明系以此些实施例作叙述，熟悉此技术领域的人员可在不悖离本发明的精神与范畴下将其形式和细节进行修改。在此叙述的范例实施例系视为说明而非限制。在此必须了解，本发明并非限制在此叙述的特定范例实施例中，而是在不悖离本发明的范畴下可做许多重新排置、修改以及替换。
如前所述，此为一种于晶体管工艺中整合高K栅极电介质的方法。

Claims (10)

1.一种于衬底(104)上形成场效应晶体管的方法，该衬底(104)包含位于该衬底(104)上的高K介电层以及位于该高K介电层上的栅电极层，该方法包括以下步骤：
蚀刻(202)该栅电极层和该高K介电层以形成栅极堆叠(102)，该栅极堆叠(102)包含位于该衬底(104)上的高K电介质片段(106)以及位于该高K电介质片段(106)上的栅电极片段(108)；
在该栅极堆叠(102)上进行(204)氮化处理。
2.如权利要求1所述的方法，其中，在该栅极堆叠(102)上进行(204)该氮化处理的步骤包括利用等离子体对该栅极堆叠(102)的侧壁(110)进行氮化，该等离子体包含氮。
3.如权利要求1所述的方法，其中，在该栅极堆叠(102)上进行(204)该氮化处理的步骤造成氮进入该高K电介质片段(106)，该氮在该高K电介质片段(106)中形成氧扩散阻挡层。
4.一种于衬底(104)上形成场效应晶体管的方法，该衬底(104)包含位于该衬底(104)上的高K介电层以及位于该高K介电层上的栅电极层，该方法包括蚀刻(202)该栅电极层和该高K介电层以形成栅极堆叠(102)的步骤，该栅极堆叠(102)包含位于该衬底(104)上的高K电介质片段(106)以及位于该高K电介质片段(106)上的栅电极片段(108)，该方法的特征为：
在该栅极堆叠(102)上进行(204)氮化处理。
5.如权利要求4所述的方法，其中，在该栅极堆叠(102)上进行(204)该氮化处理的步骤包括利用等离子体对该栅极堆叠(102)的侧壁(110)进行氮化，该等离子体包含氮。
6.如权利要求4所述的方法，其中，在该栅极堆叠(102)上进行(204)该氮化处理的步骤造成氮进入该高K电介质片段(106)，该氮在该高K电介质片段(106)中形成氧扩散阻挡层。
7.一种于衬底(104)上形成场效应晶体管的方法，该衬底(104)包含位于该衬底(104)上的高K介电层以及位于该高K介电层上的栅电极层，该方法包含以下步骤：
蚀刻(202)该栅电极层和该高K介电层以形成栅极堆叠(102)，该栅极堆叠(102)包含位于该衬底(104)上的高K电介质片段(106)以及位于该高K电介质片段(106)上的栅电极片段(108)，该栅极堆叠(102)包含侧壁(110)；
利用(204)氮等离子体氮化该栅极堆叠(102)的该侧壁(110)。
8.如权利要求7所述的方法，其中，利用(204)该氮等离子体氮化该栅极堆叠(102)的该侧壁(110)的步骤造成氮进入该高K电介质片段(106)，该氮在该高K电介质片段(106)中形成氧扩散阻挡层。
9.如权利要求7所述的方法，其中，蚀刻(202)该栅电极层和该高K介电层以形成该栅极堆叠(102)的步骤是在处理室中进行，用该处理室来进行利用(204)氮等离子体氮化该栅极堆叠(102)的该侧壁(110)的步骤。
10.如权利要求7所述的方法，其中，蚀刻(202)该栅电极层和该高K介电层以形成该栅极堆叠(102)的步骤是在第一处理室中进行，而利用(204)氮等离子体氮化该栅极堆叠(102)的该侧壁(110)的步骤是在第二处理室中进行。
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