CN1790042A - Multiplex test method for semiconductor wafer and multiplex test probe station therefor - Google Patents
Multiplex test method for semiconductor wafer and multiplex test probe station therefor Download PDFInfo
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- CN1790042A CN1790042A CN 200510102170 CN200510102170A CN1790042A CN 1790042 A CN1790042 A CN 1790042A CN 200510102170 CN200510102170 CN 200510102170 CN 200510102170 A CN200510102170 A CN 200510102170A CN 1790042 A CN1790042 A CN 1790042A
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Abstract
The invention discloses a multipath detecting method of semi-conductor crystal disk with probe table host controlling the multipath switching device to make the detector of detecting set connecting each group of detecting probe. The multipath detecting probe table is characterized by the following: the multipath test and communication software are inserted in the host of probe table; the test probe is chip test probe with multipath test probe connecting multiple chips simultaneously; the marking device is multipath marking device, which marks the irregular chip controlled by probe table host; the quantity of multipath switching device is the same as the test probe of multichip test probe; the multipath switching device connects the test probe through the other control line, which connects the test probe with each corresponding a group of test probe of multichip test probe separately. The invention can finish testing at least two detected semiconductor chips in one moving period, which improves the test speed and efficiency greatly.
Description
Technical field
The present invention relates to the semiconductor crystal wafer built-in testing, especially relate to a kind of semiconductor crystal wafer multi-channel test method and multi-channel test probe station.
Background technology
The purpose of semiconductor crystal wafer built-in testing is to pick the defective chip that selects in the silicon wafer.Generally adopt at present the multi-channel test technology of test machine control, it be with probe station as the precision positioning unit, switch to different semi-conductor chips to be measured by test machine control internal relay and test, its method is that following steps are arranged successively:
(1) will be placed on by the silicon wafer that a plurality of chips are formed on the probe station;
(2) probe station navigates to the lower position of semi-conductor chip to be measured by Electric Machine Control XY motion platform, again by Electric Machine Control Z to lifting mechanism with the wafer lifting that makes progress, make semi-conductor chip engaged test pin to be measured;
(3) send the signal that begins to test by probe station to test machine, test machine carries out the test that semi-conductor chip to be measured comprises electric current, voltage, frequency after receiving the beginning test signal;
(4) after test was finished, test machine was sent to probe station with test result, and probe station carries out the corresponding processing of marking on the defective chip that is included in according to test result;
(5) the automatic motion positions of probe station continues next test loop to the position of next semi-conductor chip to be measured, and repeating step (2)～(4) are until the test of finishing whole wafer.
Because the test of a chip is once only finished in the every motion of probe station, therefore there is slow, the inefficient problem of speed.
Summary of the invention
Technical matters to be solved by this invention is the defective that remedies above-mentioned prior art, provides a kind of and is switched to that different body chips to be measured is tested and controlled the corresponding multichannel semiconductor crystal wafer multi-channel test method that device marks to unacceptable product of marking by the probe station main frame according to test result by probe station host computer control multi-channel switcher.
Another technical matters to be solved by this invention provides a kind of multi-channel test probe station of implementing above-mentioned semiconductor crystal wafer multi-channel test method.
For semiconductor crystal wafer multi-channel test method of the present invention, its technical matters is solved like this:
This semiconductor crystal wafer multi-channel test method, adopt the probe station main frame as the precision positioning unit, to be placed on the probe station main frame by the wafer that a plurality of semi-conductor chips are formed earlier, cooperate with test machine and to carry out semiconductor die testing, then by the test probe on the probe station host computer control semi-conductor chip engaged test to be measured probe.
The characteristics of this semiconductor crystal wafer multi-channel test method are:
Again by probe station host computer control multi-channel switcher, the measuring head that makes test machine successively be connected the back testing machine with each group test probe and send the beginning test signal.
For semiconductor crystal wafer multi-channel test method of the present invention, its technical matters is further to solve like this:
Following steps are arranged successively:
(1) will be placed on the probe station main frame by the wafer that a plurality of semi-conductor chips are formed;
(2) cooperate with test machine and finish semiconductor die testing, the probe station main frame is controlled the setting movement of XY workbench at every turn and is contacted at least two semi-conductor chips to be measured simultaneously, control then Z to lifting mechanism with the wafer lifting that makes progress, make the test probe on the semi-conductor chip engaged test probe to be measured;
(3) control each semi-conductor chip to be measured and test machine connection successively by probe station host computer control one multi-channel switcher, make measuring head and first group of test probe connection back testing machine of test machine send the beginning test signal earlier, test machine carries out chip testing after receiving commencing signal;
(4) after test was finished, test machine was sent to the probe station main frame with test result, and the probe station main frame carries out respective handling according to test result to first chip;
(5) probe station host computer control multi-channel switcher is connected the measuring head of test machine and second group of test probe;
(6) the probe station main frame sends the beginning test signal to test machine, and test machine carries out chip testing after receiving commencing signal;
(7) after test was finished, test machine was sent to the probe station main frame with test result, and the probe station main frame carries out respective handling according to second chip of test result;
(8) repeating step (3)～(7) are until the test of finishing a plurality of chips to be measured, the setting movement of probe station host computer control XY workbench is to position of semiconductor chip to be measured then, control again Z to lifting mechanism with the wafer lifting that makes progress, make the test probe on the semi-conductor chip engaged test probe to be measured;
(9) test that next organizes semi-conductor chip to be measured is carried out in repeating step (3)～(7).
Described XY workbench, Z to the motion of lifting mechanism respectively by an Electric Machine Control.
Described chip testing comprises the test of electric current, voltage, frequency.
It is described that chip is carried out respective handling is if test chip is defective, test machine just earlier sends the test failure signal to the probe station main frame, send the end test signal then, if test chip is qualified, test machine will send the end test signal only for the probe station main frame; After the probe station main frame receives the test failure signal, send the instruction of marking to the device of marking immediately, mark for defective chip by the device of marking.
Preferred scheme is that described marking is by probe station host computer control road tapper ink distribution point on relevant chip.
For the multi-channel test probe station of implementing semiconductor crystal wafer multi-channel test method of the present invention, its technical matters is solved like this:
This multi-channel test probe station, comprise probe station main frame, test probe head, order wire, control line and the device of marking, described test probe head is fixedly installed on the probe station main frame, the described device of marking is connected with the probe station main frame by control line, and the probe station main frame is connected with the test machine interface of external adapted by order wire.
The characteristics of this multi-channel test probe station are:
Described probe station main frame embeds multi-channel test and communication software;
Described test probe head is the multi-chip test probe head, which is provided with many groups test probe that can be connected with a plurality of chips simultaneously;
The described device of marking is the way multichannel identical with the test probe quantity of the multi-chip test probe head device of marking, and marks for the defective chip that tests out by the probe station host computer control;
Described marking is to get controller ready by certain road tapper ink distribution point on relevant chip by the probe station main frame by control line control multichannel, and perhaps controlling corresponding apparatus provides subsequent handling to use with computer document, the storage of print file form test result.
Preferred scheme is the multichannel tapper that the described device of marking is an ink distribution point on defective chip.Also be provided with by p-wire and be connected with external test machine and the identical multi-channel switcher of test probe quantity of way and multi-chip test probe head, described multi-channel switcher passes through another control line and links to each other with the probe station main frame, and by the switching of probe station host computer control multi-channel switcher, one group of test probe of the multi-chip test probe head that the p-wire that test machine is drawn is corresponding with each road respectively is communicated with respectively.
The technical matters of this multi-channel test probe station is further to solve like this:
Described multi-channel switcher is made up of many group relaies, and an end of relay normally open contact is connected to test machine, and the other end is connected to the multi-channel test probe, and the multi-channel test probe is connected with semi-conductor chip to be measured in test station.By the different relay power closure of probe station host computer control, can needn't carry out X, Y, Z under situation about moving at the probe station main frame, realize finishing test in test machine and different semi-conductor chip connection to be measured and the multichannel communication multiple telecommunication process between probe station main frame and test machine.
The function of described multi-channel switcher can also realize with other machinery, electric, optoelectronic switch.
The present invention can finish the test of at least two semi-conductor chips to be measured in a period of motion of probe station main frame under the condition that test machine does not make any changes, improve test speed and efficient more significantly.
Description of drawings
Below the contrast accompanying drawing and in conjunction with embodiment the present invention is further detailed explanation:
Fig. 1 is that the structure of multi-channel test probe station of the present invention is formed block scheme;
Fig. 2 is the composition isometric plan of multi-channel test probe station of the present invention.
Embodiment
A kind of multi-channel test probe station that is used for the test of triode wafer
Multi-channel test probe station as shown in Figure 1, 2, comprise and embed probe station main frame 2 that multi-channel test and communication software are arranged, be fixedly installed on the multichannel tapper 10 that multi-chip test probe head 5, multichannel on the probe station main frame 2 got controller 6 ready and be subjected to its control, the p-wire 7 that multi-chip test probe head 5 is drawn by the multi-channel switcher 4 and the test machine 1 of external adapted is connected, and multi-chip test probe head 5 is provided with many groups test probe that can be connected with a plurality of chips simultaneously.
Multichannel tapper 10 is the way multichannel identical with the test probe quantity of multi-chip test probe head 5 devices of marking, multichannel is got controller 6 ready and directly is connected with probe station main frame 2 by control line 11, marks for the defective chip ink distribution point that tests out by 2 controls of probe station main frame.
Also be provided with by p-wire 7 and be connected with external test machine 1 and the identical multi-channel switcher 4 of test probe quantity of way and multi-chip test probe head 5, multi-channel switcher 4 links to each other with probe station main frame 2 by control line 9, and by 4 switchings of probe station main frame 2 control multi-channel switchers, one group of test probe of the multi-chip test probe head 5 that the p-wire 7 that test machine 1 is drawn is corresponding with each road respectively is communicated with respectively.
Multi-channel switcher 4 is made up of many group relaies, and an end of relay normally open contact is connected to test machine 1, and the other end is connected to multi-chip test probe head 5, and multi-chip test probe head 5 is connected with semi-conductor chip 8 to be measured in test station.By the different relay power closure of probe station main frame 2 controls, can needn't carry out X, Y, Z under situation about moving at probe station main frame 2, realize test machine 1 and different semi-conductor chip to be measured 8 connections, finish test by the multichannel communication multiple telecommunication between probe station main frame 2 and test machine 1.
The job step of this multi-channel test probe station is as follows:
(1) will be placed on the probe station main frame 2 by the wafer that a plurality of semi-conductor chips are formed;
(2) cooperate with test machine 1 and finish semiconductor die testing, probe station main frame 2 each control driven by motor XY workbenches move to semi-conductor chip to be measured 8 positions, measuring head and first group of test probe of test machine 1 are connected, control then Z to lifting mechanism with the wafer lifting that makes progress, make the test probe on the semi-conductor chip 8 engaged test probes 5 to be measured;
(3) probe station main frame 2 sends the beginning test signal to test machine 1, and waits for test machine 1 return path signal, and test machine 1 carries out chip testing after receiving commencing signal, and test event comprises electric current, voltage, the isoparametric test of frequency.
(4) after test was finished, test machine 1 was sent to probe station main frame 2 with test result, and probe station main frame 2 carries out respective handling according to test result to first chip 8 (1);
(5) probe station main frame 2 control multi-channel switchers 4 are connected the measuring head of test machine 1 and second group of test probe;
(6) probe station main frame 2 sends the beginning test signal to test machine 1, and test machine 1 carries out chip testing after receiving commencing signal;
(7) after test was finished, test machine 1 was sent to probe station main frame 2 with test result, and probe station main frame 2 carries out respective handling according to second chip of test result 8 (2);
(8) repeating step (3)～(7) are until the test of finishing a plurality of chips to be measured, the 2 control XY workbench setting movements of probe station main frame are to semi-conductor chip to be measured 8 positions then, control again Z to lifting mechanism with the wafer lifting that makes progress, make the test probe on the semi-conductor chip 8 engaged test probes to be measured;
(9) test that next organizes semi-conductor chip to be measured is carried out in repeating step (3)～(7).
Probe station main frame 2 whenever moves the test that once can finish a plurality of chips like this, has improved test speed and efficient more significantly.
It is described that chip is carried out respective handling is if test chip is defective, test machine 1 just earlier sends the test failure signal to probe station main frame 2, send the end test signal then, if test chip is qualified, test machine 1 will send the end test signal only for probe station main frame 2; After probe station main frame 2 receives the test failure signal, send the instruction of marking to multichannel tapper 6 immediately, mark at corresponding defective chip ink distribution point by certain road tapper.
With triode 13007 tests commonly used is example, suppose that die size is 0.8 * 0.8 millimeter, and the run duration that probe station fortune moves a step is 300 milliseconds, and the test duration is 100 milliseconds, adopts to have only 150 of test chips of method of testing per minute now; And employing method of testing of the present invention, 4 chips of each test, probe station X is set to 0.8 millimeter to the motion step pitch, Y is set to 3.2 millimeters to the motion step pitch, the run duration that probe station fortune moves a step is similarly 300 milliseconds, 400 milliseconds of test durations, but 342 of per minute test chips, test speed improves 128%.
Above content be in conjunction with concrete preferred implementation to further describing that the present invention did, can not assert that concrete enforcement of the present invention is confined to these explanations.For the general technical staff of the technical field of the invention, without departing from the inventive concept of the premise, can also make some simple deduction or replace, all should be considered as belonging to the scope of patent protection that the present invention is determined by claims of being submitted to.
Claims (10)
1. semiconductor crystal wafer multi-channel test method, adopt the probe station main frame as the precision positioning unit, to be placed on the probe station main frame by the wafer that a plurality of semi-conductor chips are formed earlier, cooperate with test machine and to carry out semiconductor die testing, by the test probe on the probe station host computer control semi-conductor chip engaged test to be measured probe, it is characterized in that then:
Again by probe station host computer control multi-channel switcher, the measuring head that makes test machine successively be connected the back testing machine with each group test probe and send the beginning test signal.
2. according to the described semiconductor crystal wafer multi-channel test of claim 1 method, it is characterized in that:
Following steps are arranged successively:
(1) will be placed on the probe station main frame by the wafer that a plurality of semi-conductor chips are formed;
(2) cooperate with test machine and finish semiconductor die testing, the probe station main frame is controlled the setting movement of XY workbench at every turn and is contacted at least two semi-conductor chips to be measured simultaneously, control then Z to lifting mechanism with the wafer lifting that makes progress, make the test probe on the semi-conductor chip engaged test probe to be measured;
(3) control each semi-conductor chip to be measured and test machine connection successively by probe station host computer control one multi-channel switcher, make measuring head and first group of test probe connection back testing machine of test machine send the beginning test signal earlier, test machine carries out chip testing after receiving commencing signal;
(4) after test was finished, test machine was sent to the probe station main frame with test result, and the probe station main frame carries out respective handling according to test result to first chip;
(5) probe station host computer control multi-channel switcher is connected the measuring head of test machine and second group of test probe;
(6) the probe station main frame sends the beginning test signal to test machine, and test machine carries out chip testing after receiving commencing signal;
(7) after test was finished, test machine was sent to the probe station main frame with test result, and the probe station main frame carries out respective handling according to second chip of test result;
(8) repeating step (3)～(7) are until the test of finishing a plurality of chips to be measured, the setting movement of probe station host computer control XY workbench is to position of semiconductor chip to be measured then, control again Z to lifting mechanism with the wafer lifting that makes progress, make the test probe on the semi-conductor chip engaged test probe to be measured;
(9) test that next organizes semi-conductor chip to be measured is carried out in repeating step (3)～(7).
3. according to claim 1 or 2 described semiconductor crystal wafer multi-channel test methods, it is characterized in that:
Described XY workbench, Z to the motion of lifting mechanism respectively by an actuating mechanism controls.
4. according to the described semiconductor crystal wafer multi-channel test of claim 3 method, it is characterized in that:
Described chip testing comprises the test of electric current, voltage, frequency, optical parameter.
5. multi-channel test probe station, comprise probe station main frame, test probe head, order wire, control line and the device of marking, described test probe head is fixedly installed on the probe station main frame, the described device of marking is connected with the probe station main frame by control line, the probe station main frame is connected with the test machine interface of external adapted by order wire, it is characterized in that:
Described probe station main frame embeds multi-channel test and communication software;
Described test probe head is the multi-chip test probe head, which is provided with many groups test probe that can be connected with a plurality of chips simultaneously;
The described device of marking is the way multichannel identical with the test probe quantity of the multi-chip test probe head device of marking, and marks for the defective chip that tests out by the probe station host computer control;
Also be provided with by p-wire and be connected with external test machine and the identical multi-channel switcher of test probe quantity of way and multi-chip test probe head, described multi-channel switcher is connected with test probe head on being fixedly installed on the probe station main frame by another control line, and one group of test probe of the multi-chip test probe head that the measuring head of test machine is corresponding with each road is communicated with respectively.
6. according to the described multi-channel test probe station of claim 5, it is characterized in that:
Described probe station main frame embeds multi-channel test and communication software.
7. according to the described multi-channel test probe station of claim 6, it is characterized in that:
Described test probe head is the multi-chip test probe head, which is provided with many groups test probe that can be connected with a plurality of chips simultaneously.
8. according to the described multi-channel test probe station of claim 7, it is characterized in that:
The described device of marking is the way multichannel identical with the test probe quantity of the multi-chip test probe head device of marking, and marks for the defective chip that tests out by the probe station host computer control.
9. according to the described multi-channel test probe station of claim 8, it is characterized in that:
Described marking is to get controller ready by certain road tapper ink distribution point on relevant chip by the probe station main frame by control line control multichannel, and perhaps controlling corresponding apparatus provides subsequent handling to use with computer document, the storage of print file form test result.
10. according to the described semiconductor crystal wafer multi-channel test of claim 9 method, it is characterized in that:
Described multi-channel switcher is made up of many group relaies, and an end of relay normally open contact is connected to test machine, and the other end is connected to the multi-channel test probe, and the multi-channel test probe is connected with semi-conductor chip to be measured in test station.
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