CN1716695A - 构建和封装印刷天线装置的设备和方法 - Google Patents

构建和封装印刷天线装置的设备和方法 Download PDF

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CN1716695A
CN1716695A CNA2005100809394A CN200510080939A CN1716695A CN 1716695 A CN1716695 A CN 1716695A CN A2005100809394 A CNA2005100809394 A CN A2005100809394A CN 200510080939 A CN200510080939 A CN 200510080939A CN 1716695 A CN1716695 A CN 1716695A
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antenna
planar substrate
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CN100555747C (zh
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布赖恩·鲍尔·高彻尔
刘兑现
乌尔里希·理查德·鲁道夫·普非弗尔
托马斯·马丁·兹维克
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q9/00Electrically-short antennas having dimensions not more than twice the operating wavelength and consisting of conductive active radiating elements
    • H01Q9/04Resonant antennas
    • H01Q9/16Resonant antennas with feed intermediate between the extremities of the antenna, e.g. centre-fed dipole
    • H01Q9/26Resonant antennas with feed intermediate between the extremities of the antenna, e.g. centre-fed dipole with folded element or elements, the folded parts being spaced apart a small fraction of operating wavelength
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R29/00Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
    • G01R29/08Measuring electromagnetic field characteristics
    • G01R29/10Radiation diagrams of antennas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64Impedance arrangements
    • H01L2223/66High-frequency adaptations
    • H01L2223/6661High-frequency adaptations for passive devices
    • H01L2223/6677High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73207Bump and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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Abstract

本发明给出了印刷天线装置,可工作在,例如,RF和微波频率,同时给出天线性能特性,例如高的增益/方向性/辐射效率、高带宽、半球形辐射场型、阻抗等,使得该天线适合于,例如,声音通信、数据通信或雷达应用。此外,还给出了用于将这种印刷天线装置与IC(集成电路)芯片(例如收发器)整体封装以构建IC封装用于,例如,无限通信应用的设备。

Description

构建和封装印刷天线装置的设备和方法
技术领域
本发明一般涉及用于无线或RF(射频)通信系统的天线,更特定地,涉及提供高带宽和效率具有基本半球形辐射场型的印刷天线设计,还涉及以IC(集成电路)芯片封装该天线的设备和方法。
背景技术
为了为无线网络——例如无线PAN(个人区域网)、无线LAN(局域网)、无线WAN(广域网)、手机网络或实际上任何无线电网络或系统——中的装置之间提供无线连接和通信,必须使接收器和发射器(或收发器)装备有天线以向/从网络的其它单元有效地辐射(发射)或接受所需的信号。
各种类型的天线都可用于这样的通信网络和装置中,包括,例如,如图1所示的传统的印刷电路天线。更特定地,图1绘出传统的平面电路板天线(10),包含平面电介质衬底(11)(或电路板),具有位于地平面(13)之上与之相距h的印刷天线(12),其中印刷天线(12)和地平面(13)形成在电介质衬底(11)的相对侧上。如图1所示在下方具有反射地平面的电介质衬底/电路板上具有印刷天线的天线框架通常用在需要将天线辐射限制在天线(1)的上半球的应用中。
发明内容
如图1所示具有框架的传统印刷天线装置的一个显著缺点在于,这样的设计限制了能够实现的带宽-效率乘积。实际上,通常只能牺牲效率来获得高的带宽。天线“效率”是天线辐射的功率和输入天线的功率之间关系的一个度量(无损天线提供100%的效率)。天线效率将会因为电阻损耗和阻抗失配而降低。
此外,另一个影响带宽-效率乘积的参数是衬底材料的介电常数。使用具有更低介电常数的衬底材料可以导致更高的带宽-效率乘积。因此,在像图1所示的印刷天线设计中通常使用具有衬底材料可获得的最低介电常数2.1的PTFE基衬底,因为它们可提供好的带宽-效率乘积设计,例如在80%效率时有10%带宽。
然而,如果需要通过C4球将天线与MMW(毫米波)IC相连,那么用于在PTFE基衬底上生成馈送和天线图案的腐蚀技术的容差以及通过能力都不能满足要求。实际上,现有的具有足够容差的金属沉积方法(薄膜技术)都不能用于PTFE基材料。因此,当具有图1的传统框架的印刷天线设计工作在MMW频率且要通过C4球与IC相连时,需要具有更高介电常数的衬底材料,从而导致了具有更小带宽-效率乘积的天线。另外,使用PTFE基衬底所导致的带宽-效率乘积并不适用于所有应用。
一般地,本发明的示例性实施方案一般包括印刷天线装置,可工作在RF和微波频率,同时给出好的天线性能特性,例如高的增益/方向性/辐射效率、高带宽、半球形辐射场型、阻抗等,使这样的天线适用于,例如,声音通信、数据通信或雷达应用。
更特定地,在本发明的某一示例性实施方案中,天线装置包含平面衬底、形成在平面衬底第一表面上的天线图形,以及基本平行于且错开平面衬底的第一表面并面向天线图形的地平面。天线图形可包含可印刷在平面衬底上的各种类型的天线中某一种,这些天线类型包括,但不局限于:贴片天线(例如,共面贴片)、偶极天线、折叠偶极天线、单极天线、环形天线等。此外,就示例性天线实施方案,可用空气或低介电常数材料——例如泡沫——来填充地平面和平面衬底之间的空间。
在本发明的另一示例性实施方案中,天线装置可包括形成在平面衬底的第一表面上的天线馈送网络。天线馈送网络可包括阻抗匹配网络。
在本发明的又一示例性实施方案中,天线包括形成在平面衬底的第一表面、与平面衬底的第一表面相对的第二表面或者平面衬底的第一和第二表面上的束状图形,以减小沿平面衬地平面的方向上的辐射和/或增强天线的半球形辐射场型(即,提高天线的方向性)。
本发明的示例性实施方案进一步包括根据本发明将印刷天线装置与IC(集成电路)芯片(例如收发器)整体封装以便为,例如,无线通信应用构建IC封装的设备和方法。特定地,根据本发明实施方案的印刷天线装置能够以相对较小的地平面有效地工作,这使得实现了这种天线与IC芯片在相对较小的、尺寸类似于现有的用于,例如,收发器IC的带引线载体或无引线芯片载体的封装中的紧凑封装。
更特定地,在本发明某一示例性实施方案中,IC(集成电路)封装装置包含:封装衬底,具有形成在其表面上的地平面;IC芯片,焊接在封装衬底上;平面衬底,包含形成在平面衬底第一表面上的天线图形,其中平面衬底倒装焊在IC芯片上,从而天线图形面向封装衬底的地平面并且平面衬底的第一表面基本平行于且错开封装衬底的底表面;封装盖,形成在封装基底衬底之上以密封IC芯片合平面衬底,其中封装盖包含开口,暴露平面衬底第二表面上与平面衬底第一表面具有天线图形的部分相对的部分。
下面将会描述本发明的这些和其它示例性实施方案、方面、目的、特征和优点,或者通过下面示例性实施方案的详细描述将会使其更清楚,详细描述结合附图一起阅读。
附图说明
图1为示出传统印刷天线设计的示意图。
图2为示出根据本发明示例性实施方案的印刷天线装置的示意图。
图3A为示出包含根据本发明示例性实施方案的印刷折叠偶极天线的示例性原型机天线装置的示意图。
图3B示意性示出为图3A的示例性原型机天线装置提供地平面和空气腔的金属桥结构。
图4图示出对60GHz天线装置测量和得到的垂直辐射场型,该装置基于图3A的框架建造和模拟。
图5A和5B为示出对60GHz天线装置测量和得到的阻抗匹配参数(S11)的图解图,该装置基于图3A的框架建造和模拟。
图6A和6B为示出根据本发明示例性实施方案用于整体封装天线和IC(集成电路)芯片的设备的示意图。
图7A~7F为根据本发明示例性实施方案可用于图2所绘天线框架的各种平面天线的示意图。
具体实施方式
本发明的示例性实施方案一般包括印刷天线装置,该装置能够,例如,工作在RF和微波频率,而同时又给出像高的增益/方向性/辐射效率、高带宽、半球形辐射场型、阻抗等天线性能特性,使得该天线适合于,例如,声音通信、数据通信或雷达应用。本发明的示例性实施方案进一步包括根据本发明将印刷天线装置与IC(集成电路)芯片(例如,收发器)整体封装以构建IC封装用于,例如,无线通信应用的设备和方法。特定地,根据本发明实施方案的印刷天线装置能够以相对较小的地平面有效地工作,这使得实现了这种天线与IC芯片在相对较小的、尺寸类似于现有的用于,例如,收发器IC的带引线载体或无引线芯片载体的封装中的紧凑封装。实际上,举例来说,根据本发明设计工作在大约20GHz或更高的谐振频率的天线足够小,可以与这样的已有IC芯片封装在一起。
现在参看图2,示意图示出根据本发明示例性实施方案的天线装置。特定地,图2为根据示例性实施方案的印刷天线装置(20)的剖面示意图,包含厚度(t)的平面衬底(21)、形成在衬底(21)表面上的印刷天线电路(22)(和馈送网络)以及平面金属地平面(23)。平面金属地平面(23)基本平行于平面衬底(21),面向天线图形(22)。地平面(23)与印刷天线(22)的表面相距一定距离(h),从而在地平面(23)和衬底(21)形成印刷天线(22)的表面之间形成空间(24)(或空腔)。在某一示例性实施方案中,空间/空腔(24)可填充空气(介电常数=1)。在另一示例性实施方案中,空间/空腔可填充泡沫材料,它具有相对较低的接近于空气的介电常数(例如,介电常数=1.1)。
取决于所需的应用和/或工作频率,印刷天线(22)可包含一个或多个不同类型的印刷平面天线,包括,例如,偶极天线(图7A)、折叠偶极天线(图7B)、环形天线(图7C)、矩形环天线(图7D)、贴片天线(图7E)、共面贴片天线(图7F)、单极天线,等,还包含一个或多个不同类型的天线馈送和/或阻抗匹配网络,例如平衡微分线、共面线,等。
另外,取决于天线的实现,衬底(21)可包含任何合适的材料,包括,例如,像熔融硅石(SiO2)、氧化铝、聚苯乙烯、陶瓷、特富龙基衬底、FR4等电介质或绝缘材料,或者像高阻硅或GaAs等半导体材料。一般地,印刷天线(22)(和可选的馈送网络)可通过使用,例如熟练的技术人员所熟知的方法沉积并构图像铜或金这样的薄膜导电材料来形成。在这点上,根据本发明的示例性天线装置(20)保持了图1绘出的传统印刷电路如上所述的好处,同时与传统印刷电路相比又进一步为高频(例如毫米波)工作实现了更有效的结构和工作。实际上,与图1的示例性天线设计相反,图2的示例性天线框架同时给出高带宽和高效率,这是各种因素的结果,例如天线(20)在印刷天线(22)和地(23)之间具有介电常数非常低的“衬底”(例如空气腔(24)),天线(20)在印刷天线(22)上方具有高介电常数的电介质(21)材料。此外,利用这样的天线设计,因为大部分电场将集中在印刷天线(22)结构之上的更高介电常数的电介质(21)(例如比空气“衬底”(24)介电常数更高)中,这样的天线设计给出非常好的方向性。
为了说明目的,下面将特定地关于印刷折叠偶极天线装置和这种装置在半导体IC封装中的集成来描述本发明的示例性实施方案。然而,应当理解,本发明并不是要限制于任何特定天线类型或工作频率。实际上,本发明更通用于任何适用于给定应用和/或工作频率的天线类型以给出高带宽-效率乘积天线。
例如,图3A为示出根据本发明示例性实施方案包含印刷折叠偶极天线和馈送网络的示例性天线装置的示意图。一般地,图3A示意性绘出印刷天线装置(30),包含平面电介质衬底(31)、印刷折叠偶极天线(32),以及包含通过平衡-不平衡转换器(35)与有限地共面线(34)相连的平衡微分线(33)的馈送网络。印刷折叠偶极天线(32)和馈送网络(33、34和35)形成在衬底(31)的某个面(S1)上。
在另一示例性实施方案中,天线(30)进一步可选地包含形成在衬底表面(S2)上的一对金属条(36)(如虚线所示),平面(S2)与其上形成天线(32)和馈送网络(33、34、35)的平面(S1)相对。金属条(36)用于限制在沿天线衬底(31)的平面的方向上传播的表面/衬底波的影响,在所要的方向提供更大的增益。在这点上,金属条(36)可一般地考虑为“波束成形”或“波束成形增强”图形,抑制平行于衬底(31)的方向上的辐射或波传播并增强在所需方向(例如垂直于衬底(31))上的辐射或波传播。
在图3A的示例性实施方案中,金属(波束成形)条(36)在衬底(31)的相对侧(S2)上平行于折叠偶极(32)放置,与折叠偶极天线(32)相距大约1/2波长(自由空间)。然而,应当理解,金属条(36)可以置于衬底(31)的任何一侧(S1或S2),或者在衬底(30)的两侧(S1和S2)上都有,以有效地抑制表面/衬底波传播和增强天线的方向性。图3A的示例性金属条(36)适合于与示例性折叠偶极天线设计(或偶极设计)一起使用。应当了解,取决于印刷天线设计,可用于抑制表面/衬底波传播的波束成形图形(或其它机构)将可改变。
微分馈送线(33)包含形成在同一平面(即在衬底(31)的同一表面上)的两条长度LF的平行馈送线(33a、33b),由间隙GF隔开。馈送线(33a)和(33b)之间的间隙GF导致了平衡边耦合带状传输线的形成。
共面线(34)包含两条地线(34b)之间的信号馈送线(34a)。共面线(34)的信号馈送线(34a)通过平衡-不平衡转换器(35)与平衡微分线(33)的馈送线(33a)相连。共面线(34)的两条地线(34b)通过平衡-不平衡转换器(35)与平衡微分线(33)的其它馈送线(33b)相连。在某一实施方案中,微分线(33)设计为具有能使折叠偶极天线(32)的阻抗与共面线(34)的阻抗匹配的本征阻抗。微分线(33)的阻抗可通过,例如,改变馈送线(33a、33b)的宽度和馈送线(33a、33b)之间的间隙GF的大小来调节,这是熟练的技术人员所理解的。
在图3A的示例性实施方案中,折叠偶极天线(32)包含第一(馈送)半波偶极元件,它包含第一和第二四分之一波长元件(32a)和(32b),它们互相平行,被间隙GD隔开。微分线(33)的间隙GF将第一半波偶极元件分成第一和第二四分之一波长元件(32a)和(32b)。元件(32a)和(32b)的末端部分通过元件(32d)与第二偶极元件(32c)的末端部分相连(短路)。折叠偶极天线(32)具有由LD表示的长度和由WD表示的宽度。
折叠偶极天线(32)的参数LD根据,例如,工作频率和衬底(31)的介电常数而改变。此外,馈送网络将根据,例如,给定的应用和/或天线所要连上的装置的类型所需的阻抗而改变。例如,如果天线与发射器系统相连,馈送网络将被设计成为功率放大器提供合适的连接和阻抗匹配。进一步举例,如果天线与接收器系统相连,馈送网络将设计成为LNA(低噪声放大器)提供合适的连接和阻抗匹配。
为了测试和确定根据本发明的印刷天线设计的电学性质和特征,对具有和不具有金属(波束成形条)的折叠偶极天线装置利用与图3A所绘类似的各种框架构建了原型机天线。特定地,建造了原型机天线,包含形成在熔融硅石(SiO2)电介质衬底(介电常数=3.8)上的60GHz折叠偶极天线和馈送网络(如图3A所绘)(具有和不具有条),厚度300微米。更特定地,参见图3A,对于大约61.5GHz的谐振频率,形成了60GHz折叠偶极天线(32),具有下列尺寸:WD=40微米,GD=40微米以及LD=1460微米。此外,对于具有金属(波束成形)条(36)的原型机,金属条(36)尺寸5mm×0.5mm,平行于折叠偶极(32)置于熔融硅石衬底(31)的相对侧上,与偶极(32)相距大约2mm。
此外,微分线(33)具有LF=1/4波长(在61.5GHz时大约825微米)。微分线(33)用于将60GHz折叠偶极(32)的输入阻抗从大约150欧姆变为100欧姆。设计有限地共面线(34)并设置其尺寸(线宽和线之间的间距75微米)以提供100欧姆的特征阻抗来匹配天线(32)的输入阻抗,像微分线(33)所提供的那样。选择平衡-不平衡转换器(35)设计以提供在工作频率下非常宽的带宽。
图3B示意性示出用在示例性原型机天线用来提供地平面和空气腔的金属桥结构(40)。金属桥结构(40)由铜成分形成,包括尺寸为WG=2mm、LG=3mm和HG=250微米的平面地平面(41),以及尺寸为HS=500微米和WS=500微米的侧面元件。原型机天线装置的阻抗和辐射场型用共面探针测量。更特定地,衬底(31)容纳在一个特殊的不导电样品架上,从而天线(32)和馈送网络位于衬底(31)上方,并且铜桥(40)置于衬底(41)上从而地平面(41)置于印刷折叠偶极天线(32)上方,通过侧面元件与衬底(31)错开/偏移HS=500微米的距离,在衬底(31)和地平面(41)之间形成空气腔。
此外,利用可以购买到的Ansoft的HFSSTM应用软件对上述60GHz折叠偶极天线设计(具有和不具有波束成形条)进行了计算机模拟。正如在技术领域中已知的,HFSSTM为用于RF、无线、封装和光电设计的3D EM模拟软件工具。特定地,以下列参数进行模拟。更特定地,对60GHz折叠偶极天线(具有和不具有金属条)以及馈送网络定义了天线模型,它们具有类似于上面关于图3A所讨论的那些结构和尺寸,形成在厚度300微米的熔融硅石(SiO2)衬底上,其地平面与衬底相距500微米以在折叠偶极天线和地平面之间给出空气腔。然而,在计算机模拟中,地平面和衬底假设为无限大,介电损耗(即损耗角正切)假设为0(因为熔融硅石具有非常低的损耗角正切)。
图4为示出根据本发明的60GHz折叠偶极天线装置的垂直辐射场型的示例图。更特定地,图4(以极坐标图)图示出对上面所讨论的真实天线原型机测量得到的垂直辐射场型(实线)以及对上面所讨论的计算机建模天线利用HFSS模拟工具所得到的计算机模拟垂直辐射场型(虚线)。图4所绘的垂直辐射场型假设了原点位于点“O”(见图3A)的笛卡儿坐标系统,其中Z轴沿穿过衬底(31)且垂直于衬底表面的方向延伸,其中x轴沿衬底表面上沿折叠偶极(32)的轴向水平延伸,以及其中y轴沿衬底表面上的垂直于折叠偶极天线(32)的轴的方向水平延伸。
图4(以极坐标)示出由ZY平面(phi=90度)所确定的垂直平面从0-180度测量/得到的垂直辐射场型,其中0度代表正z方向(在图3A中是从衬底(31)的表面(S2)正交延伸出来到天线上方),180度代表负z方向(在图3A中是从衬底(31)的表面(S1)正交延伸出来指向地平面)。图4(以极坐标)示出(i)对具有金属(波束成形)条的天线原型机测得的垂直辐射场型(45)(实线),(ii)对不具有金属(波束成形)条的天线原型机测得的垂直辐射场型(47)(实线),(iii)对具有金属(波束成形)条的示例性折叠偶极天线进行计算机模拟得到的垂直辐射场型(46)(虚线),以及(iv)对不具有金属(波束成形)条的示例性折叠偶极天线进行计算机模拟得到的垂直辐射场型(48)(虚线)。
图4所绘垂直辐射场型示出好的半球形辐射场型,EM能主要辐射在天线上方的上半球(-90至90)。测得的和模拟的辐射场型(47)和(48)示出,对于不具有金属(波束成形)条的60GHz折叠偶极天线设计来说,虽然在垂直方向(0度)上有大约5dB的增益,但是在平行于衬底(31)的水平方向(90度)上也有显著的增益。然而,测得的和模拟的辐射场型(45)和(46)示出,对于具有金属(波束成形)条的60GHz折叠偶极天线设计来说,在垂直方向(0度)上增益增大了大约5dB,而在水平方向(90度)上增益显著减小。从而,这些结果显示金属(波束成形)条有效地减小了水平辐射并增强了在所需方向上的增益。应当了解示例性天线设计非常适合于用作反射器以及具有场型多样性的无线个人区域网络的馈送。
图5A和5B示出如上所述具有和不具有金属条的示例性原型机和模拟的60GHz折叠偶极天线设计测得的和模拟的阻抗匹配参数(S11)。特定地,图5A以dB分别图示出不具有金属(波束成形)条的示例性原型机和模拟天线设计的测得的(实线)和模拟的(虚线)输入阻抗匹配参数(S11)。进一步,图5B以dB分别图示出具有金属(波束成形)条的各原型机和模拟的60GHz折叠偶极天线设计的测得的(实线)和模拟的(虚线)输入阻抗匹配参数(S11)。
图5A和5B中图示的测得的/模拟的输入阻抗匹配(S11)示出,各种天线实施方案给出好于10%的宽带宽,覆盖大约57GHz到大约64GHz的频带范围(其中基于某一频率范围来定义带宽,在这一频率范围内,S11测到为大约-10dB或更好)。更特定地,这些结果显示60GHz折叠偶极天线设计为在ISM波段(59-64GHz)应用示例性天线设计提供了足够的带宽。
熟练的技术人员将能容易地理解,具有类似于,例如图2和3A所绘的结构的印刷天线的电学特性(例如天线阻抗、谐振频率、带宽、效率、辐射场型等)将会随不同因素——例如衬底厚度、衬底介电常数和空气腔高度——而改变。实际上,根据此处的描述,熟练的天线设计技术人员将能容易地设计并建立具有如图2所绘的框架的天线,使用任何,例如,如图7A~7F所绘的合适的印刷平面天线类型,用于各种应用和用于不同的工作频率。
应当了解,根据本发明示例性实施方案的天线能够与IC芯片整体封装在相对较小的封装中以构建RF或无线通信芯片。例如,图6A和6B为示出根据本发明一个示例性实施方案用于整体封装天线和IC芯片的设备的示意图。更特定地,图6A示意性示出IC封装设备(50)的平面(顶)视图,而图6B示意性示出该设备(50)沿6B-6B线的剖面图。
设备(50)包含封装衬底基底(51),其上形成有金属地平面(52)和许多封装触点/引线(53)。IC芯片(54)(例如,IC收发器)背(无源)表面焊接在封装基底(51)上。该设备进一步包含电介质衬底(55),在衬底(55)的底表面上形成第一天线(56)和馈送线(57)图形和以及第二天线(58)和馈送线(59)图形。在图6A~B的示例性实施方案中,天线(56)和(58)以及馈送线(57)和(59)为60GHz折叠偶极天线以及具有框架的微分馈送线,正如上面关于图3A所讨论的那样,它们形成在300微米厚的熔融硅石衬底上。此外,在示例性实施方案中,第一天线(56)用于传输信号而第二天线(58)用于接收信号。
衬底(55)通过许多焊球(60)和(61)倒装焊在IC芯片(54)的有源表面上。焊球(60)为各天线(56)和(58)提供IC芯片(54)的有源元件和/或阻抗匹配结构与馈送线(57)和(59)之间的低损耗电学连接。焊球(61)可用于提供芯片(54)和衬底(55)之间的额外机械支撑。
由于天线(56)和(58)并不位于芯片(54)上方,因此封装基底(51)的地平面(52)用作天线(56)和(58)的地平面。在本发明的某一示例性实施方案中,天线衬底(55)天线衬底(55)与封装基底(51)的地平面(52)错开大约500微米以形成空腔(62)(给定IC芯片(54)和焊球(60)的典型尺寸之后,这一间隔可以容易地得到)。空腔(62)可以是空气腔或如果需要的话,空腔(62)可以填充介电常数非常小的材料(通常是泡沫),它提供了额外的机械支撑。
设备(50)进一步包含密封IC封装的封装盖(63),可以由低损塑料衬底形成。在图6A中,封装盖(63)和电介质衬底(55)以虚线绘出(透明的)。封装盖(63)上形成有开口(64)暴露天线衬底(55)在天线(56)和(58)上方的部分。这些开口(64)用以防止天线辐射的损耗。此外,在图6A~6B的示例性实施方案中,金属条(65)形成在天线衬底(55)的上表面上以如上面所讨论的那样优化辐射场型。如图所示,盖上的开口(64)的尺寸使得至少暴露金属条(65)和天线衬底(55)在条(65)之间的区域。
此外,IC芯片(54)包含许多在芯片(54)有源表面上的接触焊点(66),用于通过焊接线(67)形成IC芯片(54)和封装接触/引线(53)之间的电学连接(例如,地、电源、I/O)。如图6A所绘,天线衬底(55)形成L形以在IC芯片(54)上给出一个区域来通过焊接线(67)将所有其它I/O信号连到封装引线(53)上。此外,发射天线(56)和接受天线(58)互相正交放置,使互耦最小化。
在本发明其它示例性实施方案中,设备(50)可包含阻抗匹配网络用于匹配天线和IC芯片(54)上的装置/电路(例如功率放大器)的阻抗。例如,在某一实施方案中,阻抗匹配网络(例如传输线)可以整体形成在IC芯片(54)上。例如,在图6A-B的示例性实施方案中,如图3A所绘,焊球(60)可焊在阻抗匹配网络——例如与形成在IC芯片(54)上的共面传输线相连的平衡-不平衡转换器——的某一端上,提供天线和与阻抗另一端相连的装置/元件(例如功率放大器、LNA等)之间的电感性/电容性阻抗。应当理解,上面关于,例如,图3A和6A-B所讨论的示例性实施方案仅仅是根据本发明的天线和IC封装的示例性实施方案,熟练的技术人员可以容易地想像其它能够用本发明的装置和方法构建及与IC芯片封装的天线类型。例如,利用贴片天线,可以形成具有图2所绘的一般网络的天线。
此外,根据本发明的描述构建的任何合适的高频天线(例如大约20GHz或更高)都可用于构建集成通信芯片,上面所讨论并在图3A和6A-B中绘出的60GHz折叠偶极天线仅仅是本发明用于IC封装装置中的一个示例性实施方案。此外,尽管在图6A和6B中绘出了两个分开的天线,但是也可容易地想像根据本发明其它示例性实施方案的IC封装,其中对集成的天线和收发器芯片封装设计只使用一个天线用于发射和接收。此外,在其它示例性实施方案中,图6A-B中所绘的IC芯片(54)可包含集成收发器芯片、集成接收器芯片、集成发射器芯片等,和/或其它包含必要的支持电路用于实现通信芯片封装的IC芯片。
熟练的技术人员将能容易地了解与根据本发明的天线和集成天线封装相关的各种优点。例如,在衬底上包含印刷天线的示例性天线设计使得大规模天线生产能力成为可能。此外,根据本发明示例性实施方案的集成IC封装使得天线能够与IC芯片——例如收发器芯片——集成封装,这提供了在收发器和天线之间具有非常低损耗的紧凑设计。实际上,示例性天线设计所需的相对较小的地平面使得非常紧凑的封装成为可能。另外,这样的封装设计消除了在高频输入和输出信号情况下使收发器芯片退化的需要,从而给出低损耗设计。
另一优点在于印刷天线设计和具有这种天线的IC封装给出非常适合于置于聚焦天线中心的辐射场型,用于像点到点系统或雷达系统这样的定向天线应用。实际上,根据本发明的天线和集成天线封装使得很多应用成为可能,例如集成相控阵列天线系统、个人区域网络、雷达馈送、冗余所导致的高可靠性、点到点系统,等。此外,根据本发明的集成天线/IC芯片封装的使用节省了很多空间、尺寸、成本和重量,这对于实际上任何商业或军事应用都是非常有价值的。
此外,在本发明其它示例性实施方案中,天线可具有形成在衬底上的两个或多个印刷天线的阵列,以给出具有所需方向性的天线用于波束形成或波束导引天线应用。一般地,利用相控阵列天线可以得到定向天线波束场型,其中输入每个印刷天线的输入信号相位被控制以将定向天线场型电子地扫描或定向到所需方向。也可以置于聚焦天线中心用于像点到点系统或雷达系统这样的定向天线应用。此外,应当了解根据本发明示例性实施方案的天线设计并非只能用于MMW应用,而是还可以用在更低的频率。
尽管这里关于附图描述了示例性实施方案作为说明,应当理解,本发明并不局限于那些精确的实施方案,只要不超出本发明的领域,熟练的技术人员在此都能够实现各种其它改变和调整。

Claims (25)

1.一种天线,包含:
平面衬底;
天线图形,形成在平面衬底的第一表面上;以及
地平面,基本平行于平面衬底的第一表面且与其错开,面向天线图形。
2.根据权利要求1的天线,其中地平面和平面衬底之间的空间填满空气。
3.根据权利要求1的天线,其中地平面和平面衬底之间的空间填满泡沫。
4.根据权利要求1的天线,进一步包含天线馈送网络,形成在平面衬底的第一表面上。
5.根据权利要求4的天线,其中天线馈送网络包含阻抗匹配网络。
6.根据权利要求1的天线,其中天线具有大约20GHz或更大的谐振频率。
7.根据权利要求1的天线,其中天线图形为折叠偶极天线或偶极天线。
8.根据权利要求1的天线,其中天线图形为贴片天线。
9.根据权利要求1的天线,进一步包含波束成形图形,形成在平面衬底的第一表面上、或平面衬底的与第一表面相对的第二表面上,或平面衬底的第一表面以及第二表面上,用以减小沿平面衬底的平面方向上的辐射。
10.根据权利要求9的天线,其中天线图形包含折叠偶极天线,并且其中波束成形图形包含第一和第二金属条,平行于折叠偶极的纵轴延伸。
11.一种无线装置,具有权利要求1中所限定的天线。
12.一种IC(集成电路)封装装置,包含权利要求1中所限定的天线。
13.一种IC(集成电路)封装装置,包含:
封装衬底,具有形成于其表面上的地平面;
IC芯片,焊接在封装衬底的表面上;
平面衬底,包含形成在平面衬底第一表面上的天线图形,其中平面衬底倒装焊在IC芯片上,从而天线图形面向封装衬底的地平面,并且平面衬底的第一表面基本平行于封装衬底的地平面且与其错开;以及
封装盖,形成在封装基底衬底上方以密封IC芯片和平面衬底,其中封装盖包含开口,暴露平面衬底的第二表面上与平面衬底的第一表面上具有天线图形的部分相对的部分。
14.根据权利要求13的装置,其中地平面和平面衬底之间的空间填满空气。
15.根据权利要求13的装置,其中地平面和平面衬底之间的空间填满泡沫。
16.根据权利要求13的装置,进一步包含天线馈送网络,形成在平面衬底的第一表面上,其中馈送网络利用焊球与IC芯片上的触点相连。
17.根据权利要求16的装置,其中天线馈送网络包含阻抗匹配网络。
18.根据权利要求13的装置,其中天线具有大约20GHz或更大的谐振频率。
19.根据权利要求13的装置,其中天线图形为折叠偶极天线或偶极天线。
20.根据权利要求13的装置,其中天线图形为贴片天线。
21.根据权利要求13的装置,进一步包含波束成形图形,形成在平面衬底的第一表面上、平面衬底的第二表面的暴露部分上、以及平面衬底的第一表面和第二表面的暴露部分上这三种情况中的一种,用以减小沿平面衬底的平面方向上的辐射。
22.根据权利要求13的装置,进一步包含波束成形图形,形成在平面衬底的第一表面上、平面衬底的第二表面的暴露部分上、以及平面衬底的第一表面和第二表面的暴露部分上这三种情况中的一种,用以增强平面衬底第二表面上方的半球中的垂直辐射。
23.根据权利要求21的天线,其中天线图形包含折叠偶极天线或偶极天线,并且其中波束成形图形包含第一和第二金属条,平行于折叠偶极的纵轴延伸。
24.一种无线通信装置,具有权利要求1所限定的IC封装装置。
25.根据权利要求13的装置,其中IC芯片包含收发器、接收器或发射器。
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