CN1602136A - 电路装置 - Google Patents
电路装置 Download PDFInfo
- Publication number
- CN1602136A CN1602136A CNA2004100119125A CN200410011912A CN1602136A CN 1602136 A CN1602136 A CN 1602136A CN A2004100119125 A CNA2004100119125 A CN A2004100119125A CN 200410011912 A CN200410011912 A CN 200410011912A CN 1602136 A CN1602136 A CN 1602136A
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- circuit
- conductive pattern
- telecommunication
- signal
- wiring part
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Abstract
一种内部具有用于构成电路的配线部的电路装置,其具有构成电路的电路元件(13)和导电图案(12),一体地树脂模制而成,其包括:使电路和外部之间输入输出的电信号通过的导电图案(12A);自导电图案(12A)分路,使输入电路的其它部分的电信号通过的配线部(12B)。根据本发明的电路装置,内设的电路和外部之间输入输出的电信号可介由形成于装置内部的配线输入到所述电路的其它位置。由此,可使安装衬底的图案结构简化。
Description
技术领域
本发明涉及一种电路装置,特别是涉及一种内部具有用于构成电路的配线部的电路装置。
背景技术
参照图8说明现有半导体装置100的结构。图8(A)是半导体装置100的平面图,图8(B)是其剖面图(参照专利文献1)。
参照图8(A),在半导体装置100的中央部形成有由导电材料构成的接合区102,多条引线101的一端接近接合区102的周围。引线101的一端介由金属细线105和半导体元件104电连接,另一端自密封树脂103露出。密封树脂103具有密封半导体元件104、接合区102及引线101,并将其一体支承的作用。
专利文献1
特开平11-340257号公报
但是,在所述的装置中,引线101仅具有作为外部端子的功能。因此,在安装半导体装置100的安装衬底表面必须形成用于形成电路的导电路。因此,存在安装衬底配线结构复杂的问题。
发明内容
本发明是鉴于所述问题点而开发的,本发明的主要目的在于提供一种内部具有用于构成电路的配线部的电路装置。
本发明提供一种电路装置,其内装构成电路的电路元件和导电图案,包括:使在所述电路和外部之间输入输出的电信号通过的导电图案;自所述导电图案分路,使输入所述电路的其它部分的所述电信号通过的配线部。
另外,本发明的电路装置内装构成电路的电路元件和导电图案,其包括:使在所述电路和外部之间输入输出的第一电信号通过的第一导电图案;使在所述电路和外部电路之间输入输出的和所述第一电信号电位不同的第二电信号通过的第二导电图案;自所述第一导电图案分路,使所述第一电信号通过的第一配线部;自所述第二导电图案分路,使所述第二电信号通过的第二配线部,其中,通过所述第一配线部的所述第一电信号或通过所述第二配线部的所述第二电信号输入到所述电路中。
根据本发明的电路装置,在内装的电路和外部之间输入输出的电信号可介由装置内部形成的配线输入到所述电路的其它位置。由此,可将安装衬底的图案结构简化。
附图说明
图1是表示本发明电路装置的平面图(A)、剖面图(B);
图2是表示本发明电路装置的平面图;
图3是表示本发明电路装置的平面图;
图4是表示本发明电路装置的剖面图;
图5是表示本发明电路装置的平面图(A)、剖面图(B);
图6是表示本发明电路装置的平面图(A)、剖面图(B);
图7是表示本发明电路装置的剖面图;
图8是表示现有的电路装置的平面图(A)、剖面图(B)。
具体实施方式
参照图1说明本实施方式电路装置10A的结构。图1(A)是电路装置10A的平面图,图1(B)是其剖面图。
参照图1(A),本实施方式的电路装置10A由构成电路的电路元件13和导电图案12一体地树脂模制而成。另外,还具有:使在该电路和外部之间输入输出的电信号通过的导电图案12A;自导电图案12A分路,使输入电路其它部分的电信号通过的配线部12B。以下详细说明各元件及相关结构。
导电图案12由铜等金属构成。这些导电图案12由填充于由蚀刻形成的分离槽19内的密封树脂18分离。在此,导电图案12主要构成安装半导体元件13A的焊盘和包围该焊盘配置的由金属细线连接的接合片等。
导电图案12A介由金属细线15和半导体元件13A电连接,通过和外部进行输入输出的电信号。该电信号有自外部向设于电路装置10A内部的电路供给的输入信号。另外,该电信号还有由电路装置10A内部构成的电路处理向外部输出的输出信号。具体地说,该电信号可考虑电源电位、接地电位、在内部处理的输出信号等。在此,在内部构成的电路是指例如包括导电图案12、金属细线15及电路元件13的电路。
配线部12B由上述的导电图案12构成,将导电图案12A和导电图案12C电连接。导电图案12A和导电图案12C之间隔着多个导电图案12而分开。两者可通过配线部12B电连接。在此,位于同一侧边的导电图案12通过配线部12B相互连接。但是,位于不同侧边部的导电图案12相互之间也可以利用配线部12B连接。即,通过由配线部12B使导电图案相互连接,可自分开的多个导电图案12输出由内装的电路输出的电信号。另外,也可以介由配线部12B使介由一个导电图案12输入的电信号分路。由此,也可以将一个输入信号供给到内装的电路的多个位置。
在此,电路元件13采用半导体元件13A。另外,电路元件13可以采用LSI芯片、晶体管裸片、二极管等有源元件。另外,电路元件13还可以采用片状电阻、片状电容、电感元件等无源元件。半导体元件13A其背面固定粘接在由导电图案12形成的焊盘上。并且,介由金属细线15将半导体元件13A的表面电极和由导电图案12构成的接合片电连接。另外,半导体元件13A也可以通过倒装法连接。片状元件13B其两端电极介由焊锡等焊料固定于导电图案12上。
密封树脂18由利用注入模形成的热可塑性树脂或利用传递模形成的热硬性树脂构成,并且,密封树脂18具有密封装置整体的作用,同时还具有机械地支承装置整体的功能。参照图1(B),密封树脂18密封电路元件13、金属细线15及导电图案12,使导电图案12的背面露出外部。
参照图1(B)说明电路装置10A和安装衬底25的连接结构。在导电图案12露出的密封树脂18的下面,除去形成外部电极17的位置,利用由树脂形成的抗蚀剂16覆盖。外部电极17由焊锡等焊料构成,形成在导电图案12的背面。并且,通过回流将外部电极17熔融,将在安装衬底25表面形成的导电路26和电路装置10A电连接。另外,在安装衬底25的表面,除电路装置10A外还可以安装多个元件。
参照图1(A),导电路26B介由外部电极17和导电图案12电连接,和安装衬底25上的其它位置连接。
下面说明具有配线部12B的优点。导电图案12A介由配线部12B和导电图案12C电连接。并且,介由外部电极17将安装衬底25侧的导电路26A和导电图案12C连接。介由在安装衬底25的表面上形成的开关部SW将导电路26A和导电路26C连接,电路装置10A的导电图案12D和导电路26C介由外部电极17连接。另外,导电图案12D介由金属细线15和半导体元件13A电连接。在此,开关部SW也可以内装在电路装置10A内。
通过所述结构,例如当来自半导体元件13A的输出信号供给到导电图案12A上时,其输出信号介由配线部12B反馈到电路装置10A内部的电路上。具体地说,其路径是配线部12B、导电图案12C、外部电极17、导电路26A、开关部SW、导电路26C及导电图案12D。并且,可通过利用开关部SW进行所述电信号的截止或导通,来切换电路装置10A中内设的电路的动作。即,根据介由导电图案12A输出外部的电信号是否供给到导电图案12D来改变电路的动作。
另外,输出电信号的导电图案12C和使经由开关部SW输入的电信号通过的导电图案12D邻接。由此,可缩短经由开关部SW连接导电图案12C和导电图案12D的导电路26的路径。
如上所述,通过将配线部12B在装置内部配线,可简化安装衬底25侧的导电路26的图案结构。特别是,如图1(A)所示,考虑到在电路装置10A的周边部形成有外部电极的情况,若在安装衬底25侧形成配线部,必须形成复杂的导电路26的结构。具体地说,当在安装衬底25上形成由导电路26构成的配线时,其配线几乎必须与和外部电极17连接的导电路26B交叉。由此,这样交叉的导电路26的结构有可能导致配线结构的复杂化,提高成本。在本申请中,由于在电路装置10A内部内设配线部12B,故可大幅度将导电路26的结构简单化。
另外,在所述说明中,在电路装置10A内设含有一个半导体元件13A的电路,但也可以形成含有多个半导体元件或无源元件的电路。另外,在上述说明中,介由配线部12B使来自内设的电路的输出信号分路,但也可以介由配线部12B使自外部输入的电信号分路。
参照图2的平面图说明另一实施方式的电路装置10B的结构。
在电路装置10B中,导电图案12包括第一导电图案12A和第二导电图案12B。第一导电图案12A使其和外部之间输入输出的第一电信号通过。第二导电图案12E通过和第一电信号电位不同的第二电信号。该图所示的电路装置10B和图1所示的电路装置10A具有共同的基本结构,不同点在于具有第二配线部12B2。下面以这样的不同点为中心说明。
第一导电图案12A介由第一配线部12B1和导电图案12C连接。并且,导电图案12C介由外部电极17和安装衬底侧的导电路26A连接。这样,介由第一配线部12B1向外部输入输出分路的第一电信号。
第二导电图案12E介由第二配线部12B和导电图案12F连接。第二导电图案12E是使和上述的第一电信号电位不同的第二电信号通过的导电图案。导电图案12F介由外部电极17和安装衬底侧的导电路26B连接,进而电连接在开关部SW上。
导电图案12D是上述的第一电信号或第二电信号输入的导电图案,介由金属细线15和半导体元件13A连接。并且,介由外部电极17和供给开关部SW的输出信号的导电路26C连接。
开关部SW具有将介由导电路26A供给的第一电信号或介由导电路26B供给的第二电信号向导电路26C选择供给的作用。由此,由于可通过开关部SW的该作用使从导电图案12D向半导体元件13A供给的电信号改变,故可使内设于电路装置10A内的电路动作变化。
通过上述的第一配线部12B1及第二配线部12B2可使第一电信号及第二电信号分路,自导电图案12D的近旁输出。由此,可将连接各导电图案12和开关部SW的导电路26的结构简化,还可缩短导电路26的长度。
通过上述结构,可介由导电图案12D将从第一导电图案12A输出的第一电信号或从第二导电图案12E输出的第二电信号的某一个信号供给到内部电路。由此,供给第一电信号和供给第二电信号时,内设于电路装置10B的电路表现不同的动作。并且,第一及第二电信号的组合,可采用电位相差很大的电源电位及接地电位。
参照图3的平面图说明另一实施方式的电路装置10C的结构。同图所示的电路装置10C的结构和图2所示的电路装置10B的结构基本相同。电路装置10C的不同点在于内设开关部SW。即,由晶体管等开关元件构成的开关部SW形成在导电图案12上。通过该结构,可将在安装电路装置10C的安装衬底25表面上形成的导电路26的结构更加简化。
参照图4的剖面图,在同图所示的电路装置10D中,电路元件13采用半导体元件13A及片状元件13B。在图1至图3所示的电路装置10中内设一个半导体元件13A,也可以像这样由多个电路元件13形成内部电路。作为具体的电路元件的连接结构,通过面朝上接合法固定在导电图案12上的半导体元件13A的电极介由金属细线15和导电图案12连接。并且,片状元件13B其两端电极介由焊锡等焊料固定在导电图案12上。
参照图5说明另一实施方式的电路装置10E的结构。图5(A)是电路装置10E的平面图,图5(B)是其剖面图。
参照图5(A),电路装置10E的结构和图2所示的电路装置10B类似,不同点在于配线部12B的结构。即,在此,第一配线部12B1及第二配线部12B2延伸设置在半导体元件13A的下方。具体地说,第一配线部12B1自第一电信号通过的第一导电图案12A延伸设置在半导体元件13A的下方。并且,第一导电图案12A与在位于不同的边的周边部的导电图案12C连接。另外,第二电信号通过的第二导电图案12E介由通过半导体元件13A下方的第二配线部12B2和导电图案12F连接。其它的开关部SW或导电路26的结构和图2所示的结构相同。
参照图5(B)说明电路装置10E的断面结构。导电图案12由覆盖树脂24覆盖,在该覆盖树脂24的表面固定粘接半导体元件13A。通过该结构,可在配置半导体元件13A等电路元件13的区域的下方环绕导电图案12,故可使配线密度提高。另外,和电路元件13电连接的位置的导电图案12的上面自覆盖树脂24露出。在此,构成接合片的区域的导电图案12的上面自覆盖树脂24露出。
下面说明上述结构的优点。由于可在半导体元件13A的下方延伸设置配线部12B,故可提高设计导电图案12的自由度。例如,即使在第一导电图案12A和导电图案12C分开时,也可以介由第一配线部12B1连接。在此,通过第一配线部12B1将位于相对的周边部的第一导电图案12A和导电图案12C连接。
参照图6说明另一实施方式的电路装置10F的结构。图6(A)是电路装置10F的平面图,图6(B)是其剖面图。该图所示的电路装置10F的基本结构和图5所示的电路装置10E相同,不同点在于具有多个配线层。下面以该不同点为中心说明。
参照图6(A),作为上层配线层的第一配线层20由实线表示,作为下层配线层的第二配线层21由虚线表示。上层的第一配线层20形成金属细线15连接的接合片部,介由连接部23和下层的第二配线层21连接。第一配线部12B1及第二配线部12B2通过下层的第二配线层21形成。另外,也可以由第一配线层20形成配线部12。其它结构和图5相同。
参照图6(B),在此,具有由介由绝缘层32层积的第一配线层20及第二配线层21构成的两层配线层。第一配线层20和第二配线层21介由贯通绝缘层32的连接部23电连接。另外,配线层的结构也可以是三层以上的配线结构。
参照图7说明另一实施方式的电路装置10G的结构。同图中显示剖面的电路装置10G的基本结构和图6所示的电路装置10F相同,不同点在于具有支承衬底31。该支承衬底31可采用玻璃环氧树脂衬底等树脂制衬底、陶瓷衬底、金属衬底等众所周知的衬底。
Claims (11)
1.一种电路装置,其内设构成电路的电路元件和导电图案,其特征在于,包括:使在所述电路和外部之间输入输出的电信号通过的导电图案;自所述导电图案分路,使输入到所述电路的其它部分的所述电信号通过的配线部。
2.如权利要求1所述的电路装置,其特征在于,介由所述配线部输入到所述电路的电信号介由位于外部的电路元件输入到所述电路。
3.如权利要求1所述的电路装置,其特征在于,所述电路元件包括半导体元件,所述配线部延伸设置在所述半导体元件的下方。
4.如权利要求1所述的电路装置,其特征在于,具有由第一配线层及第二配线层构成的多层配线结构,并在所述第一配线层或所述第二配线层上形成所述配线部。
5.如权利要求1所述的电路装置,其特征在于,露出所述导电图案背面,将所述电路元件及所述导电图案利用密封树脂密封。
6.一种电路装置,其内设构成电路的电路元件和导电图案,其特征在于,包括:使在所述电路和外部之间输入输出的第一电信号通过的第一导电图案;使在所述电路和外部电路之间输入输出、并和所述第一电信号电位不同的第二电信号通过的第二导电图案;自所述第一导电图案分路,使所述第一电信号通过的第一配线部;自所述第二导电图案分路,使所述第二电信号通过的第二配线部,其中,通过所述第一配线部的所述第一电信号或通过所述第二配线部的所述第二电信号输入到所述电路中。
7.如权利要求6所述的电路装置,其特征在于,介由所述配线部输入到所述电路的电信号介由位于外部的电路元件输入到所述电路。
8.如权利要求6所述的电路装置,其特征在于,所述电路元件包括半导体元件,所述配线部延伸设置在所述半导体元件的下方。
9.如权利要求6所述的电路装置,其特征在于,具有由第一配线层及第二配线层构成的多层配线结构,并在所述第一配线层或所述第二配线层上形成所述配线部。
10.如权利要求6所述的电路装置,其特征在于,露出所述导电图案背面,将所述电路元件及所述导电图案利用密封树脂密封。
11.如权利要求6所述的电路装置,其特征在于,所述第一电信号是电源电位,所述第二电信号是接地电位。
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JP2003331635A JP4359110B2 (ja) | 2003-09-24 | 2003-09-24 | 回路装置 |
JP331635/03 | 2003-09-24 |
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JP (1) | JP4359110B2 (zh) |
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JP2004071899A (ja) * | 2002-08-07 | 2004-03-04 | Sanyo Electric Co Ltd | 回路装置およびその製造方法 |
US10763194B2 (en) * | 2017-09-22 | 2020-09-01 | Stmicroelectronics, Inc. | Package with lead frame with improved lead design for discrete electrical components and manufacturing the same |
US10892212B2 (en) * | 2017-11-09 | 2021-01-12 | Stmicroelectronics, Inc. | Flat no-lead package with surface mounted structure |
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US6160705A (en) * | 1997-05-09 | 2000-12-12 | Texas Instruments Incorporated | Ball grid array package and method using enhanced power and ground distribution circuitry |
JP3958864B2 (ja) | 1998-05-21 | 2007-08-15 | 浜松ホトニクス株式会社 | 透明樹脂封止光半導体装置 |
US6285558B1 (en) * | 1998-09-25 | 2001-09-04 | Intelect Communications, Inc. | Microprocessor subsystem module for PCB bottom-side BGA installation |
EP1143509A3 (en) * | 2000-03-08 | 2004-04-07 | Sanyo Electric Co., Ltd. | Method of manufacturing the circuit device and circuit device |
JP2001313363A (ja) * | 2000-05-01 | 2001-11-09 | Rohm Co Ltd | 樹脂封止型半導体装置 |
IT1317559B1 (it) * | 2000-05-23 | 2003-07-09 | St Microelectronics Srl | Telaio di supporto per chip avente interconnessioni a bassa resistenza. |
JP3609737B2 (ja) * | 2001-03-22 | 2005-01-12 | 三洋電機株式会社 | 回路装置の製造方法 |
JP2003174111A (ja) | 2001-12-06 | 2003-06-20 | Sanyo Electric Co Ltd | 半導体装置 |
JP2004071899A (ja) * | 2002-08-07 | 2004-03-04 | Sanyo Electric Co Ltd | 回路装置およびその製造方法 |
JP2005129900A (ja) * | 2003-09-30 | 2005-05-19 | Sanyo Electric Co Ltd | 回路装置およびその製造方法 |
JP2005347354A (ja) * | 2004-05-31 | 2005-12-15 | Sanyo Electric Co Ltd | 回路装置およびその製造方法 |
JP4471735B2 (ja) * | 2004-05-31 | 2010-06-02 | 三洋電機株式会社 | 回路装置 |
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CN100531509C (zh) | 2009-08-19 |
US7563988B2 (en) | 2009-07-21 |
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KR100661947B1 (ko) | 2006-12-28 |
TWI314027B (en) | 2009-08-21 |
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