CN1547775A - 用于混合信号rf应用和电路的集成电路结构 - Google Patents

用于混合信号rf应用和电路的集成电路结构 Download PDF

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Publication number
CN1547775A
CN1547775A CNA03800917XA CN03800917A CN1547775A CN 1547775 A CN1547775 A CN 1547775A CN A03800917X A CNA03800917X A CN A03800917XA CN 03800917 A CN03800917 A CN 03800917A CN 1547775 A CN1547775 A CN 1547775A
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CN
China
Prior art keywords
resistivity
low
digital
buried layer
substrate
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Pending
Application number
CNA03800917XA
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English (en)
Chinese (zh)
Inventor
黄文伶
ϣ
詹姆斯·基希格斯纳
J���ɿ���
戴维·J·蒙克
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NXP USA Inc
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Freescale Semiconductor Inc
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Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of CN1547775A publication Critical patent/CN1547775A/zh
Pending legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0107Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs
    • H10D84/0109Integrating at least one component covered by H10D12/00 or H10D30/00 with at least one component covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating IGFETs with BJTs the at least one component covered by H10D12/00 or H10D30/00 being a MOS device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5227Inductive arrangements or effects of, or between, wiring layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/40Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00 with at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of IGFETs with BJTs
    • H10D84/401Combinations of FETs or IGBTs with BJTs
    • H10D84/403Combinations of FETs or IGBTs with BJTs and with one or more of diodes, resistors or capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
CNA03800917XA 2002-06-24 2003-05-21 用于混合信号rf应用和电路的集成电路结构 Pending CN1547775A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/178,672 US20030234438A1 (en) 2002-06-24 2002-06-24 Integrated circuit structure for mixed-signal RF applications and circuits
US10/178,672 2002-06-24

Publications (1)

Publication Number Publication Date
CN1547775A true CN1547775A (zh) 2004-11-17

Family

ID=29734747

Family Applications (1)

Application Number Title Priority Date Filing Date
CNA03800917XA Pending CN1547775A (zh) 2002-06-24 2003-05-21 用于混合信号rf应用和电路的集成电路结构

Country Status (7)

Country Link
US (1) US20030234438A1 (enExample)
EP (1) EP1518276A1 (enExample)
JP (1) JP2005531143A (enExample)
KR (1) KR20050013190A (enExample)
CN (1) CN1547775A (enExample)
AU (1) AU2003248560A1 (enExample)
WO (1) WO2004001850A1 (enExample)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7884440B2 (en) 2006-04-26 2011-02-08 Magnachip Semiconductor, Ltd. Semiconductor integrated circuit
CN102055414A (zh) * 2010-04-14 2011-05-11 锐迪科创微电子(北京)有限公司 射频功率放大器模块及移动通信终端
CN101771037B (zh) * 2008-12-31 2013-03-13 台湾积体电路制造股份有限公司 减小衬底中的高频信号损失
CN104051529B (zh) * 2013-03-13 2017-07-28 台湾积体电路制造股份有限公司 高阻抗衬底上的rf开关
CN108538834A (zh) * 2012-06-28 2018-09-14 天工方案公司 高电阻率基底上的双极型晶体管

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4742543B2 (ja) * 2004-09-08 2011-08-10 凸版印刷株式会社 Dnaチップ装置
US7375000B2 (en) * 2005-08-22 2008-05-20 International Business Machines Corporation Discrete on-chip SOI resistors
KR100854440B1 (ko) * 2006-04-26 2008-08-26 매그나칩 반도체 유한회사 반도체 집적회로
KR100876604B1 (ko) 2007-07-13 2008-12-31 (주)페타리 반도체 소자 및 그 제조 방법
US8679863B2 (en) 2012-03-15 2014-03-25 International Business Machines Corporation Fine tuning highly resistive substrate resistivity and structures thereof
JP6076068B2 (ja) * 2012-12-17 2017-02-08 ルネサスエレクトロニクス株式会社 半導体集積回路装置

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5218224A (en) * 1989-06-14 1993-06-08 Kabushiki Kaisha Toshiba Semiconductor device including inversion preventing layers having a plurality of impurity concentration peaks in direction of depth
JPH03222467A (ja) * 1990-01-29 1991-10-01 Mitsubishi Electric Corp 半導体集積回路装置
US5994755A (en) * 1991-10-30 1999-11-30 Intersil Corporation Analog-to-digital converter and method of fabrication
JP3217560B2 (ja) * 1993-11-15 2001-10-09 株式会社東芝 半導体装置
US5623159A (en) * 1994-10-03 1997-04-22 Motorola, Inc. Integrated circuit isolation structure for suppressing high-frequency cross-talk
US5559349A (en) * 1995-03-07 1996-09-24 Northrop Grumman Corporation Silicon integrated circuit with passive devices over high resistivity silicon substrate portion, and active devices formed in lower resistivity silicon layer over the substrate
US5880515A (en) * 1996-09-30 1999-03-09 Lsi Logic Corporation Circuit isolation utilizing MeV implantation
JPH10199993A (ja) * 1997-01-07 1998-07-31 Mitsubishi Electric Corp 半導体回路装置及びその製造方法、半導体回路装置製造用マスク装置
US6407441B1 (en) * 1997-12-29 2002-06-18 Texas Instruments Incorporated Integrated circuit and method of using porous silicon to achieve component isolation in radio frequency applications
US6388290B1 (en) * 1998-06-10 2002-05-14 Agere Systems Guardian Corp. Single crystal silicon on polycrystalline silicon integrated circuits
US6166415A (en) * 1998-11-02 2000-12-26 Mitsubishi Denki Kabushiki Kaisha Semiconductor device with improved noise resistivity
US6424022B1 (en) * 2000-03-12 2002-07-23 Mobilink Telecom, Inc. Guard mesh for noise isolation in highly integrated circuits
US7575969B2 (en) * 2000-03-02 2009-08-18 Texas Instruments Incorporated Buried layer and method
US20020125537A1 (en) * 2000-05-30 2002-09-12 Ting-Wah Wong Integrated radio frequency circuits
US6441442B1 (en) * 2000-05-30 2002-08-27 Programmable Silicon Solutions Integrated inductive circuits
US6525394B1 (en) * 2000-08-03 2003-02-25 Ray E. Kuhn Substrate isolation for analog/digital IC chips
JP2002198490A (ja) * 2000-12-26 2002-07-12 Toshiba Corp 半導体装置
US6909150B2 (en) * 2001-07-23 2005-06-21 Agere Systems Inc. Mixed signal integrated circuit with improved isolation
US6563181B1 (en) * 2001-11-02 2003-05-13 Motorola, Inc. High frequency signal isolation in a semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7884440B2 (en) 2006-04-26 2011-02-08 Magnachip Semiconductor, Ltd. Semiconductor integrated circuit
CN101771037B (zh) * 2008-12-31 2013-03-13 台湾积体电路制造股份有限公司 减小衬底中的高频信号损失
CN102055414A (zh) * 2010-04-14 2011-05-11 锐迪科创微电子(北京)有限公司 射频功率放大器模块及移动通信终端
CN108538834A (zh) * 2012-06-28 2018-09-14 天工方案公司 高电阻率基底上的双极型晶体管
CN108538834B (zh) * 2012-06-28 2022-10-11 天工方案公司 高电阻率基底上的双极型晶体管
CN104051529B (zh) * 2013-03-13 2017-07-28 台湾积体电路制造股份有限公司 高阻抗衬底上的rf开关

Also Published As

Publication number Publication date
AU2003248560A1 (en) 2004-01-06
US20030234438A1 (en) 2003-12-25
EP1518276A1 (en) 2005-03-30
WO2004001850A1 (en) 2003-12-31
JP2005531143A (ja) 2005-10-13
KR20050013190A (ko) 2005-02-03

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