CN1502439A - 预镀可湿引线框倒焊晶片组件限制回流时焊料扩散的方法 - Google Patents
预镀可湿引线框倒焊晶片组件限制回流时焊料扩散的方法 Download PDFInfo
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Abstract
本发明公开了一种用于在倒焊晶片组件制造过程中在预先确定/设计的区域内控制焊料扩散的方法和结构。采用本技术领域中所使用的传统工艺将盲孔或凹坑成形在引线框上,盲孔或凹坑随后用作容器或容纳焊料的坑,从而防止焊料扩散更广。
Description
技术领域
本发明总体涉及一种高密度的半导体倒焊晶片存储器封装,更具体地说,涉及引线框组件的制备,其中公开了用于控制焊料扩散和焊块厚度的方法。
背景技术
由于当前的和将来的微电子封装要求倾向于采用大尺寸芯片,并且要求密度更高、更轻、更小、更薄和更快的电子产品以及在回流过程中更好地控制焊料的扩散,因此必须采用更厚的焊料厚度。本发明提供了一种利用设在引线框上的凹坑特征来制备高密度的细针距的引线框倒焊晶片组件。
授予Hembree的专利号为6386436的美国专利介绍了一种用于形成倒焊晶片组件的焊块互连结构的方法。
授予Razon等人的专利号为6386433的美国专利公开了一种焊球传送和回流的方法及装置。
授予Brouillette等人的专利号为6386433的美国专利显示了一种用于形成焊块的方法及装置。
授予Longgood等人的专利号为No.6045032的美国专利介绍了一种在波峰焊过程中防止电气元件的焊料回流的方法。
发明内容
本发明的一个目的是提供一种引线框结构和用于制备控制细针距的微电子倒焊晶片封装时的回流过程中焊料的扩散的所述结构的方法。
本发明的另一目的是提供一种更好地控制焊料扩散的手段。
本发明的另一目的是保证在回流之后有更厚的焊料厚度,同时还能提高可靠性能。
为了实现本发明的这些和其它目的,提供了一种用于限制焊料扩散的方法,此方法是通过在引线框倒焊晶片封装中的半导体IC芯片的焊块位置处的衬底上设置凹坑来实现的。
根据本发明,引线框可包括以下四种材料中的任何一种:镍-铁,片状金属包层,铜和铜基合金。采用光刻形成图案的技术并且在焊块位置处的衬底上设置凹坑来使引线框个性化。
实施本发明的优点包括:1.允许在回流过程中控制焊料扩散;2.实现了回流之后的得到改善的焊料厚度控制,并减小了焊块下面的热应力和机械应力,从而改善了组件加工的产量;3.显示了得到改善的可靠性性能及焊料厚度控制;4.形成了可达到细针距的、高的管脚数量和大尺寸高密度装置的要求的坚固的倒焊晶片结构/封装。
附图说明
通过下面的详细介绍并结合附图,可以更清楚地理解本发明的上述和其它目的和优点。附图显示了标明类似的或对应的部件、区域和部分的相关标号,在附图中:
图1是本发明的剖视图,显示了没有凹坑的并且焊料溢出的引线框结构。
图2是本发明的一个优选实施例的剖视图,显示了设有用作焊料坑或收集器的凹坑设置在其中的引线框结构。
具体实施方式
发现问题
现有应用中本发明人已发现存在下列问题和缺点:
1.对于大尺寸装置而言,热机械应力集中会导致由于芯片与衬底之间的CTE失配而使焊块/装置之间的互连接点失效,这种情况在没有采用用于回流过程中的焊料厚度控制的装置时更加恶化。
2.采用球形和柱形焊块互连结构的倒焊晶片结构,在达到细针距的布线要求方面已受到了限制,这是因为由互连焊块加在硅上的应力使得装置失效,因而需要进行焊块尺寸厚度控制和焊料扩散,如果没有这样做的话,将导致疏远,造成填充不足的可靠性问题。
3.细针距的布线的要求已经增加了工艺的复杂性,而且由于在封装工艺过程中不能有效地控制回流之后有较厚焊料厚度,因此减少了产量。
4.在现有技术中采用传统方法实施的工艺导致焊块厚度受到限制,这就会造成产量减少以及在大尺寸、高密度应用中的短期/长期可靠性性能问题。
初始结构
参考附图,如图1所示,其中显示了没有凹坑的引线框的剖视图。结构1为优选的连接芯片的衬底,也可理解为可以包括一个防止塑料在模制操作过程中从引线之间溢出的屏障,以及从芯片到底板上的导电和导热体。图1还可以是具有基层1的衬底的剖视图,其可由预涂镀的钯,或者从三种材料例如镍-铁、片状金属包层和铜基合金中选出的一种材料所组成。另外,图1显示了铜接点2(倒焊晶片回流的焊球随后沉积于其上)以及焊料溢出物3和焊料厚度4。
图2是本发明的优选结构的剖视图,显示了带有凹坑的引线框。在本发明的一个重要特征中,图2显示了用作设置在引线框1上的收集器或坑/盲孔的凹坑4。因此,显示了在倒焊晶片组装过程中用于将控制焊料的扩散从预先确定的区域控制成为指定区域的装置。
本发明的重要步骤
本发明的步骤可参考图2得到最好的理解。
图2包括典型的由厚度为2.0毫米的引线框金属卷成的带材衬底1,在其上通过采用光刻法的化学研磨形成具有图案的层,利用可溶化金属的化学物质在金属衬底上刻蚀图案。引线框衬底可通过冲压工艺来制备,其中采用硬质合金顺序冲模来从带材上机械去除金属。引线框金属衬底1是裸的(未涂镀的)或者预涂镀有通过标准沉积方法形成了图案的钯或铬/铜(Cr/Cu)或钛/铜(Ti/Cu)导体,例如,通过涂镀和本技术领域中应用的溅射以及传统的光刻方法的组合。一个预先设置的凹坑或坑状焊料收集器4,将其选择性地在衬底上的焊块位置处刻蚀形成图案,接下来沉积倒焊晶片的焊块3。凹坑4的开口直径和深度取决于焊球的直径。典型地,焊球直径在100微米到300微米的范围内。采用倒焊晶片焊块3的互连回流工艺来进行连在装置的铜接点2上的下一个芯片连接的操作。在最后的步骤中,包括有芯片电互连结构和引线框的整个组件覆盖有聚合物的封装物。
尽管根据优选实施例来介绍和展示了本发明,但其并非用于限制本发明,本发明只由所附权利要求所限定。另外,在不脱离本发明的精神实质和范围的前提下,本领域的技术人员可以进行各种修改、变化和改进。
Claims (34)
1.一种可防止焊料扩散的制造集成电路封装的方法,其特征在于,包括以下步骤:
提供一种衬底,其上连有半导体装置,所述半导体装置上成形加工有包括引线或无引线焊料的焊块或柱形包;
提供一种带有预先设置的盲孔凹坑的引线框或衬底;
将所述半导体装置连结在所述引线框或衬底上。
2.根据权利要求1所述的方法,其特征在于,所述盲孔或凹坑通过刻蚀工艺成形在所述引线框上。
3.根据权利要求1所述的方法,其特征在于,所述盲孔或凹坑通过冲压工艺成形在所述引线框上。
4.根据权利要求1所述的方法,其特征在于,各所述盲孔或凹坑通过模制工艺成形在所述引线框上。
5.根据权利要求1所述的方法,其特征在于,所述引线框材料从包含有镍-铁、片状金属包层,铜和铜基合金的这类材料中选出。
6.根据权利要求1所述的方法,其特征在于,所述引线框材料预涂镀有金属镀层,例如钯。
7.根据权利要求1所述的方法,其特征在于,所述IC芯片和预涂镀有钯的引线框金属镀层包含有Cu(铜),所述IC芯片籽晶底部金属镀层从包含有铬铜合金的这类物质组中选出。
8.根据权利要求1所述的方法,其特征在于,所述各IC顶部和/或底部金属镀层的图案由光学处理和刻蚀形成。
9.根据权利要求1所述的方法,其特征在于,所述粘结层由从包含有钛和铬的这类物质组中选出的材料所形成。
10.根据权利要求1所述的方法,其特征在于,所述覆盖有导电性接点的引线框IC芯片互连结构包括一个接合点。
11.根据权利要求1所述的方法,其特征在于,所述IC芯片UBM顶部和底部金属镀层及籽晶层从包括有Ti/Cu或Cr/CrCu/Cu的这类物质组中选出。
12.根据权利要求1所述的方法,其特征在于,所述半导体IC球形或柱形包包含有Cu(铜)。
13.根据权利要求1所述的方法,其特征在于,所述半导体IC覆盖有引线或者无引线的合金的焊料材料,焊料从包含有Sn/Ag,SnPb,SnAgCu和SnBi的这类物质组中选出。
14.根据权利要求1所述的方法,其特征在于,所述IC芯片的底部非导电性初始钝化层从包含有Si3N4,SiO2,Si3O4/SiO2的这类物质组中选出。
15.根据权利要求1所述的方法,其特征在于,所述焊块的直径在60微米到300微米的范围内。
16.根据权利要求1所述的方法,其特征在于,所述衬底/装置的所述经过钝化的外覆层从包含低介电性的有机层压片比如聚酰亚胺和苯丙环丁烯的这类物质组中选出。
17.根据权利要求1所述的方法,其特征在于,所述衬底/装置的所述经过钝化的外覆层从通称为热固性和热塑性的聚合物的这类材料中选出。
18.根据权利要求1所述的方法,其特征在于,所述底部初始钝化层的开口在50微米到250微米的范围内。
19.根据权利要求1所述的形成倒焊晶片的方法,其特征在于,所述方法包括以下步骤:
提供一种半导体晶片,在所述晶片上沉积有籽晶层;在所述籽晶层上成形有底部金属镀层;在所述中间的金属镀层上成形顶部金属镀层;采用传统的光刻工艺来形成所述顶部和底部金属镀层的图案,钝化和预钝化层围绕通孔开口而形成,并且具有多个接点,所述接点形成了与其互连的焊料的互连结构。
20.根据权利要求19所述的方法,其特征在于,所述导电性金属镀层由从包含有铜和铝的这类物质组中选出的材料所组成。
21.根据权利要求19所述的方法,其特征在于,所述顶部和底部金属镀层和所述籽晶层由从包含有Ti/Cu,Cr/Cu,Ti/Ni和Ni/Au的这类物质组中选出的材料所组成。
22.根据权利要求19所述的方法,其特征在于,所述光致抗蚀层由包含有干燥的抗蚀膜和液体光致抗蚀剂的光致抗蚀材料所组成。
23.一种用于防止焊料扩散的集成电路封装,其特征在于,包括:
一个包含了半导体装置的衬底,所述半导体装置包括成形于其上的C-4焊料或由引线或无引线焊料组成的焊料或柱形包;
一个带有预先设置的盲孔凹坑的引线框或衬底;
所述半导体装置与所述引线框或衬底相连。
24.根据权利要求23所述的封装,其特征在于,所述引线框材料从包含有镍-铁、片状金属包层,铜和铜基合金的材料中选出。
25.根据权利要求23所述的封装,其特征在于,所述引线框材料预涂镀有金属涂层,例如钯。
26.根据权利要求23所述的封装,其特征在于,所述IC芯片和预涂镀有钯的引线框金属镀层包含Cu(铜),所述IC芯片籽晶底部金属镀层包含铬铜合金。
27.根据权利要求23所述的封装,其特征在于,所述粘结层由从包含有钛和铬的这类物质组中选出的材料所形成。
28.根据权利要求23所述的封装,其特征在于,所述覆盖有导电性接点的焊料引线框IC芯片的互连结构包括一个焊接点。
29.根据权利要求23所述的封装,其特征在于,所述所述半导体IC球形或柱形包包含Cu(铜)。
30.根据权利要求23所述的封装,其特征在于,所述半导体IC覆盖有引线或者无引线的合金的焊料材料,所述焊料从包含有Sn/Ag,SnPb,SnAgCu和SnBi的这类物质组中选出。
31.根据权利要求23所述的封装,其特征在于,所述焊块的直径在60微米到300微米的范围内。
32.根据权利要求23所述的封装,其特征在于,所述衬底/装置的经过钝化的外覆层从包含低介电性的有机层压片比如聚酰亚胺和苯并环丁烯的这类物质组中选出。
33.根据权利要求23所述的封装,其特征在于,所述衬底/装置的经过钝化的外覆层从通称为热固性和热塑性的聚合物的这类材料中选出。
34.根据权利要求23所述的封装,其特征在于,所述焊接点由铜或铝组成。
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US10/283,442 | 2002-10-30 | ||
US10/283,442 US20040084508A1 (en) | 2002-10-30 | 2002-10-30 | Method for constraining the spread of solder during reflow for preplated high wettability lead frame flip chip assembly |
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CN (1) | CN1502439A (zh) |
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WO2015109540A1 (zh) * | 2014-01-24 | 2015-07-30 | 吉瑞高新科技股份有限公司 | 电子烟及其雾化组件与电源组件 |
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CN103456607A (zh) * | 2013-09-12 | 2013-12-18 | 中国科学院微电子研究所 | 一种碳基半导体器件制备工艺中对衬底进行预处理的方法 |
CN103456607B (zh) * | 2013-09-12 | 2017-03-29 | 中国科学院微电子研究所 | 一种碳基半导体器件制备工艺中对衬底进行预处理的方法 |
WO2015109540A1 (zh) * | 2014-01-24 | 2015-07-30 | 吉瑞高新科技股份有限公司 | 电子烟及其雾化组件与电源组件 |
CN106413438A (zh) * | 2014-01-24 | 2017-02-15 | 吉瑞高新科技股份有限公司 | 电子烟及其雾化组件与电源组件 |
CN106413438B (zh) * | 2014-01-24 | 2019-03-05 | 吉瑞高新科技股份有限公司 | 电子烟及其雾化组件与电源组件 |
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AU2003248608A1 (en) | 2004-05-25 |
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