CN1292151A - 立式集成电路装置 - Google Patents

立式集成电路装置 Download PDF

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Publication number
CN1292151A
CN1292151A CN99803434A CN99803434A CN1292151A CN 1292151 A CN1292151 A CN 1292151A CN 99803434 A CN99803434 A CN 99803434A CN 99803434 A CN99803434 A CN 99803434A CN 1292151 A CN1292151 A CN 1292151A
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integrated circuit
control device
circuit system
semiconductor chip
vertically integrated
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M·巴德尔
M·斯莫拉
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Infineon Technologies AG
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Infineon Technologies AG
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/74Masking faults in memories by using spares or by reconfiguring using duplex memories, i.e. using dual copies
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481Internal lead connections, e.g. via connections, feedthrough structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/552Protection against radiation, e.g. light or electromagnetic waves
    • H01L23/556Protection against radiation, e.g. light or electromagnetic waves against alpha rays
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/585Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657Stacked arrangements of devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06513Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06541Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Storage Device Security (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

一种立式集成电路装置,具有至少一个第一集成电路和一个第二集成电路,第一和第二集成电路彼此重叠设置。此外两个集成电路具有相同的功能。而且其中至少一个集成电路中设有一个控制装置,该控制装置控制具有相同功能的电路之间的联合工作情况。

Description

立式集成电路装置
本发明涉及一种立式集成电路装置,它具有至少一个第一集成电路和一个第二集成电路,第一和第二集成电路彼此重叠设置,其中两个集成电路具有相同的功能,而且其中至少一个集成电路中设有一个控制装置,该控制装置控制具有相同功能的电路之间的联合工作情况。
半导体技术中的现代生产方法和新工艺正逐渐使由此形成的结构小型化。此外,小型化在大多数情况下均以减小MOS晶体管信道宽度为基础,所以元件所需的面积应呈二次幂减小。目前已有结构的信道宽度为0.35μm而且结构较小(0.25mm)。然而可以预见,将来将使用0.1μm量级的结构。
随着半导体结构的不断变小,为了使结构呈指数状减小而增加了受电路噪声影响的危险。这种电路噪声例如可能由量子力学中提及的微粒引起。
微粒能穿透把集成电路装置环绕在所谓半导体芯片上的外壳,并且不仅损坏由比构成的半导体结构,而且还能够产生电子或吸收电子。这将导致耐久性下降并使半导体结构受到间歇误差影响。特别是由于外来影响引起“轰击”的可能性增大,这象通常在宇航技术中使用的半导体结构那样背离了保护地球大气的原则。在使用这些部件时通常用金箔和银箔作为电路的外包层,以便达到至少在一定程度完成上述微粒吸收。
然而,随着小型化的不断发展不可避免的是,上述用金箔和银箔制成的外包层并不能保证提供足够的保护,所以增加了因上述“轰击”造成的危险或干扰。这种危险在通常的陆地应用中将不断增加。
因此本发明的目的是提供一种集成电路,该电路在应用于宇航技术时能保证安全工作。
按照本发明,该目的是是这样达到的,即一种立式集成电路装置,具有至少一个第一集成电路和一个第二集成电路,第一和第二集成电路彼此重叠设置,其中两个集成电路具有相同的功能,而且其中至少一个集成电路中设有一个控制装置,该控制装置控制具有相同功能的电路之间的联合工作情况。
借助于上述类型的立式集成电路装置通过利用至少两个彼此叠放的集成电路的相同功能和为安全工作而提供多余信息的控制装置可以确保提高运行的安全性。
在另一个优选结构中,如权利要求2所述,其由以下特征支持,即控制装置获取统计结果的冗余函数,通过上述装置可借助于控制装置将数据处理中与安全有关的事件随机地或有目的地分配给相互叠放的集成电路,所以可以防止在不允许的情况下存取与安全有关的数据或事件。
下面将根据唯一一个附图所示的实施例说明本发明。
附图中:
图1示出的是本发明实施例的示意性剖面图。
如图中所示,根据本发明至少设置两个集成电路、两个集成电路形成在两个彼此重叠的半导体芯片1和2上。半导体芯片1和2的上表面上具有一个有源区1a和2a,在有源区中用常规工艺形成集成电路。因此所述装置整体上可以以立式集成电路装置的形式工作,并设置了触点,上述触点例如在图中仅示出了一个,但实际上可以根据所需的数量设置。因此,有源区1a或2a具有叠放的触点1b或2b。在半导体芯片1中设有通孔7,该通孔中填充有导电材料6而且用这种方式使触点1b和2b彼此相连。
因此两个半导体芯片1和2在其各有源区1a或2a中具有大体上相同的功能。这便是集成电路各自的构成形式。
在两个半导体芯片的至少一个有源区中设有一个未示出的附加控制装置。控制装置用于控制两个半导体芯片1和2中两个集成电路之间的联合工作情况。
因此,本发明提供了两个完全不同的优选实施例,但是这两个实施例也可以彼此结合。
下面将描述第一个优选实施例。在如上所述具有相同功能的两个半导体芯片中可以完成并行的数据处理过程所以控制装置可以通过两个并行的连续过程获得一个统计结果。从粒子轰击引起随机干扰的角度来看,增加了用上述方式获得统计结果的可能性。
用两个以上相互叠置的半导体芯片可以增加上述可能性。
如上所述,由于粒子轰击对电路造成的影响对接地网有极重要的意义,所以也可以把上述装置合理地用于与安全电路有关的应用中。可以将其作为特定的组件例如所谓的“芯片卡”或“智能卡”或者作为阅读器中的组件用于上述安全装置中。在这种应用中,可以在未经允许执行存取操作之前保护与安全有关的数据,例如字码。这可以通过以下方式实现,即使得只能在一个半导体芯片上处理和使用与安全有关的数据,该半导体芯片被另一个半导体芯片覆盖。按照附图,这可以通过单独处理半导体芯片2上的与安全有关的数据来实现。
此外,可以采用的方式虽然在附图中没有单独示出,但是作为集成电路在第一或第二半导体芯片1或2的有源区域1a或2a之一中设置的控制装置负责分配具有相同功能的另一集成电路的工作。由于两者的功能相同,所以通过未指明的电路分析,可以完成用这种方式进行的半导体芯片1或半导体芯片2上的处理。确切地说可以采用的方式可以是,控制装置通过随机控制例如半导体芯片1或半导体芯片2上的数据处理来完成其工作。
由于采用了使集成电路执行确定程序的不可预见的方式,所以极大地增加了分析处理数据的复杂程度。

Claims (3)

1.一种立式集成电路装置,具有至少一个第一集成电路(1,1a)和一个第二集成电路(2,2a),第一和第二集成电路彼此重叠设置,其中两个集成电路具有相同的功能,而且其中至少一个集成电路中设有一个控制装置,该控制装置控制具有相同功能的电路之间的联合工作情况。
2.根据权利要求1所述的立式集成电路装置,其特征在于,至少同时驱动相同功能中的一部分功能而且由控制装置获取统计结果。
3.根据上述权利要求的其中任一所述的立式集成电路装置,其特征在于,构成用于数据处理的集成电路而且只在该集成电路中处理与安全有关的数据,在该集成电路上叠放着另一个集成电路。
CN99803434A 1998-12-30 1999-12-21 立式集成电路装置 Pending CN1292151A (zh)

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DE19860817.9 1998-12-30
DE19860817 1998-12-30

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EP (1) EP1060512A1 (zh)
JP (1) JP2002534808A (zh)
KR (1) KR20010083778A (zh)
CN (1) CN1292151A (zh)
BR (1) BR9908393A (zh)
WO (1) WO2000041240A1 (zh)

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EP3131032B1 (en) 2014-04-09 2021-09-22 ICTK Holdings Co., Ltd. Authentication apparatus and method

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JPS5588356A (en) * 1978-12-27 1980-07-04 Hitachi Ltd Semiconductor device
KR900008647B1 (ko) * 1986-03-20 1990-11-26 후지쓰 가부시끼가이샤 3차원 집적회로와 그의 제조방법
EP0454447A3 (en) * 1990-04-26 1993-12-08 Hitachi Ltd Semiconductor device assembly
EP0695494B1 (en) * 1993-04-23 2001-02-14 Irvine Sensors Corporation Electronic module comprising a stack of ic chips
EP0732107A3 (en) * 1995-03-16 1997-05-07 Toshiba Kk Screen device for circuit substrate
US5824571A (en) * 1995-12-20 1998-10-20 Intel Corporation Multi-layered contacting for securing integrated circuits

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EP1060512A1 (de) 2000-12-20
BR9908393A (pt) 2000-10-31
JP2002534808A (ja) 2002-10-15
WO2000041240A1 (de) 2000-07-13
KR20010083778A (ko) 2001-09-01

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