KR19980703395A - 캐리어 모듈 - Google Patents

캐리어 모듈 Download PDF

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KR19980703395A
KR19980703395A KR1019970706800A KR19970706800A KR19980703395A KR 19980703395 A KR19980703395 A KR 19980703395A KR 1019970706800 A KR1019970706800 A KR 1019970706800A KR 19970706800 A KR19970706800 A KR 19970706800A KR 19980703395 A KR19980703395 A KR 19980703395A
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semiconductor chip
carrier
semiconductor chips
chip
carrier module
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KR1019970706800A
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English (en)
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마르틴 그루버
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로더리히네테부쉬
지멘스악티엔게젤샤프트
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Publication of KR19980703395A publication Critical patent/KR19980703395A/ko

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    • G07F7/00—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
    • G07F7/08—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means
    • G07F7/10—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means together with a coded signal, e.g. in the form of personal identification information, like personal identification number [PIN] or biometric data
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Abstract

광학적 분석으로부터의 보호를 위해, 캐리어 모듈에서는, 두 개의 반도체 칩들이 전기적으로 서로 연결될 때에만 제 기능을 수행하는 방식으로 겹층으로 배치된다.

Description

캐리어 모듈
캐리어 모듈(CARRIER MODULE)은, 예를 들어, EP 0 193 856 B1에 개시되어 있다. 개시된 캐리어 모듈의 경우에는, 다량의 접촉부재들이 기판상에 정렬되어 있고, 라인 네트워크를 통해 기판 상에 형성된 오목부 내에 배치된 반도체 칩들과 전기적으로 연결되어 있다. 반도체 칩들은 또한 라인 네트워크에 의해 전기적으로 상호 연결되어 있다.
소위 스마트 카드(SMART CARD)와 같은 카드 형태로 되어 있는 데이터 캐리어에 이용되는 반도체 칩들에서는, 예를 들어 EEPROMs와 같은 비활성 메모리 및 상기 비활성 메모리를 제어하거나 메모리로부터의 판독된 데이터를 처리하는 로직회로가 주로 구현된다. 저장된 데이터는 종종 금전적으로 또는 다른 방식으로 가치가 표출되기 때문에, 일반적으로 비밀부호가 사용되는 사용 권한 점검이 수행된다. 더욱이, 점검을 위해 요구되는 회로들은 비밀이 유지되어야만 하는 구조를 가질 수 있다. 이런 이유 때문에, 반도체 칩들은 조사되는 것으로부터 방지되어야 한다. 비활성 메모리 영역 내에 저정된 데이터는, 저장된 명령 상태의 직접 확인으로부터 기술적 수단에 의해서 보호될 수 있다. 그러나, 메모리 내용에 액세스하는 경우에는, 메모리에 연결된 라인 상에 있는 명령 상태로부터 로직회로까지 저장된 데이터를 추론하는 것이 여전히 가능하다. 그러나, 이런 목적을 위해서는, 로직회로가 기능적이어야만 한다.
본 발명은 캐리어 모듈에 관한 것이다. 본 발명은 특히, 접촉부재들을 갖는 캐리어부재 및 캐리어 부재상에 배치되어 접촉부재들과 전기적으로 연결되는 적어도 두 개의 반도체 칩들이 구비된 카드 형상으로 데이터 캐리어 내부에 형성하기 위한 캐리어 모듈에 관한 것이다.
도 1은 본 발명에 따른 캐리어 모듈의 제 1변형예를 도시하고 있고,
도 2는 본 발명에 따른 캐리어 모듈의 제 2변형예를 도시하고 있다.
따라서, 본 발명의 목적은, 비밀 부품들의 조사가 방지되는 캐리어 모듈을 제공하는 것이다.
상기 목적은, 적어도 하나의 반도체 칩은 다른 반도체 칩 상에 배치되고 서로 전기적으로 연결되어, 이 연결이 존재하는 동안에만 회로(들)가 반도체 칩(들) 상에서 의도되는 제 기능이 구현되는 일반적인 형태의 캐리어 모듈에 의해 달성된다.
만약 회로 부품들의 비밀이 유지되지 않는다면, 메모리 또는 예를 들어 비밀부호를 포함하는 그 밖의 메모리 영역 및, 예를 들어 의사난수 생성기(PSEUDORANDOM GENERATOR)와 같이 비밀이 유지되는 로직부품들은 이런 경우에는 저반도체 칩에서 구현되고, 그것들은 상부칩에 의해 숨겨지기 때문에 확인될 수 없다. 그런나, 만약 상부칩이 제거되면, 칩들 사이의 연결이 차단되어, 그 결과로서 하부칩은 더 이상 제 기능을 수행하지 않게 되고, 결과적으로 조사되는 명령 패턴이 라인 상에서 만들어질 수 없게 된다.
상부 칩은 특히 하부 칩 위에 배치됨으로써, 회로가 구현되는 상부칩의 표면은 회로를 갖는 하부 칩의 표면 측으로 향하게 된다. 이런 방식으로 인하여, 상부 칩은 또한, 두 개의 칩들을 서로 분리하지 않고서는 광학적으로 조사될 수 없어서, 그 기능성이 차단된다.
그러나, 두 개의 칩들을 겹겹으로 배치하는 것이 또한 가능함으로써, 칩들이 같은 방향을 가지게 되고, 접합 와이어를 통해 전기적 연결의 제공이 가능하다. 그러나, 후자는 아주 짧거나, 예를 들어 상부 칩의 적어도 두 개의 측면 상에서 상부 칩이 제거될 때 벗겨지는 방식으로 부착되어야만 한다.
캐리어 부품은, 금속라미네이트 플라스틱 시트이거나 리드프레임(LEAD FRAME)일 수 있다. 리드프레임은 이 경우에는 접촉부재들이 일반적인 방식으로 전도체 프레임에 연결되고 중앙부에서 후자로부터 돌출되는 것으로 이해될 수 있다. 일단 초기에 접촉부재들의 자유단부들이 하우징에 고정되면, 접촉부재들은 전도체 프레임으로부터 박멸되거나 다른 방식으로 분리된다.
도 1에서는, 플라스틱 시트(1)가 금속 시트 예를 들어 구리시트의 일면에 적층판으로 만들어져 있다. 슬롯들(8)이 구리 시트(2) 내부로 에칭됨으로써, 다른 것으로부터 전기적으로 절연되는 접촉부재들이 제조된다. 플라스틱 시트(1)는 제 1 반도체 칩(3)이 배치되는 예를 들어 접합되는 중앙부분에 오목부들을 가지고 있다. 접합 와이어들(6)은 모두 제 1 반도체 칩(3) 및 구리 시트로부터 형성되는 접촉부재들에 연결되고, 이들 접촉부재들은 플라스틱 시트(1) 내의 오목부를 통해 액세스가능하도록 되어 있다. 제 2 반도체 칩(4)은 제 1 반도체 칩(3) 상에 배치되어 있고, 접합 와이어들(5)을 통해 제 1 반도체 칩(3)에 전기적으로 연결되어 있다. 제 2 반도체 칩(4)은 예를 들어 절연 접착제에 의해 제 1 반도체 칩(3)에 연결될 수 있다. 보호될 수 있는 제 1 반도체 칩(3)의 회로영역은 본 발명에 따른 방식으로 배치됨으로써, 그것들은 제 2 반도체 칩(4)에 의해 숨겨지게 되고, 결과적으로 광학적으로 조사될 수 없게 된다. 제 2 반도체 칩(4)이 제거되는 경우에는, 접합 와이어들(5, 6)이 벗겨지게 되고, 결과적으로 반도체 칩들 상에서 구현되는 회로들은 더 이상 제 기능을 수행하지 않게 되고, 결과적으로 라인 상에 만들어지는 명령 가능성의 조사가 방지된다. 반도체 칩들(3, 4)을 기구적으로 보호하기 위해서는, 예를 들어 금속으로 만들어지는 강성링(7)이, 적어도 반도체 칩들 및 접합 와이어들을 둘러싸는 방식으로, 플라스틱 시트(1) 상에 배치된다. 강성링(7)의 내부는 합성 혼합물(9) 예를 들어 수지(9)로 충진되어 있다.
도 2는 본 발명에 따른 캐리어 모듈의 제 2변형예를 도시하고 있고, 각 부는 동일 참조번호를 사용하고 있다. 제 1변형예와는 대조적으로, 두 개의 반도체 칩들(3, 4)이 접합 와이어들을 통해 전기적으로 연결되어 있지 않다. 이 경우에는, 두 개의 반도체 칩들(3, 4)중 적어도 하나는 칩 표면 위로 돌출되는 접촉영역들을 가지고 있고, 접촉영역들은 공간적인 배치 상으로 다른 반도체 칩 상의 접촉 영역에 상응하게 된다. 반도체 칩들(3, 4)은 회로를 갖는 표면들이 다른 쪽으로 향하는 방식으로 서로 연결되어 있다. 이런 이로운 방식에 의하여, 그들이 서로 연결되는 한, 두 개의 반도체 칩들(3, 4) 중 어느 하나를 광학적으로 조사하는 것이 불가능하게 된다. 그러나, 만약 이들이 서로 분리된다면, 두 개의 칩들 중 어느 것도 제 기능을 수행하지 않게 되고, 이런 이유 때문에, 이들 중 어느 것도 또한 조사될 수 없다.

Claims (7)

  1. 카드 형상으로 데이터 캐리어 내에 형성하기 위한 캐리어 모듈에 있어서,
    접촉부재들을 갖는 캐리어부재, 및
    상기 캐리어부재 상에 배치되고 상기 접촉부재에 전기적으로 연결될 수 있는 적어도 두 개의 반도체 칩들을 포함하며,
    상기 적어도 하나의 반도체 칩은 다른 반도체 칩 상에 배치되고 서로 전기적으로 연결되어, 이 연결이 존재하는 동안에만 회로(들)가 반도체 칩(들) 상에서 의도되는 제 기능이 구현되는 것을 특징으로 하는 캐리어 모듈.
  2. 제 1항에 있어서,
    상기 캐리어부재는 리드프레임인 것을 특징으로 하는 캐리어 모듈.
  3. 제 1항에 있어서,
    상기 캐리어부재는 금속라미네이트 특히 구리라미네이트, 플라스틱 시트이고, 상기 접촉부재는 상기 금속라미네이트으로부터 에칭되는 구조체에 의해 형성되는 것을 특징으로 하는 캐리어 모듈.
  4. 제 1항 내지 제 3항 중 어느 한 항에 있어서,
    상기 전기 연결부들은 접합 연결부들인 것을 특징으로 하는 캐리어 모듈.
  5. 제 1항 내지 제 4항 중 어느 한 항에 있어서,
    상기 반도체 칩들은, 서로 겹층으로 배치되어 상부 반도체 칩이 제거될 때 반도체 칩들간의 전기적 연결이 차단되는 방식을 갖는 것을 특징으로 하는 캐리어 모듈.
  6. 제 1항 내지 제 5항 중 어느 한 항에 있어서,
    상기 반도체 칩들은, 회로를 갖는 표면이 서로 마주보는 방식으로 연결되는 것을 특징으로 하는 캐리어 모듈.
  7. 제 6항에 있어서,
    상기 반도체 칩들은, 적어도 하나의 반도체 칩이 있는 경우에는, 칩 표면 위에 돌출되는 접촉영역에 의해 전기적으로 연결되어 다른 것에 할당되는 것을 특징으로 하는 캐리어 모듈.
KR1019970706800A 1995-03-30 1996-03-29 캐리어 모듈 KR19980703395A (ko)

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JP3960645B2 (ja) * 1996-12-27 2007-08-15 ローム株式会社 回路チップ搭載カードおよび回路チップモジュール
DE19701165C1 (de) * 1997-01-15 1998-04-09 Siemens Ag Chipkartenmodul
FR2764403B1 (fr) * 1997-06-09 1999-09-10 Ckd Sa Procede pour la protection physique de l'echange de donnees confidentielles, ainsi qu'un equipement mettant en oeuvre ledit procede
DE19735170A1 (de) * 1997-08-13 1998-09-10 Siemens Ag Chipmodul, insbesondere für kontaktbehaftete Chipkarten, mit nebeneinander angeordneten Chips
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FR2797075B1 (fr) * 1999-07-26 2001-10-12 Gemplus Card Int Procede de fabrication de dispositif portable a circuits integres, de type carte a puce de format reduit par rapport au format standard
EP1100058A1 (de) * 1999-11-12 2001-05-16 Infineon Technologies AG Elektronisches Bauelement und Verfahren zum Schützen einer in dem Bauelement enthaltenen integrierten Schaltung
WO2001052184A2 (de) * 2000-01-11 2001-07-19 Infineon Technologies Ag Chipkartenanordnung
EP1136941A1 (de) * 2000-03-24 2001-09-26 Infineon Technologies AG Tragbare Datenträgeranordnung
DE10065747A1 (de) * 2000-12-29 2002-07-11 Infineon Technologies Ag Schaltungsanordnung
DE10139414A1 (de) * 2001-08-17 2003-02-27 Giesecke & Devrient Gmbh Halbleiterschaltungsanordnung mit biometrischem Sensor und Auswerteeinheit
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