JPH10505959A - キャリア・モジュール - Google Patents

キャリア・モジュール

Info

Publication number
JPH10505959A
JPH10505959A JP8528785A JP52878596A JPH10505959A JP H10505959 A JPH10505959 A JP H10505959A JP 8528785 A JP8528785 A JP 8528785A JP 52878596 A JP52878596 A JP 52878596A JP H10505959 A JPH10505959 A JP H10505959A
Authority
JP
Japan
Prior art keywords
carrier
carrier module
semiconductor chip
chip
electrical connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8528785A
Other languages
English (en)
Inventor
グルーバー、マルチン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of JPH10505959A publication Critical patent/JPH10505959A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G07—CHECKING-DEVICES
    • G07F—COIN-FREED OR LIKE APPARATUS
    • G07F7/00—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
    • G07F7/08—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means
    • G07F7/10—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means together with a coded signal, e.g. in the form of personal identification information, like personal identification number [PIN] or biometric data
    • G07F7/1008—Active credit-cards provided with means to personalise their use, e.g. with PIN-introduction/comparison system
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/072—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising a plurality of integrated circuit chips
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/073—Special arrangements for circuits, e.g. for protecting identification code in memory
    • G06K19/07309—Means for preventing undesired reading or writing from or onto record carriers
    • G06K19/07372—Means for preventing undesired reading or writing from or onto record carriers by detecting tampering with the circuit
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q20/00—Payment architectures, schemes or protocols
    • G06Q20/30—Payment architectures, schemes or protocols characterised by the use of specific devices or networks
    • G06Q20/34—Payment architectures, schemes or protocols characterised by the use of specific devices or networks using cards, e.g. integrated circuit [IC] cards or magnetic cards
    • G06Q20/341—Active cards, i.e. cards including their own processing means, e.g. including an IC or chip
    • G—PHYSICS
    • G07—CHECKING-DEVICES
    • G07F—COIN-FREED OR LIKE APPARATUS
    • G07F7/00—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus
    • G07F7/08—Mechanisms actuated by objects other than coins to free or to actuate vending, hiring, coin or paper currency dispensing or refunding apparatus by coded identity card or credit card or other personal identification means
    • G07F7/0806—Details of the card
    • G07F7/0813—Specific details related to card security
    • G07F7/082—Features insuring the integrity of the data on or in the card
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/57—Protection from inspection, reverse engineering or tampering
    • H01L23/573—Protection from inspection, reverse engineering or tampering using passive means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48145—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48464—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/0651—Wire or wire-like electrical connections from device to substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06582—Housing for the assembly, e.g. chip scale package [CSP]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01068—Erbium [Er]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Business, Economics & Management (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Accounting & Taxation (AREA)
  • Strategic Management (AREA)
  • General Business, Economics & Management (AREA)
  • Credit Cards Or The Like (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)

Abstract

(57)【要約】 光学的解析から保護するために本発明によるキャリア・モジュールでは２枚の半導体チップをそれらが電気的に互いに接続されている時だけ有効に機能するように配設する。

Description

【発明の詳細な説明】 キャリア・モジュール 本発明は、特に接触素子を有するキャリア素子とキャリア素子上に配設され電 気的に接触素子と接続可能の少なくとも２枚の半導体チップを有するカード形式 のデータキャリアに組込まれるキャリア・モジュールに関する。この種のキャリ ア・モジュールは例えば欧州特許第０１９３８５６号明細書から公知である。こ のキャリア・モジュールでは基板上に多数の接触素子が配設されており、回線網 を介して基板の凹所に配設されている半導体チップと接続されている。この回線 網により半導体チップも電気的に相互に接続されている。 カード形式のデータキャリア、いわゆるチップカードに使用される半導体チッ プには多くの場合例えばＥＥＰＲＯＭのような不揮発メモリ及びこれを制御する か或はこのメモリから読出されたデータを処理する論理回路が形成されている。 記憶されたデータはしばしば一定の金額を表すか又は他の方法で一定の値を表す ため、多くの場合利用資格チェックが行われ、その際秘密コードが使用される。 更にこのチェックに必要とされる回路は秘密を保持すべき構造を有するようにで きる。この理由から半導体チップは不法検査に対して保護される必要がある。不 揮発メモリ領域内に記憶されたデータは技術的措置により記憶された電荷状態を 直接識別することに対し保護可能であるが、しかしメモリを論理回路と接続する 回線上の電荷状態からメモリ内容にアクセスしてそこに記憶されたデータを推論 することは依然として可能である。そのためにはもちろん論理回路が有効に機能 していなければならない。 従って本発明の課題は、秘密部分の不法検査を阻止するキャリア・モジュール を提供することにある。 この課題は、一般的なキャリア・モジュールでは、少なくとも１枚の半導体チ ップをもう１枚の半導体チップ上に配設し、このもう１枚のチップと電気的に接 続し、半導体チップ上に形成されている回路の設定通りの機能がこの接続状態が 存在する時だけ作用するようにすることにより解決される。 この場合にメモリのような秘密を保持すべき回路部分又は例えば秘密コードが 入っているメモリ部分及び例えばデータの暗号化ための疑似ランダム・ジェネレ ータのような論理素子のみを下方の半導体チップに形成するならば、それらは上 方のチップがそれらを遮蔽しているので識別不能となる。しかしもし上方のチッ プを取り除くならばチップ間の接続は中断され、その結果下方のチップはもはや 機能しなくなり、従ってこの回線には不法検査すべき電荷パターンは存在しない ことになる。 極めて有利な方法では上方のチップの回路が形成されている面を下方のチップ の相応する回路を有する面に向けてこの上に配置する。このようにして上方のチ ップも双方のチップを互いに分離しなければ、従ってその機能を破壊しなければ 光学的に不法検査することはできない。 しかし２枚のチップを上下に同じ方向に向けて配設し、電気的接続をボンド線 を介して行うことも可能である。しかしこの場合ボンド線が短くなり過ぎるか又 は例えば少なくとも上方のチップの２つの側面に取り付けられるため上方のチッ プを除く際にボンド線が引きちぎられることになる。 キャリア素子は金属箔板をかぶせたプラスチック箔であっても、リードフレー ムであってもよい。この場合リードフレームとは、一般に接触素子が導体フレー ムと接続されその中央から突出しているものを意味する。接触素子の最初は自由 な端部をケースにより固定してから、接触素子を導体フレームから打抜くか又は その他の方法でフレームから外す。 本発明を図面を用いて一実施例に基づき以下に詳述する。その際 図１は本発明によるキャリア・モジュールの第１の実施例の断面図を、また 図２は本発明によるキャリア・モジュールの第２の実施例の断面図 を示す。 図１ではプラスチック箔１が片側に金属箔、例えば銅箔を貼付けられている。 銅箔２には電気的に互いに絶縁されている接触素子が形成されるようにスリット ８がエッチングされている。プラスチック箔１は凹所を有し、その中央の凹所に 第１の半導体チップ３が例えば接着により配設されている。ボンド線６はこの第 １の半導体チップ３にも銅箔から形成されている接触素子にも接続されており、 その際これらの接触素子はプラスチック箔１内の他の凹所を通してアクセス可能 である。第１の半導体チップ３上には第２の半導体チップ４が配設されており、 第１の半導体チップ３とボンド線５を介して電気的に接続されている。第２の半 導体チップ４は例えば絶縁性接着剤により第１の半導体チップ３と接続可能であ る。第１の半導体チップ３の保護すべき回路領域は、本発明によれば第２の半導 体チップ４により隠されるように配設されているので、光学的に不法検査するこ とはできない。第２の半導体チップ４を除去すればボンド線５、６が引きちぎら れるので、半導体チップ上に形成された回路はもはや機能せず、従って回線に生 じる電荷ポテンシャルの不法検査は阻止されることになる。半導体チップ３、４ を機械的に保護するには、例えば金属から成る補強リング７をプラスチック箔１ 上に少なくとも半導体チップ及びボンド線を囲むように配設する。この補強リン グ７の内部はプラスチックコンパウンド、例えば樹脂９で満たされる。 図２は本発明によるキャリア・モジュールの第２の実施例（図１に相応する部 分には同じ符号を付けてある）を示すものである。第１の実施例とは異なりこの 場合は両方の半導体チップ３、４はボンド線を介して電気的に互いに接続されて はいない。この場合２枚の半導体チップ３、４の少なくとも一方はチップ表面上 に突出する接触面１０を有し、それらはその空間的配置においてそれぞれ他の半 導体チップ上の相応する接触面と対応する。半導体チップ３、４はその回路を有 する面が互いに対向するように互いに接続される。このような極めて有利な方法 により光学的不法検査は半導体チップ３、４が互いに接続されている限り両者の いずれにも不可能となる。しかし両者が互いに分離された場合には両方のチップ はいずれも機能せず、この理由からもそれらのいずれの不法検査も不可能となる 。

Claims (1)

  1. 【特許請求の範囲】 １．接触素子を有するキャリア素子、キャリア素子上に配設され電気的に接触素 子と接続可能である少なくとも２枚の半導体チップを有する、特にカード形式の データキャリアに組込まれるキャリア・モジュールにおいて、少なくとも１枚の 半導体チップがもう１枚の半導体チップ上に配置されており、半導体チップ上に 形成されている回路の規定通りの機能がこれらと電気的に接続されている場合に のみ付与されることを特徴とするキャリア・モジュール。 ２．キャリア素子がリードフレームであることを特徴とする請求項１記載のキャ リア・モジュール。 ３．キャリア素子が、接触素子が金属積層からエッチングされたパターンにより 形成されている金属特に銅箔を貼付けられたプラスチック箔であることを特徴と する請求項１記載のキャリア・モジュール。 ４．電気的接続がボンド接続であることを特徴とする請求項１乃至３の１つに記 載のキャリア・モジュール。 ５．電気的接続が上方の半導体チップを除去した際に中断されるように半導体チ ップが互いに配設されていることを特徴とする請求項１乃至４の１つに記載のキ ャリア・モジュール。 ６．半導体チップの回路を有する表面が互いに対向するように相互に接続されて いることを特徴とする請求項１乃至５の１つに記載のキャリア・モジュール。 ７．半導体チップの電気的接続が少なくとも一方の半導体チップのチップ表面の 上方に突出している互いに向かい合って配置されている接触面により行われるこ とを特徴とする請求項６記載のキャリア・モジュール。
JP8528785A 1995-03-30 1996-03-29 キャリア・モジュール Pending JPH10505959A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE19511775A DE19511775C1 (de) 1995-03-30 1995-03-30 Trägermodul, insb. zum Einbau in einen kartenförmigen Datenträger, mit Schutz gegen die Untersuchung geheimer Bestandteile
DE19511775.1 1995-03-30
PCT/DE1996/000549 WO1996030944A2 (de) 1995-03-30 1996-03-29 Trägermodul

Publications (1)

Publication Number Publication Date
JPH10505959A true JPH10505959A (ja) 1998-06-09

Family

ID=7758224

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8528785A Pending JPH10505959A (ja) 1995-03-30 1996-03-29 キャリア・モジュール

Country Status (5)

Country Link
EP (1) EP0818023A2 (ja)
JP (1) JPH10505959A (ja)
KR (1) KR19980703395A (ja)
DE (1) DE19511775C1 (ja)
WO (1) WO1996030944A2 (ja)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5824571A (en) * 1995-12-20 1998-10-20 Intel Corporation Multi-layered contacting for securing integrated circuits
JP3960645B2 (ja) 1996-12-27 2007-08-15 ローム株式会社 回路チップ搭載カードおよび回路チップモジュール
DE19701165C1 (de) * 1997-01-15 1998-04-09 Siemens Ag Chipkartenmodul
FR2764403B1 (fr) * 1997-06-09 1999-09-10 Ckd Sa Procede pour la protection physique de l'echange de donnees confidentielles, ainsi qu'un equipement mettant en oeuvre ledit procede
DE19735170A1 (de) * 1997-08-13 1998-09-10 Siemens Ag Chipmodul, insbesondere für kontaktbehaftete Chipkarten, mit nebeneinander angeordneten Chips
DE19928733A1 (de) * 1999-06-23 2001-01-04 Giesecke & Devrient Gmbh Halbleiterspeicher-Chipmodul
FR2797075B1 (fr) * 1999-07-26 2001-10-12 Gemplus Card Int Procede de fabrication de dispositif portable a circuits integres, de type carte a puce de format reduit par rapport au format standard
EP1100058A1 (de) * 1999-11-12 2001-05-16 Infineon Technologies AG Elektronisches Bauelement und Verfahren zum Schützen einer in dem Bauelement enthaltenen integrierten Schaltung
ATE261151T1 (de) * 2000-01-11 2004-03-15 Infineon Technologies Ag Chipkartenanordnung
EP1136941A1 (de) * 2000-03-24 2001-09-26 Infineon Technologies AG Tragbare Datenträgeranordnung
DE10065747A1 (de) * 2000-12-29 2002-07-11 Infineon Technologies Ag Schaltungsanordnung
DE10139414A1 (de) * 2001-08-17 2003-02-27 Giesecke & Devrient Gmbh Halbleiterschaltungsanordnung mit biometrischem Sensor und Auswerteeinheit
DE10205208A1 (de) * 2002-02-08 2003-09-18 Conti Temic Microelectronic Schaltungsanordnung mit einer mit einem programmierbaren Speicherelement bestückten Leiterplatte
US8695881B2 (en) 2004-06-30 2014-04-15 Nxp B.V. Chip card for insertion into a holder

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2205186B (en) * 1987-05-23 1991-02-13 Motorola Inc Memory cards
DE3927887A1 (de) * 1989-08-24 1991-02-28 Philips Patentverwaltung Integrierte schaltung
JPH07121635B2 (ja) * 1989-09-09 1995-12-25 三菱電機株式会社 Ｉｃカード
US5233505A (en) * 1991-12-30 1993-08-03 Yeng-Ming Chang Security device for protecting electronically-stored data

Also Published As

Publication number Publication date
KR19980703395A (ko) 1998-10-15
DE19511775C1 (de) 1996-10-17
WO1996030944A2 (de) 1996-10-03
EP0818023A2 (de) 1998-01-14
WO1996030944A3 (de) 1996-11-28

Similar Documents

Publication Publication Date Title
JPH10505959A (ja) キャリア・モジュール
CN101393907B (zh) 用于电路板的保护
US5072331A (en) Secure circuit structure
US7923830B2 (en) Package-on-package secure module having anti-tamper mesh in the substrate of the upper package
US5965867A (en) Data medium incorporating integrated circuits
US5793101A (en) Package housing multiple semiconductor dies
CA1161558A (en) Portable, identifying element constructed as a lamination of sheets
EP0068539B1 (en) Micropackage for identification card
EP0193856B1 (en) Ic card
EP0217281B2 (en) Method of manufacturing an IC card
RU2190879C2 (ru) Карта со встроенным кристаллом ис и полупроводниковый кристалл ис для применения в карте
US4943464A (en) Electronic component support for memory card and product obtained thereby
US6013945A (en) Electronic module for data cards
US8581251B2 (en) Device for protecting an electronic integrated circuit housing against physical or chemical ingression
CN101512559A (zh) Ic卡和ic卡用插槽
EP1045443A3 (en) Semiconductor device and manufacturing method thereof
US7337967B2 (en) Chip card module
US6259022B1 (en) Chip card micromodule as a surface-mount device
US6165021A (en) Connector for a smart card reader apparatus and card reader comprising same
US8573989B2 (en) Memory card reader
US20060108416A1 (en) Unauthorized access prevention method
JP2520857B2 (ja) 集積半導体回路
US7981716B2 (en) Chip module having a protection device
JPH11504164A (ja) チップカバー
EP0890956B1 (en) Semiconductor device having a security circuit for preventing illegal access