CN121710909A - 半导体装置 - Google Patents

半导体装置

Info

Publication number
CN121710909A
CN121710909A CN202511590094.7A CN202511590094A CN121710909A CN 121710909 A CN121710909 A CN 121710909A CN 202511590094 A CN202511590094 A CN 202511590094A CN 121710909 A CN121710909 A CN 121710909A
Authority
CN
China
Prior art keywords
transistor
gate
oxide
insulator
electrically connected
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202511590094.7A
Other languages
English (en)
Chinese (zh)
Inventor
石津贵彦
米田诚一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Publication of CN121710909A publication Critical patent/CN121710909A/zh
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003Modifications for increasing the reliability for protection
    • H03K19/00315Modifications for increasing the reliability for protection in field-effect transistor circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/017Modifications for accelerating switching in field-effect transistor circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09403Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using junction field-effect transistors
    • H03K19/0941Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using junction field-effect transistors of complementary type
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/674Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/875Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being semiconductor metal oxide, e.g. InGaZnO
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • H10D86/021Manufacture or treatment of multiple TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441Interconnections, e.g. scanning lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Manufacturing & Machinery (AREA)
CN202511590094.7A 2018-04-20 2019-04-08 半导体装置 Pending CN121710909A (zh)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
JP2018081075 2018-04-20
JP2018-081075 2018-04-20
JP2018085916 2018-04-27
JP2018-085916 2018-04-27
CN201980026896.1A CN111989865B (zh) 2018-04-20 2019-04-08 半导体装置
PCT/IB2019/052859 WO2019202431A1 (ja) 2018-04-20 2019-04-08 半導体装置

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
CN201980026896.1A Division CN111989865B (zh) 2018-04-20 2019-04-08 半导体装置

Publications (1)

Publication Number Publication Date
CN121710909A true CN121710909A (zh) 2026-03-20

Family

ID=68238806

Family Applications (2)

Application Number Title Priority Date Filing Date
CN202511590094.7A Pending CN121710909A (zh) 2018-04-20 2019-04-08 半导体装置
CN201980026896.1A Active CN111989865B (zh) 2018-04-20 2019-04-08 半导体装置

Family Applications After (1)

Application Number Title Priority Date Filing Date
CN201980026896.1A Active CN111989865B (zh) 2018-04-20 2019-04-08 半导体装置

Country Status (5)

Country Link
US (3) US11935899B2 (https=)
JP (4) JP7359754B2 (https=)
KR (2) KR102658082B1 (https=)
CN (2) CN121710909A (https=)
WO (1) WO2019202431A1 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7554673B2 (ja) 2018-12-20 2024-09-20 株式会社半導体エネルギー研究所 半導体装置
JP7564092B2 (ja) 2019-03-29 2024-10-08 株式会社半導体エネルギー研究所 半導体装置
JPWO2021181192A1 (https=) * 2020-03-13 2021-09-16
US11616054B2 (en) * 2020-05-08 2023-03-28 Taiwan Semiconductor Manufacturing Co., Ltd. Gate structure for semiconductor devices

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4647798A (en) * 1985-04-15 1987-03-03 Ncr Corporation Negative input voltage CMOS circuit
DE19622646B4 (de) 1995-06-06 2005-03-03 Kabushiki Kaisha Toshiba, Kawasaki Integrierte Halbleiterschaltungsvorrichtung
JP3195203B2 (ja) * 1995-06-06 2001-08-06 株式会社東芝 半導体集積回路
JP3547906B2 (ja) * 1996-06-18 2004-07-28 株式会社東芝 半導体集積回路装置
JP3400294B2 (ja) * 1997-04-25 2003-04-28 富士通株式会社 プル・アップ回路及び半導体装置
JP2001036388A (ja) * 1999-07-16 2001-02-09 Sharp Corp レベルシフト回路および半導体装置
JP3865689B2 (ja) * 2002-01-15 2007-01-10 松下電器産業株式会社 レベルシフト回路
JP3800520B2 (ja) * 2002-02-22 2006-07-26 株式会社ルネサステクノロジ 半導体集積回路装置と半導体装置
US6960953B2 (en) 2003-05-02 2005-11-01 Matsushita Electric Industrial Co., Ltd. Semiconductor circuit device
JP2004354970A (ja) * 2003-05-02 2004-12-16 Matsushita Electric Ind Co Ltd 半導体回路装置
KR101711236B1 (ko) 2009-10-09 2017-02-28 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
WO2011155295A1 (en) 2010-06-10 2011-12-15 Semiconductor Energy Laboratory Co., Ltd. Dc/dc converter, power supply circuit, and semiconductor device
US9024317B2 (en) 2010-12-24 2015-05-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor circuit, method for driving the same, storage device, register circuit, display device, and electronic device
TWI557739B (zh) * 2011-05-20 2016-11-11 半導體能源研究所股份有限公司 半導體積體電路
JP6099336B2 (ja) 2011-09-14 2017-03-22 株式会社半導体エネルギー研究所 発光装置
JP5832399B2 (ja) 2011-09-16 2015-12-16 株式会社半導体エネルギー研究所 発光装置
TWI654613B (zh) 2014-02-21 2019-03-21 日商半導體能源研究所股份有限公司 半導體裝置及電子裝置
JP2015177347A (ja) * 2014-03-14 2015-10-05 株式会社東芝 レベルシフト回路
US10032921B2 (en) * 2015-07-31 2018-07-24 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device, display module, and electronic device
JP6906978B2 (ja) * 2016-02-25 2021-07-21 株式会社半導体エネルギー研究所 半導体装置、半導体ウェハ、および電子機器
JP7337561B2 (ja) * 2019-06-25 2023-09-04 ローム株式会社 アナログスイッチ回路、ボリウム回路、半導体集積回路
JP7578594B2 (ja) * 2019-07-05 2024-11-06 株式会社半導体エネルギー研究所 半導体装置、蓄電装置および半導体装置の動作方法
JPWO2021181192A1 (https=) * 2020-03-13 2021-09-16

Also Published As

Publication number Publication date
US11935899B2 (en) 2024-03-19
US20240355833A1 (en) 2024-10-24
US20210167095A1 (en) 2021-06-03
US12336291B2 (en) 2025-06-17
CN111989865A (zh) 2020-11-24
KR20210002557A (ko) 2021-01-08
JPWO2019202431A1 (ja) 2021-05-20
JP2023175881A (ja) 2023-12-12
CN111989865B (zh) 2025-11-28
KR20230165391A (ko) 2023-12-05
JP7359754B2 (ja) 2023-10-11
KR102609662B1 (ko) 2023-12-06
WO2019202431A1 (ja) 2019-10-24
US20250280603A1 (en) 2025-09-04
JP7747846B2 (ja) 2025-10-01
KR102658082B1 (ko) 2024-04-18
JP2025186405A (ja) 2025-12-23
JP7570483B2 (ja) 2024-10-21
JP2025004164A (ja) 2025-01-14

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