CN116911235A - 一种过采样自举开关隔离驱动采样保持电路 - Google Patents
一种过采样自举开关隔离驱动采样保持电路 Download PDFInfo
- Publication number
- CN116911235A CN116911235A CN202311176930.8A CN202311176930A CN116911235A CN 116911235 A CN116911235 A CN 116911235A CN 202311176930 A CN202311176930 A CN 202311176930A CN 116911235 A CN116911235 A CN 116911235A
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- CN
- China
- Prior art keywords
- type mos
- mos tube
- drain
- gate
- sampling
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000002955 isolation Methods 0.000 title claims abstract description 11
- 238000005070 sampling Methods 0.000 title abstract description 29
- 239000003990 capacitor Substances 0.000 claims description 18
- 238000000034 method Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/36—Circuit design at the analogue level
- G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
- H03M1/1245—Details of sampling arrangements or methods
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/38—Analogue value compared with reference values sequentially only, e.g. successive approximation type
- H03M1/46—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter
- H03M1/466—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter using switched capacitors
- H03M1/468—Analogue value compared with reference values sequentially only, e.g. successive approximation type with digital/analogue converter for supplying reference values to converter using switched capacitors in which the input S/H circuit is merged with the feedback DAC array
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Geometry (AREA)
- Evolutionary Computation (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- Electronic Switches (AREA)
Abstract
Description
类型 | 沟道宽度/沟道长度 | 并联数量 | 其它 | |
M1 | NMOS | 3.5um/0.6um | 1 | 深N-WELL器件 |
M2 | NMOS | 3.5um/0.6um | 2 | 深N-WELL器件 |
M3 | NMOS | 3.5um/0.6um | 1 | 深N-WELL器件 |
M4 | PMOS | 3.5um/0.6um | 3 | |
M5 | PMOS | 3.5um/0.6um | 1 | |
M6 | NMOS | 1.6um/0.6um | 1 | 深N-WELL器件 |
M7 | NMOS | 3.5um/0.6um | 1 | 深N-WELL器件 |
M8 | NMOS | 3.5um/0.6um | 1 | 深N-WELL器件 |
M9 | NMOS | 3.5um/0.6um | 2 | 深N-WELL器件 |
M10 | NMOS | 5.2um/0.6um | 3 | 深N-WELL器件 |
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202311176930.8A CN116911235B (zh) | 2023-09-13 | 2023-09-13 | 一种过采样自举开关隔离驱动采样保持电路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202311176930.8A CN116911235B (zh) | 2023-09-13 | 2023-09-13 | 一种过采样自举开关隔离驱动采样保持电路 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN116911235A true CN116911235A (zh) | 2023-10-20 |
CN116911235B CN116911235B (zh) | 2023-12-22 |
Family
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CN202311176930.8A Active CN116911235B (zh) | 2023-09-13 | 2023-09-13 | 一种过采样自举开关隔离驱动采样保持电路 |
Country Status (1)
Country | Link |
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CN (1) | CN116911235B (zh) |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5833364A (ja) * | 1981-08-21 | 1983-02-26 | Matsushita Electric Ind Co Ltd | 垂直同期信号分離回路 |
JPH06152270A (ja) * | 1992-11-10 | 1994-05-31 | Fujitsu Ten Ltd | スイッチング増幅回路 |
CN102832919A (zh) * | 2012-09-13 | 2012-12-19 | 中国科学院半导体研究所 | 栅压自举开关电路 |
US20150188533A1 (en) * | 2013-12-26 | 2015-07-02 | Texas Instruments Incorporated | Bootstrapped Sampling Switch Circuits and Systems |
WO2016206123A1 (zh) * | 2015-06-24 | 2016-12-29 | 中国电子科技集团公司第二十四研究所 | 一种cmos主从式采样保持电路 |
CN107276589A (zh) * | 2017-05-11 | 2017-10-20 | 成都华微电子科技有限公司 | 冷备份系统高阻态高线性采样保持电路 |
EP3806334A1 (en) * | 2019-10-07 | 2021-04-14 | IniVation AG | Switched capacitor circuit |
-
2023
- 2023-09-13 CN CN202311176930.8A patent/CN116911235B/zh active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5833364A (ja) * | 1981-08-21 | 1983-02-26 | Matsushita Electric Ind Co Ltd | 垂直同期信号分離回路 |
JPH06152270A (ja) * | 1992-11-10 | 1994-05-31 | Fujitsu Ten Ltd | スイッチング増幅回路 |
CN102832919A (zh) * | 2012-09-13 | 2012-12-19 | 中国科学院半导体研究所 | 栅压自举开关电路 |
US20150188533A1 (en) * | 2013-12-26 | 2015-07-02 | Texas Instruments Incorporated | Bootstrapped Sampling Switch Circuits and Systems |
WO2016206123A1 (zh) * | 2015-06-24 | 2016-12-29 | 中国电子科技集团公司第二十四研究所 | 一种cmos主从式采样保持电路 |
CN107276589A (zh) * | 2017-05-11 | 2017-10-20 | 成都华微电子科技有限公司 | 冷备份系统高阻态高线性采样保持电路 |
EP3806334A1 (en) * | 2019-10-07 | 2021-04-14 | IniVation AG | Switched capacitor circuit |
Non-Patent Citations (3)
Title |
---|
RONAK TRIVEDI: "Low Power and High Speed Sample-and-Hold Circuit", 2006 49TH IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, pages 453 - 456 * |
白晓东等: "相位可调射频有源移相器设计", 北京工业大学学报, vol. 27, no. 3, pages 287 - 289 * |
郭金峰: "一种低功耗高速高精度Pipelined ADC设计", 中国优秀硕士学位论文全文数据库信息科技辑, no. 8, pages 135 - 200 * |
Also Published As
Publication number | Publication date |
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CN116911235B (zh) | 2023-12-22 |
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Inventor after: He Tao Inventor after: Li Ping Inventor after: Li Zehong Inventor after: Li Dagang Inventor after: Zhai Yahong Inventor after: Yang Shaopeng Inventor before: Li Dagang Inventor before: Li Zehong Inventor before: Li Ping Inventor before: Zhai Yahong Inventor before: He Tao Inventor before: Yang Shaopeng |
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