CN116741628A - 一种SiC MOSFET器件低碳团簇栅氧的制造方法 - Google Patents

一种SiC MOSFET器件低碳团簇栅氧的制造方法 Download PDF

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CN116741628A
CN116741628A CN202310792638.2A CN202310792638A CN116741628A CN 116741628 A CN116741628 A CN 116741628A CN 202310792638 A CN202310792638 A CN 202310792638A CN 116741628 A CN116741628 A CN 116741628A
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gate oxide
sic
epitaxial layer
mosfet device
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郑英豪
李旻姝
余恒文
马利奇
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Zhejiang Cuijin Semiconductor Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608Silicon carbide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66053Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
    • H01L29/66068Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate

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Abstract

本发明属于半导体技术领域,公开了一种SiCMOSFET器件低碳团簇栅氧的制造方法,包括以下步骤:SiC衬底上沉积SiC外延层;SiC外延层进行离子注入并进行高温退火;SiC外延层生长Si外延层;Si外延层上利用低温热氧化法生长栅氧SiO2层;栅氧SiO2层上进行栅氧多晶硅沉积;沉积的栅氧多晶硅进行栅氧图形光刻;栅氧多晶硅刻蚀和栅氧刻蚀;本发明既能够抑制在SiCMOSFET器件中栅氧SiO2与SiC外延层界面碳团簇劣质结构的形成又能改善开启电压(Vth)稳定性和提高器件的可靠性。

Description

一种SiC MOSFET器件低碳团簇栅氧的制造方法
技术领域
本发明属于半导体技术领域,具体涉及一种SiC MOSFET器件低碳团簇栅氧的制造方法。
背景技术
碳化硅(SiC)MOSFET器件凭借着开关速度快、泄漏源电流低和功率密度高等一系列优点,被广发应用于新能源汽车和国防军工等高温高压大功率的工作领域中。
但是它的场效应迁移率仅为10-80cm2/V*s,比其霍尔迁移率低100倍。这是因为存在的SiO2的放热会导致SiC中的Si优先氧化,选择性氧化会将碳沉淀并在SiO2中形成碳团簇(C-cluster),这样会使得生长的氧化膜的均匀性和膜质变差,导致降低器件的开启电压(Vth)的稳定性和可靠性。
从氧化动力学角度考虑界面的化学势发现,界面的动态平衡性(dynamicequilibrium)限制了碳团簇形成需要的很高的碳化学势,从而导致了即使在很低的碳化学势下,界面C-cluster就会形成。
SiC/SiO2界面存在的大量的碳团簇的结构会使得器件的场效应迁移率受到大幅度影响,进而会影响器件在正常工作下的导通电阻增大,进而降低器件的可靠性。(内部光电发射光谱仪观察可知,SiC/SiO2界面态密度为10E12~10E13 cm-2*eV-1比典型的Si/SiO2界面的10E10 cm-2*eV-1高出两至三个数量级以上。),
针对在栅氧中存在碳团簇劣质结构的解决方案,有专利CN1157197.05A提出在SIC外延层上使用LPCVD的方法在温度为600℃的条件下沉积一层厚度的多晶硅(Poly-si),再在多晶硅(Poly-si)上利用热氧化法在800℃的条件下生长一层栅氧。虽然这种方法能够抑制SIC MOSFET器件栅氧中碳团簇劣质结构的形成,但是,从AppliedPhysicsLetters 66,2206(1995);doi:10.1063/1.113948期刊上得知,在多晶硅上利用热氧化法生长的栅氧的致密性和均匀性不好。原因是在多晶硅表面的硅运动的同时,伴随着氧化,硅在晶界和中晶区域被吸收,这样最终的结果是在先前的晶界处于硅耗尽,形成的二氧化硅比我们需求的更薄,而在接收多余硅原子的中晶区域形成更厚的氧化物。这样导致最终的栅氧的厚度不一,进而影响栅氧薄膜的质量,那么SIC MOSFET器件的开启电压(Vth)的稳定性和栅氧的可靠性依旧没有解决。
因此,我们发明了一种既能抑制SIC MOSFET器件栅氧中碳团簇劣质结构的形成,又能改善SIC MOSFET器件的开启电压的稳定性以及器件的可靠性。
发明内容
针对现有技术的不足,本发明公开了一种SiC MOSFET器件低碳团簇栅氧的制造方法,既能够抑制在SiC MOSFET器件中栅氧SiO2与SiC外延层界面碳团簇劣质结构的形成,又能改善开启电压(Vth)稳定性和提高器件的可靠性。
为实现以上目的,本发明通过以下技术方案予以实现:一种SiC MOSFET器件低碳团簇栅氧的制造方法,包括以下步骤:
SiC衬底上沉积SiC外延层;
SiC外延层进行离子注入并进行高温退火;
SiC外延层生长Si外延层;
Si外延层上利用低温热氧化法生长栅氧SiO2层;
栅氧SiO2层上进行栅氧多晶硅沉积;
沉积的栅氧多晶硅进行栅氧图形光刻;
栅氧多晶硅刻蚀和栅氧刻蚀;
在上述技术方案的基础上,本发明还提供以下可选技术方案:
进一步的技术方案:所述低温氧化的温度区间为500℃至750℃。
进一步的技术方案:在SiC衬底上沉积SiC外延层的方法为CVD法。
上述SiC MOSFET器件低碳团簇栅氧的制造方法获得的SiC MOSFET器件。
上述SiC MOSFET器件低碳团簇栅氧的制造方法在制备SiC MOSFET器件中的应用。
有益效果
本发明提供了一种SiC MOSFET器件低碳团簇栅氧的制造方法,与现有技术相比具备以下有益效果:
通过在SiC外延层上完成离子注入与高温退火后,再利用500℃~750℃的低温条件生长一层Si外延层,然后生长栅氧化层,替代利用SiC生长栅氧化层的方式,实现抑制SiC/SiO2界面的碳团簇结构的形成、降低应用该方法制备SiC MOSFET器件的导通电阻、提高SiC MOSFET器件可靠性的技术效果。
附图说明
图1为本发明各步骤的结构示意图。
图2为本发明流程图。
图3为本发明技术结构图。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白,以下结合附图及实施例,对本发明进行进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其它实施例,都属于本发明保护的范围。
在本发明的描述中,需要理解的是,术语“开孔”、“上”、“下”、“厚度”、“顶”、“中”、“长度”、“内”、“四周”等指示方位或位置关系,仅是为了便于描述本发明和简化描述,而不是指示或暗示所指的组件或元件必须具有特定的方位,以特定的方位构造和操作,因此不能理解为对本发明的限制。
以下结合具体实施例对本发明的具体实现进行详细描述。
请参阅图1~3,为本发明一种实施例提供的,一种SiC MOSFET器件低碳团簇栅氧的制造方法,包括以下步骤:
S1、SiC衬底上用CVD方法(化学气象沉积法)沉积SiC外延层;
S2、SiC外延层进行离子注入并进行高温退火;
S3、SiC外延层生长Si外延层;
S4、Si外延层上利用低温热氧化法生长栅氧SiO2层;
S5、栅氧SiO2层进行栅氧多晶硅沉积;
S6、沉积的栅氧多晶硅进行栅氧图形光刻;
S7、进行栅氧多晶硅刻蚀和栅氧刻蚀。
具体地,所述低温氧化的温度区间为500℃至750℃。由于SiC氧化温度高(1600℃~1800℃),在低温(500℃~750℃)SiC与O2的反应被抑制。
在本发明实施例中,通过在SiC外延层上完成离子注入与高温退火后,再利用低温条件(500℃~750℃)生长一层Si外延层然后生长栅氧SiO2层,替代利用SiC直接生长栅氧化层的方式,实现抑制SiC/SiO2界面的碳团簇结构的形成、降低器件的导通电阻、提高器件栅氧可靠性的技术效果。
具体地,所述S7中的刻蚀方法包括光刻、干法刻蚀以及化学刻蚀。
上述SiC MOSFET器件低碳团簇栅氧的制造方法在SiC MOSFET器件制造中的应用。
上述SiC MOSFET器件低碳团簇栅氧的制造方法获得的SiC MOSFET器件。
需要说明的是,在本文中,诸如A和B等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来,而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且,术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性地包含,从而使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素,而且还包括没有明确列出的其他要素,或者是还包括为这种过程、方法、物品或者设备所固有的要素。
尽管已经示出和描述了本发明的实施例,对于本领域的普通技术人员而言,可以理解在不脱离本发明的原理和精神的情况下可以对这些实施例进行多种变化、修改、替换和变型,本发明的范围由所附权利要求及其等同物限定。

Claims (5)

1.一种SiC MOSFET器件低碳团簇栅氧的制造方法,其特征在于,包括以下步骤:
SiC衬底上沉积SiC外延层;
SiC外延层进行离子注入并进行高温退火;
SiC外延层生长Si外延层;
Si外延层上利用低温热氧化法生长栅氧SiO2层;
栅氧SiO2层上进行栅氧多晶硅沉积;
沉积的栅氧多晶硅进行栅氧图形光刻;
栅氧多晶硅刻蚀和栅氧刻蚀。
2.根据权利要求1所述的SiC MOSFET器件低碳团簇栅氧的制造方法,其特征在于,所述的低温氧化的温度区间为500℃至750℃。
3.根据权利要求1所述的SiC MOSFET器件低碳团簇栅氧的制造方法,其特征在于,在SiC衬底上沉积SiC外延层的方法为CVD法。
4.权利要求1-3任一所述的SiC MOSFET器件低碳团簇栅氧的制造方法获得的SiCMOSFET器件。
5.权利要求1-3任一所述的SiC MOSFET器件低碳团簇栅氧的制造方法在制备的SiCMOSFET器件中的应用。
CN202310792638.2A 2023-06-30 2023-06-30 一种SiC MOSFET器件低碳团簇栅氧的制造方法 Pending CN116741628A (zh)

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