CN111430228B - 一种超高介电常数介质薄膜的制备方法 - Google Patents
一种超高介电常数介质薄膜的制备方法 Download PDFInfo
- Publication number
- CN111430228B CN111430228B CN202010339064.XA CN202010339064A CN111430228B CN 111430228 B CN111430228 B CN 111430228B CN 202010339064 A CN202010339064 A CN 202010339064A CN 111430228 B CN111430228 B CN 111430228B
- Authority
- CN
- China
- Prior art keywords
- film
- substrate
- dielectric constant
- hfxo
- dielectric
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000002360 preparation method Methods 0.000 title claims abstract description 12
- 239000000758 substrate Substances 0.000 claims abstract description 42
- 238000000034 method Methods 0.000 claims abstract description 35
- 239000004065 semiconductor Substances 0.000 claims abstract description 13
- 238000000137 annealing Methods 0.000 claims abstract description 12
- 238000000151 deposition Methods 0.000 claims abstract description 10
- 230000008569 process Effects 0.000 claims abstract description 10
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 10
- 238000000231 atomic layer deposition Methods 0.000 claims abstract description 7
- 238000004140 cleaning Methods 0.000 claims abstract description 6
- 229910052698 phosphorus Inorganic materials 0.000 claims abstract description 5
- RKTYLMNFRDHKIL-UHFFFAOYSA-N copper;5,10,15,20-tetraphenylporphyrin-22,24-diide Chemical compound [Cu+2].C1=CC(C(=C2C=CC([N-]2)=C(C=2C=CC=CC=2)C=2C=CC(N=2)=C(C=2C=CC=CC=2)C2=CC=C3[N-]2)C=2C=CC=CC=2)=NC1=C3C1=CC=CC=C1 RKTYLMNFRDHKIL-UHFFFAOYSA-N 0.000 claims description 13
- 239000002243 precursor Substances 0.000 claims description 13
- 238000006243 chemical reaction Methods 0.000 claims description 11
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 3
- 239000012299 nitrogen atmosphere Substances 0.000 claims description 3
- 239000010453 quartz Substances 0.000 claims description 2
- 150000003839 salts Chemical class 0.000 claims description 2
- 229910052594 sapphire Inorganic materials 0.000 claims description 2
- 239000010980 sapphire Substances 0.000 claims description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 2
- 238000005516 engineering process Methods 0.000 abstract description 6
- 239000010408 film Substances 0.000 description 36
- 239000000463 material Substances 0.000 description 14
- 239000003989 dielectric material Substances 0.000 description 8
- 230000000694 effects Effects 0.000 description 7
- 239000013078 crystal Substances 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 4
- 239000007789 gas Substances 0.000 description 4
- 150000002500 ions Chemical class 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000010409 thin film Substances 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910044991 metal oxide Inorganic materials 0.000 description 3
- 150000004706 metal oxides Chemical class 0.000 description 3
- 238000004377 microelectronic Methods 0.000 description 3
- 238000004904 shortening Methods 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 238000001755 magnetron sputter deposition Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000007800 oxidant agent Substances 0.000 description 2
- 238000001953 recrystallisation Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 230000005641 tunneling Effects 0.000 description 2
- 229910021193 La 2 O 3 Inorganic materials 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 238000007664 blowing Methods 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000002784 hot electron Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 239000011259 mixed solution Substances 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000005036 potential barrier Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 229910001404 rare earth metal oxide Inorganic materials 0.000 description 1
- 239000000376 reactant Substances 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
- C23C16/405—Oxides of refractory metals or yttrium
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/56—After-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Materials Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Organic Chemistry (AREA)
- Metallurgy (AREA)
- Mechanical Engineering (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Inorganic Chemistry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Plasma & Fusion (AREA)
- Formation Of Insulating Films (AREA)
Abstract
本发明介绍了一种超高介电常数介质薄膜的制备方法，包括以下步骤：(1)提供一衬底并清洗，作为介质薄膜沉积的基底；(2)采用等离子体增强原子层沉积的方法在所述衬底上制备HfXO薄膜，其中X为Si,Ge,P,Al或Ti，X在HfXO中掺杂的原子数占比为5～15％；(3)对所述的HfXO薄膜进行高温快速退火处理。通过形成具有超高介电常数的晶相结构，实现超高介电常数介质薄膜的制备。本发明制备方法，能够制备低等效栅氧厚度、超高介电常数、宽能隙、高可靠性的介质薄膜，为当前随摩尔定律快速发展的半导体工艺技术中栅氧介质的选择提供了一条可行路径。
Description
技术领域
本发明属于微电子与固体电子学技术领域，具体涉及一种超高介电常数介质薄膜的制备方法。
背景技术
半导体集成度的提高要求微电子器件特征尺寸不断缩小，传统的半导体沟道材料和介质绝缘材料面临物理极限。另外，随着云计算、大数据、绿色能源时代的到来，人类对于高速、高功率密度、以及更高能效电源转换系统的需求与日俱增。半导体技术无论是延续摩尔定律还是超越摩尔定律发展，新材料、新器件、新工艺的研究是不可或缺的。
对于MOSFET器件而言，其驱动电流是一个非常重要的影响参量，它决定着器件的开/关状态，高的驱动电流意味着快的开关速度。要增大器件的驱动电流，可以采用的方法一，使用高载流子迁移率的沟道材料；方法二，缩小栅介质的物理厚度tox，而当栅介质厚度已经减小至物理极限时，只能通过提高材料的介电常数k来增大驱动电流。另一方面，如今随着栅介质厚度的不断减小，由量子隧穿效应引起的漏电流会急剧增加。当SiO2氧化层的厚度减小到3nm时，栅极泄漏电流的主要机制已经是直接隧穿，栅漏电急剧增加，会导致器件功耗达到不可接受的程度。另外，对于MOSFET器件，栅极泄漏电流加剧是由于随着沟道长度不断缩短，会引起短沟道效应、漏端引入的势垒降低效应、热电子效应等器件物理效应造成的。因此，无论从器件缩小还是漏电流增大的角度来说，采用高介电常数(高k)材料来代替传统的SiO2作为栅介质材料都是不可避免的。
高k材料作为栅介质需要具有较高的介电常数，与衬底有较好的稳定性，大的禁带宽度和与衬底之间具有较大的导带/价带间的势垒，与衬底间界面有小的界面态密度，良好的薄膜形态，与传统微电子工业所用的其他材料和制程工艺兼容等等。HfO2一直是最热门的高k材料，它的介电常数高(k～25)，禁带宽度大(6.0eV)，与Si衬底间的势垒高度达，并且与Si衬底之间的热力学稳定性很好，1000℃时都不会发生反应。但是HfO2作为栅介质时存在一些缺点，如：再结晶温度低，仅有500℃左右，而后续的热处理过程中，它易转变为多晶态而导致性能恶化；低温下为非晶态，介电常数较小；高介电常数的四方相和立方相生成温度高(～1700℃)不易实现等等。对于10nm技术节点以后的半导体工艺，等效栅氧厚度(EOT)要小于0.6nm，而高k介质的EOT通常由于界面层的影响随着厚度的不断减薄而趋于饱和，HfO2薄膜厚度降到3nm以后，其EOT趋于饱和。为此，寻求更低泄漏电流密度、更低等效栅氧厚度、更高介电常数及可靠性的介质薄膜对集成电路产业的发展至关重要。
传统的高k介质方案主要有：1)ⅢA族金属氧化物。如Al2O3的禁带宽度～8.9eV，具有很好的热稳定性，介电常数～9。2)ⅣB族金属氧化物。如HfO2的介电常数～25，禁带宽度～6.0eV，与Si衬底之间的热力学稳定性很好。3)稀土氧化物。如La2O3，Gd2O3等，普遍介电常数在20～30。4)复合氧化物。如HfLaO，LaAlO等，他们兼有两种金属氧化物的优势，但介电常数通常在10～30。对于10nm技术节点以后的半导体工艺，等效栅氧厚度(EOT)要小于0.6nm，在保证较小泄漏电流的情况下通常要求介电常数>30，而高k介质的EOT通常由于界面层的影响随着厚度的不断减薄而趋于饱和。为此，寻求更高介电常数及可靠性的介质薄膜对集成电路产业的发展至关重要。
专利CN101924030A公开了一种改善高阻SOI衬底上高介电常数栅介质性能的方法，然而该方法是一种改善的高k介质钝化方法，其目标是改善高k介质/半导体界面特性，通过生长1nm的Al2O3缓冲层来抑制高k介质与衬底之间的元素相互扩散。通过该方法制备的高k介质介电常数为10～25，不能满足10nm及以后技术节点工艺需要。而本申请针对的是高k介质材料本身，通过元素掺杂结合高温退火的途径产生超高介电常数晶相，实现超高介电常数介质薄膜的制备，本方法生长制备的介质薄膜介电常数可达～70。
发明内容
本发明的目的就是为了解决上述问题而提供一种超高介电常数介质薄膜的制备方法，能够制备低泄漏电流密度、低等效栅氧厚度、超高介电常数、高可靠性的介质薄膜，为当前随摩尔定律快速发展的半导体工艺技术中栅氧介质的选择提供了一条可行路径。
本发明的目的通过以下技术方案实现：
一种超高介电常数介质薄膜的制备方法，包括以下步骤：
(1)提供一衬底并清洗，作为介质薄膜沉积的基底；
(2)采用等离子体增强原子层沉积的方法在所述衬底上制备HfXO薄膜，其中X为Si,Ge,P,Al或Ti，X在HfXO中掺杂的原子数占比为5～15％；
(3)对所述的HfXO薄膜进行高温快速退火处理，即得到超高介电常数介质薄膜。
本发明X类的金属元素具有以下特点：离子半径远小于Hf离子半径
且离子配位数为4，这类的元素掺杂有利于缩短Hf-O的键长，四方相的HfO2与其他相HfO2相比具有最短的Hf-O键长。因而这类掺杂有利于形成四方相的HfO2，而且可以稳固晶相，减少晶格扭曲。而四方相HfO2在各类HfO2晶相中具有最大的介电常数。
X在HfXO中掺杂的原子数占比为5～15％，在此掺杂浓度范围内促进形成四方相HfO2的效果最好。
优选地，步骤(1)所述的衬底为常规半导体或绝缘层衬底；所述半导体衬底选自Si，Ge，GaAs，InP，GaN或SiC；所述绝缘衬底选自SiO2，蓝宝石或石英。
优选地，步骤(2)将所述衬底置于等离子增强原子层沉积的反应腔中，在所述的衬底表面沉积纳米厚度的HfXO薄膜。
优选地，步骤(2)在沉积HfXO薄膜过程中，先进行多次HfO2薄膜的生长，再进行一次XaOb薄膜的生长，通过多次循环后，得到HfXO薄膜。
优选地，步骤(2)沉积HfXO薄膜过程，通过通入Hf前驱体与衬底表面悬挂键结合，再通入O2反应生成HfO2；通过通入X前驱体与O2反应生成XaOb。
优选地，所述Hf前驱体为[(CH3)(C2H5)N]4Hf，所述X前驱体为X的有机盐。
优选地，步骤(3)在氮气气氛中对所述HfXO薄膜进行快速退火处理，退火条件为在400-800℃下进行30-60s，快速退火处理能消除位错及应力，同时促进X元素离子向HfO2晶格中扩散，形成稳定的四方相HfO2，实验测得经过800℃高温退火后其介电常数可达～70。
与现有技术相比，本发明具有以下有益效果：
本发明通过采用等离子体增强原子层沉积的方法在所述衬底上制备HfXO薄膜，X在HfXO中掺杂的原子数占比为5～15％，促进形成四方相HfO2。X掺杂元素为Si,Ge,P,Al或Ti等，离子半径远小于Hf离子半径
且离子配位数为4，有利于缩短Hf-O的键长。四方相的HfO2与其他相HfO2相比具有最短的Hf-O键长，因而这类掺杂有利于形成四方相的HfO2，而且可以稳固晶相，减少晶格扭曲，介电常数可达～70。通过此方法制备得到低等效栅氧厚度、超高介电常数、宽能隙、高可靠性的介质薄膜，为当前随摩尔定律快速发展的半导体工艺技术中栅氧介质的选择提供了一条可行路径。
附图说明
图1为超高介电常数介质薄膜的制备方法流程图；
图2为HfXO薄膜中形成超高介电常数四方相结构；
图3为HfXO薄膜的超高介电常数；
图4为现有高k材料介电常数与能隙宽度的分布。
具体实施方式
下面结合附图对本发明提供的一种超高介电常数介质薄膜的制备方法的具体实施方式做详细说明。图1为其主要步骤，具体如下：
选择一衬底，在此选择最常见的Si片衬底为例说明。在本实施例中，先采用体积比为1∶1∶5的NH3·H2O、H2O2、H2O混合溶液清洗所述Si衬底，清洗时间为10min，然后采用体积比为1％的HF水溶液清洗所述Si衬底，清洗时间为30s；最后采用体积比为1∶1∶6的HCl、H2O2、H2O溶液清洗所述Si衬底，清洗时间为10min。
进一步将清洗完的衬底基片置于等离子增强原子层沉积PEALD的反应腔中，在所述的衬底表面沉积纳米厚度的HfXO薄膜(X为Si,Ge,P,Al,Ti等元素)。
在本施例中，我们以Al为代表进行说明，用[(CH3)(C2H5)N]4Hf(TEMAH)作为Hf前驱体，Al(CH3)3(TMA)作为Al前驱体，O2等离子体作为氧化剂。薄膜生长前将PEALD腔体温度加热到200℃，Hf源加热到80℃，RF功率保持为150W。采用Ar气作为载气，通入Hf金属前驱体并在腔体内与衬底表面悬挂键结合，利用Ar吹去未反应的残余气体后，再通入O2等离子体反应生成HfO2，最后再利用Ar气吹走未完全反应的反应物；同样的方法可以沉积一个循环XaOb。
在所述的PEALD沉积HfXO薄膜过程中，调节反应过程中Hf前驱体、X前驱体以及氧化剂的循环数。通常先多个HfO2的生长循环，再进行一次XaOb的生长循环，即生长薄膜可表示为(HfO2)n(XaOb)，实验可进行多组(如n可以取值5～20)，使得最终HfXO薄膜里X的掺杂浓度控制在5～15％，以达到促进形成四方相HfO2的效果最好的目的。
最后利用快速退火炉对薄膜进行沉积后退火，在氮气气氛中对所生长的HfXO薄膜进行快速退火处理，退火条件为N2 800℃30s。消除位错及应力，同时促进X元素离子向HfO2晶格中扩散，形成稳定的四方相HfO2。如图2所示为800℃退火后形成四方相HfXO的XRD谱图。
为测试薄膜的介电常数，制备Pt/HfXO/Si MOS电容结构进行测试。阳极电极制备时用孔径为100μm的掩膜板作掩膜，利用磁控溅射方法溅射100nm Pt金属作为阳极电极；阴极电极制作无需掩膜，直接利用磁控溅射方法溅射50nm Pt金属。最后进行金属沉积后退火，条件为95％N2 5％H2 400℃3min，形成欧姆接触，完成MOS电容结构的制备。如图3所示为测试所述的MOS电容结构中HfXO薄膜的介电常数。
图4为现有高k材料介电常数与能隙宽度的分布，来自论文Kanghoon Yim,YounYong,Joohee Lee,Kyuhyun Lee,Ho-Hyun Nahm,Jiho Yoo,Chanhee Lee,Cheol SeongHwang&Seungwu Han,Novel high-κdielectrics for next-generation electronicdevices screened by automated ab initio calculations,NPG Asia Materialsvolume 7,page190(2015).
可以看出，目前常规方法制备的绝大部分高k介质材料介电常数5～30之间，而理想的高k材料需要有更高的介电常数和大的能隙宽度，本申请提出的一种超高介电常数介质薄膜的制备方法，介电常数可达～70，可以实现超高介电常数、宽能隙、高可靠性的介质薄膜制备。
上述的对实施例的描述是为便于该技术领域的普通技术人员能理解和使用发明。熟悉本领域技术的人员显然可以容易地对这些实施例做出各种修改，并把在此说明的一般原理应用到其他实施例中而不必经过创造性的劳动。因此，本发明不限于上述实施例，本领域技术人员根据本发明的揭示，不脱离本发明范畴所做出的改进和修改都应该在本发明的保护范围之内。
Claims (9)
1.一种超高介电常数介质薄膜的制备方法，其特征在于，包括以下步骤：
（1）提供一衬底并清洗，作为介质薄膜沉积的基底；
（2）采用等离子体增强原子层沉积的方法在所述衬底上制备HfXO薄膜，其中X为Si,Ge, P, Al或Ti，X在HfXO中掺杂的原子数占比为5~15%；
（3）在氮气气氛中对HfXO薄膜进行快速退火处理，退火条件为在800℃下进行30 s，即得到超高介电常数介质薄膜，该介质薄膜包含四方相HfO2，介电常数可达70。
2.根据权利要求1所述的一种超高介电常数介质薄膜的制备方法，其特征在于，步骤（1）所述的衬底为常规半导体或绝缘层衬底。
3.根据权利要求2所述的一种超高介电常数介质薄膜的制备方法，其特征在于，所述半导体衬底选自Si，Ge，GaAs，InP，GaN或SiC。
4.根据权利要求2所述的一种超高介电常数介质薄膜的制备方法，其特征在于，所述绝缘衬底选自SiO2，蓝宝石或石英。
5.根据权利要求1所述的一种超高介电常数介质薄膜的制备方法，其特征在于，步骤（2）将所述衬底置于等离子增强原子层沉积的反应腔中，在所述的衬底表面沉积纳米厚度的HfXO薄膜。
6.根据权利要求1所述的一种超高介电常数介质薄膜的制备方法，其特征在于，步骤（2）在沉积HfXO薄膜过程中，先进行多次HfO2薄膜的生长，再进行一次XaOb薄膜的生长，通过多次循环后，得到HfXO薄膜。
7.根据权利要求6所述的一种超高介电常数介质薄膜的制备方法，其特征在于，生长薄膜表示为(HfO2)n(XaOb)，n取值5~20。
8.根据权利要求6所述的一种超高介电常数介质薄膜的制备方法，其特征在于，步骤（2）沉积HfXO薄膜过程，通过通入Hf前驱体与衬底表面悬挂键结合，再通入O2反应生成HfO2；通过通入X前驱体与O2反应生成XaOb。
9.根据权利要求8所述的一种超高介电常数介质薄膜的制备方法，其特征在于，所述Hf前驱体为[(CH3)(C2H5)N]4Hf，所述X前驱体为X的有机盐。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010339064.XA CN111430228B (zh) | 2020-04-26 | 2020-04-26 | 一种超高介电常数介质薄膜的制备方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010339064.XA CN111430228B (zh) | 2020-04-26 | 2020-04-26 | 一种超高介电常数介质薄膜的制备方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111430228A CN111430228A (zh) | 2020-07-17 |
| CN111430228B true CN111430228B (zh) | 2023-03-28 |
Family
ID=71554602
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010339064.XA Active CN111430228B (zh) | 2020-04-26 | 2020-04-26 | 一种超高介电常数介质薄膜的制备方法 |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111430228B (zh) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113683413B (zh) * | 2021-08-17 | 2022-07-26 | 浙江大学 | 一种毫米波介质陶瓷 |
| CN114836716B (zh) * | 2022-03-23 | 2023-01-24 | 中南大学 | 一种无顶电极夹持HfO2基薄膜材料的制备方法及应用 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101924030A (zh) * | 2010-07-20 | 2010-12-22 | 中国科学院上海微系统与信息技术研究所 | 一种改善高阻soi衬底上高介电常数栅介质性能的方法 |
| CN102664147A (zh) * | 2012-05-14 | 2012-09-12 | 中国科学院上海微系统与信息技术研究所 | 一种在GaAs衬底上制备Hf基高K栅介质薄膜的方法 |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120273861A1 (en) * | 2011-04-29 | 2012-11-01 | Shanghan Institute Of Microsystem And Imformation Technology,Chinese Academ | Method of depositing gate dielectric, method of preparing mis capacitor, and mis capacitor |
| CN103208425B (zh) * | 2013-03-22 | 2015-08-26 | 中国科学院上海微系统与信息技术研究所 | 一种石墨烯调制的高K金属栅Ge基MOS器件的制作方法 |
-
2020
- 2020-04-26 CN CN202010339064.XA patent/CN111430228B/zh active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101924030A (zh) * | 2010-07-20 | 2010-12-22 | 中国科学院上海微系统与信息技术研究所 | 一种改善高阻soi衬底上高介电常数栅介质性能的方法 |
| CN102664147A (zh) * | 2012-05-14 | 2012-09-12 | 中国科学院上海微系统与信息技术研究所 | 一种在GaAs衬底上制备Hf基高K栅介质薄膜的方法 |
Non-Patent Citations (1)
| Title |
|---|
| Properties of HfAlO film deposited by plasma enhanced atomic layer deposition;D.Cao et al.;《Nuclear Instruments and Methods in Physics Research B》;20130129;第307卷;463-467 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111430228A (zh) | 2020-07-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Lee et al. | Thermal stability and electrical characteristics of ultrathin hafnium oxide gate dielectric reoxidized with rapid thermal annealing | |
| Qi et al. | Electrical and reliability characteristics of ZrO 2 deposited directly on Si for gate dielectric application | |
| TWI278918B (en) | High K dielectric film and method for making | |
| JP4492783B2 (ja) | 半導体装置及びその製造方法 | |
| Harris et al. | HfO 2 gate dielectric with 0.5 nm equivalent oxide thickness | |
| JP5203133B2 (ja) | 半導体デバイスの製造方法 | |
| TWI354332B (zh) | ||
| JP2008538655A (ja) | 高性能ＣＭＯＳ用途のためのＨｆドープされた極薄の酸窒化シリコン膜及び製造方法 | |
| US6825538B2 (en) | Semiconductor device using an insulating layer having a seed layer | |
| CN111430228B (zh) | 一种超高介电常数介质薄膜的制备方法 | |
| Droopad et al. | Development of high dielectric constant epitaxial oxides on silicon by molecular beam epitaxy | |
| JP4120938B2 (ja) | 高誘電率絶縁膜を有する半導体装置とその製造方法 | |
| CN110649092A (zh) | 二维材料异质结背栅负电容隧穿晶体管及制备方法 | |
| CN109686667A (zh) | 一种SiC基MOS器件及其制备方法和应用 | |
| US7678633B2 (en) | Method for forming substrates for MOS transistor components and its products | |
| KR20090004309A (ko) | 반도체 소자 및 그 제조방법 | |
| CN107331701A (zh) | 一种金刚石材料沟道导电特性优化方法 | |
| JP4757579B2 (ja) | 絶縁ゲート型半導体装置及びその製造方法 | |
| CN106531622A (zh) | 一种砷化镓基mosfet栅介质的制备方法 | |
| KR100379621B1 (ko) | Ｍｏｓ 트랜지스터 게이트 절연막 및 그 제조방법 | |
| KR100621542B1 (ko) | 미세 전자 소자의 다층 유전체막 및 그 제조 방법 | |
| Migita et al. | Structural metastability and size scalability of phase-controlled HfO2 formed through cap-PDA | |
| US7528434B2 (en) | Production process for a semiconductor component with a praseodymium oxide dielectric | |
| JP3963446B2 (ja) | 半導体装置及びその製造方法 | |
| TW201840889A (zh) | 用於半導體表面之氣相鈍化的系統及方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |