CN116598322A - 基于绝缘衬底上硅-二维材料异质集成光电探测器及其制备方法 - Google Patents
基于绝缘衬底上硅-二维材料异质集成光电探测器及其制备方法 Download PDFInfo
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Abstract
本发明属于半导体器件技术领域，具体为基于绝缘衬底上硅‑二维材料异质集成光电探测器及其制备方法。本发明光电探测器由基于绝缘层上硅的场效应晶体管A和基于二维薄膜材料的场效应晶体管B组合而成；晶体管A与晶体管B物理位置呈纵向垂直分布；晶体管A中的栅极与晶体管B中的漏极之间连通；晶体管B用作光探测，产生电信号通过二维二极管与晶体管A构成的高增益输出；探测过程使晶体管A阈值电压下降，沟道区电导增加，导致漏极电流的显著提升，实现一步光电探测。本发明将沟道材料从硅替换为二维材料实现量子效率的大幅提高，并具有泄漏电流低、寄生电容小，背栅电压调节等优势，此外可同时实现探测和放大信号功能，大大简化探测系统复杂度。
Description
技术领域
本发明属于半导体器件技术领域，具体涉及光电探测器及其制备方法。
背景技术
光电探测器因其独特的工作机理和电学性能引发了广泛的研究，并且其相关研究成果已大量应用于光通信，光谱分析，生物医疗探测等领域。传统的半导体光电探测器是建立在通用的体硅衬底上或者在绝缘层上硅衬底上，当施加反偏电压时，光照入射产生大量电子-空穴对，载流子在耗尽区的外加电场作用下分离，形成光电流，从而实现光信号对电信号的转换。这种探测器虽然本身结构简单，但量子效率很低，并且形成的电信号十分微弱需要外接电路进行放大处理增加了系统复杂性。为了更好实现对入射光的吸收，可通过在绝缘层上硅(SOI)上建立光电探测器来实现，绝缘层上硅是一类结构特殊的半导体衬底，通过在硅中间层中引入埋氧化层将上层硅与底部硅衬底物理隔离，从而拥有如降低泄漏电流，减小寄生电容，抗辐照和灵活的背栅电压调节等优势。SOI器件在低功耗，射频，高速和抗辐射系统中具有很大的吸引力。
此外，二维纳米材料也因其具有原子层厚度以及较强的面内共价键带来的良好的机械性能、光学透明度以及柔韧性和具有高效的门电压可调性；同时为研究表界面修饰、元素掺杂、缺陷、应变等提供了条件等优势引发科学界广泛关注。近年来,以MoS2为代表的二维过渡金属硫化合物成为继石墨烯之后广受关注的二维半导体材料体系,究其原因单层MoS2为直接带隙半导体材料，能够高效吸收光子能量，且拥有较高的载流子迁移率和出色的开关比。
发明内容
本发明的目的在于提供一种系统复杂度低、泄漏电流少、寄生电容小、抗辐照能力强的光电探测器及其制备方法。
本发明提供的光电探测器，由基于绝缘层上硅的场效应晶体管(记为晶体管A)和基于二维薄膜材料的场效应晶体管(记为晶体管B)组合而成；晶体管A与晶体管B物理位置呈纵向垂直分布；晶体管A中的栅极与晶体管B中的漏极之间连通。
其中，高量子效率的二维晶体管B用作光探测，将产生电信号通过二维二极管与SOI晶体管A构成的高增益输出。整个探测过程使得晶体管A阈值电压的下降，沟道区电导增加，从而导致漏极电流的显著增加，实现“一步光电”探测。
本发明提出的基于缘层上绝缘衬底上硅-二维材料异质集成光电探测器结构，其器件结构如图1所示，包括：晶体管A和晶体管B两部分。
晶体管A部分包括：
衬底1；
在衬底1上的氧化埋层2；
形成在氧化埋层2上依次形成的沟道区3、栅氧化层7、栅极8；栅极8两侧为侧墙9；
成在氧化埋层2上、在沟道区3两侧的晶体管漏极5和晶体管源极6；晶体管漏极5和晶体管源极6上有对应金属接触9，10；
形成在衬底1上，且位于氧化埋层2和晶体管漏极5、晶体管源极6两侧的浅槽隔离区4。
晶体管B部分包括：
衬底1；
形成在衬底1上的二维材料薄膜12；
形成在二维材料薄膜12两端处的晶体管B源极13和晶体管B漏极14；
晶体管A中的栅极8与和晶体管B漏极14之间通过金属互连15连通。
进一步地：
所述衬底1为半导体，选自硅，锗，锗硅，氮化镓，铟镓砷等。
所述沟道层3为半导体选自硅，锗，锗硅，氮化镓，铟镓砷等。
所述氧化埋层2及浅槽隔离区4为绝缘材料选自二氧化硅，氧化铝和氧化铪等。
所述栅极8金属选自金，钨，铝等。
所述互连线金属15选自为铜，铝等。
所述二维材料选自二硫化钼，氮化硼，二硫化钨等。薄膜厚度为1nm-5nm之间。
本发明中，所述衬底1为不掺杂或者P型弱掺杂。
本发明中，所述晶体管A中的源极6、漏极5与所述衬底1区域掺杂类型相同，掺杂浓度为重掺杂，掺杂浓度1019-1021cm-3。
本发明中，所述栅氧化层7为高K介质材料，如氧化铪，铪镐氧等，其厚度为1nm-30nm。
本发明中，所述栅极8为金，铂，铝等材料，栅长控制在10nm-1000nm之间。
本发明提出的上述光电探测器的制备方法，具体步骤为：
(1)起始的绝缘层上硅，通过离子注入形成包括图1所示的衬底1，埋层氧化层2和上层沟道层3，之后进行高温退火激活注入的离子；经过光刻并刻蚀后，通过外延工艺生长体硅；
(2)光刻并进行刻蚀形成浅槽并生长氧化层实现物理隔离4定义出有源区；
(3)使用后栅工艺，通过光刻后离子注入定义晶体管源区5和漏区6；光刻淀积并刻蚀，形成栅氧层7与多晶硅栅叠层结构，并通过替换金属栅极技术，形成金属栅极8及周围侧墙9；此步骤也可改为前栅工艺，即先通过光刻淀积并刻蚀，形成栅氧层7与多晶硅栅叠层结构，并通过替换金属栅极技术，形成金属栅极8及周围侧墙9，后进行光刻离子注入形成晶体管源区5和漏区6定义和掺杂；
(4)光刻并淀积金属接触，之后退火以形成如图1所示的，晶体管源极10和晶体管漏极11的金属接触；
(5)光刻并淀积形成二维材料薄膜12，然后淀积源极及金属接触13、漏极及金属接触(14)；
(6)再通过互连工艺淀积金属15，形成后道互连。
本发明中，光电探测器由基于绝缘层上硅的场效应晶体管和基于二维薄膜材料场效应晶体管平面结合实现，是具有高量子效率，高面积效率的“一步光电”探测装置。
附图说明
图1为本发明的基于绝缘衬底上硅-二维材料异质集成光电探测器结构图示。其中，(a)为俯视图，(b)为纵向剖视图,(c)为横向剖视图。
图2为本发明的基于绝缘衬底上硅-二维材料异质集成光电探测器的制备流程图示。
图中标号：1为衬底，2为氧化埋层,3为晶体管A沟道区，4为浅槽隔离区，5为晶体管A漏极，6为晶体管A源极，7为栅氧化层，8为晶体管A栅极，9为栅极8的侧墙，10为晶体管A漏极金属接触，11为晶体管A源极金属接触；12为二维材料薄膜，13为晶体管B源极(包括金属接触)，14为晶体管B漏极(奥克金属接触)；15为晶体管A与晶体管B之间的金属互连线。
具体实施方式
基于同一工作原理，器件的结构可以不同，具体实施方式体现在不同实施例中。
实施例1(对应图1的器件结构和图2的工艺流程)。
(1)如图2(a)所示,为起始的绝缘层上硅晶片。其衬底掺杂一般为弱p型掺杂的硅，掺杂浓度在1015cm-2至1017cm-2之间。根据传感的光学波长不同，衬底也可为锗硅，氮化镓或者铟镓砷等材料。其埋层一般为二氧化硅，厚度在10nm至1000nm之间。上层的沟道一般为硅，锗硅，氮化镓或者铟镓砷等材料。厚度为5nm至500nm之间。
(2)通过光刻并进行刻蚀形成浅槽并生长氧化层，浅槽隔离宽度在100nm-10000nm之间，深度在200nm-1000nm之间，氧化层材料一般二氧化硅，氧化铪等材料，实现了物理隔离并定义出有源区。如图2(b)所示。
(3)光刻并打开晶体管栅极区域的窗口，淀积并刻蚀分别形成栅氧化层与多晶硅栅叠层；刻蚀可选用干法或者湿法方法。干法刻蚀一般使用氟基或者卤族元素气体，如SF6，CHF3，HBr或者Cl2等。而湿法腐蚀一般使用TMAH，KOH等溶液。栅氧化层一般为氧化铪等高K值材料，栅氧化层厚度一般为1nm至100nm之间。如图2(c)所示。
(4)通过替换金属栅极技术，将多晶硅栅替换为金属栅极，栅极金属可为金，铂，铝等金属材料。光刻并打开两个离子注入的窗口，分别晶体管源区与晶体管漏区，并进行离子注入形成P型重掺杂区域；离子注入一般使用硼或镓，剂量为1013cm-2至1016cm-2之间，能量为1keV至100keV之间。离子激活退火温度一般为900度至1200度之间，时间为1微秒至10秒，如图2(d)所示。
(5)光刻并打开晶体管源漏区的窗口，淀积金属并使用剥离工艺形成晶体管各电学端口的金属接触，之后进行退火以降低接触电阻；金属淀积一般使用物理气相淀积或蒸发等方法，常用金属为铝，镍或钛等，退火温度为300度至900度之间。淀积氧化层进行叠层晶体管间电学隔离，通过光刻并淀积二维晶体管的栅极金属，用样的栅极金属可为金，铂，铝等金属材料。淀积二维材料薄膜作为场效应晶体管沟道，常用二维材料为二维材料可为二硫化钼，氮化硼，二硫化钨等材料，薄膜厚度为1nm-5nm之间。最后进行源漏部分金属淀积，常用金属为铝，镍或钛等，退火温度为300度至900度之间。如图2(e)所示。
(6)通过后道互连工艺，实现将二维晶体管漏极与金属顶栅极的互连；互连工艺可以采用大马士革互连或者气相沉积技术等方法实现，常用金属为铜，铝，镍或钛等，如图2(f)所示。
Claims (8)
1.基于绝缘衬底上硅-二维材料异质集成光电探测器，其特征在于，由基于绝缘层上硅的场效应晶体管记为晶体管A和基于二维薄膜材料的场效应晶体管记为晶体管B组合而成；晶体管A与晶体管B物理位置呈纵向垂直分布；晶体管A中的栅极与晶体管B中的漏极之间连通；
其中，晶体管B用作光探测，产生电信号通过二维二极管与晶体管A构成的高增益输出；探测过程使得晶体管A阈值电压下降，沟道区电导增加，导致漏极电流的显著增加，实现“一步光电”探测。
2.根据权利要求1所述的光电探测器，其特征在于，包括：晶体管A和晶体管B两部分；其中：
晶体管A部分包括：
衬底(1)；
在衬底(1)上的氧化埋层(2)；
形成在氧化埋层(2)上依次形成的沟道区(3)、栅氧化层(7)、栅极(8)；栅极(8)两侧为侧墙(9)；
成在氧化埋层(2)上、在沟道区(3)两侧的晶体管漏极(5)和晶体管源极(6)；晶体管漏极(5)和晶体管源极(6)上有对应金属接触(10，11)；
形成在衬底(1)上，且位于氧化埋层(2)和晶体管漏极(5)、晶体管源极(6)两侧的浅槽隔离区(4)；
晶体管B部分包括：
衬底(1)；
形成在衬底(1)上的二维材料薄膜(12)；
形成在二维材料薄膜(12)两端处的晶体管B源极(13)和晶体管B漏极(14)
晶体管A中的栅极(8)与和晶体管B漏极(14)之间通过金属互连(15)连通。
3.根据权利要求2所述的光电探测器，其特征在于：
所述衬底(1)为半导体，选自硅、锗、锗硅、氮化镓、铟镓砷；
所述沟道层(3)为半导体选自硅、锗、锗硅、氮化镓、铟镓砷；
所述氧化埋层(2)及浅槽隔离区(4)为绝缘材料，选自二氧化硅、氧化铝和氧化铪。
4.根据权利要求2所述的光电探测器，其特征在于：
所述栅氧化层(7)为为高K介质材料，选自二氧化硅、氧化铝和氧化铪；厚度为1nm-30nm；
所述栅极(8)金属选自金、钨、铝；
所述互连线金属(15)选自为铜、铝。
5.根据权利要求2所述的光电探测器，其特征在于，所述二维材料选自二硫化钼、氮化硼、二硫化钨；薄膜厚度为1nm-5nm之间。
6.根据权利要求2所述的光电探测器，其特征在于：
所述衬底(1)为不掺杂或者P型弱掺杂；
所述晶体管A中的源极(6)、漏极(5)与所述衬底(1)区域掺杂类型相同，掺杂浓度为重掺杂，掺杂浓度1019-1021cm-3。
7.根据权利要求2所述的光电探测器，其特征在于：
所述栅极(8)选自金、铂、铝，栅长为10nm-1000nm。
8.一种如权利要求2-7之一所述光电探测器的制备方法，其特征在于，具体步骤为：
(1)起始的绝缘层上硅，通过离子注入形成衬底(1)，埋层氧化层(2)和上层沟道层(3)，之后进行高温退火激活注入的离子；经过光刻并刻蚀后，外延工艺生长体硅；
(2)光刻并进行刻蚀形成浅槽并生长氧化层，实现物理隔离(4)，定义出有源区；
(3)使用后栅工艺，通过光刻后离子注入定义晶体管源区(5)和漏区(6)；光刻淀积并刻蚀，形成栅氧层(7)与多晶硅栅叠层结构，并通过替换金属栅极技术，形成金属栅极(8)及周围侧墙(9)；
或者使用前栅工艺，即先通过光刻淀积并刻蚀，形成栅氧层(7)与多晶硅栅叠层结构，通过替换金属栅极技术，形成金属栅极(8)及周围侧墙(9)，然后进行光刻离子注入形成晶体管源区(5)和漏区(6)，掺杂；
(4)光刻并淀积金属接触，之后退火以形成晶体管源极(10)和晶体管漏极(11)及其金属接触；
(5)光刻并淀积形成二维材料薄膜(12)，然后淀积源极及金属接触(13)、漏极及金属接触(14)；
(6)再通过互连工艺淀积金属(15)，形成后道互连。
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