WO2022100053A1 - 含有金属硅化物红外吸收层的石墨烯场效应电荷耦合器件 - Google Patents

含有金属硅化物红外吸收层的石墨烯场效应电荷耦合器件 Download PDF

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WO2022100053A1
WO2022100053A1 PCT/CN2021/094798 CN2021094798W WO2022100053A1 WO 2022100053 A1 WO2022100053 A1 WO 2022100053A1 CN 2021094798 W CN2021094798 W CN 2021094798W WO 2022100053 A1 WO2022100053 A1 WO 2022100053A1
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silicon
metal silicide
graphene
coupled device
infrared absorption
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French (fr)
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徐杨
吕建杭
刘威
刘亦伦
刘晨
俞滨
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浙江大学杭州国际科创中心
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/148—Charge coupled imagers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
    • H01L29/1606—Graphene
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42396—Gate electrodes for field effect devices for charge coupled devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/762—Charge transfer devices
    • H01L29/765—Charge-coupled devices
    • H01L29/768—Charge-coupled devices with field effect produced by an insulated gate

Definitions

  • the invention belongs to the technical field of image sensors, and relates to a graphene field effect charge-coupled device containing a metal silicide infrared absorption layer.
  • a charge-coupled device is an integrated circuit composed of many neatly arranged capacitors, which can sense light and convert an analog signal current. and processing. Controlled by an external circuit, each small capacitor can transfer the charge it carries to its adjacent capacitors.
  • CCD devices are used in photosensitive components of cameras, scanners and other equipment. It has good photosensitive efficiency and imaging quality, but is limited by the wide band gap of silicon, and the spectral detection range is limited to the visible light band.
  • we enhance the infrared response of silicon-based image sensors by integrating metal silicides as infrared-sensitive layers.
  • the Schottky junction formed by metal silicide and silicon has good infrared absorption characteristics, and the manufacturing process is relatively mature.
  • Pt silicide is a metallization material with excellent performance.
  • the Pt/Si interface is easy to react to form silicide after high temperature annealing (>200°C), and during the formation of Pt-Si, the impurities on the interface will naturally be driven to the outer surface of the silicide, and the formed interface is clean and smooth. Good contact.
  • Graphene is a new type of two-dimensional material, which is composed of carbon atoms with sp 2 hybrid orbitals to form a flat film of a hexagonal lattice, only one carbon atom thick.
  • Graphene is currently the thinnest yet hardest nanomaterial in the world. Its transparency is extremely high, and its absorption rate for visible light is only 2.3%; its electron mobility exceeds 15000 cm 2 /V ⁇ s at room temperature.
  • Graphene's transparency and flexibility make it easy to mechanically transfer. Covering graphene on a semiconductor oxide sheet can form a simple field effect structure.
  • the purpose of the present invention is to provide a graphene field effect charge coupled device containing a metal silicide infrared absorption layer in view of the deficiencies of the prior art.
  • a graphene field-effect charge-coupled device containing a metal silicide infrared absorption layer, which sequentially includes a gate electrode, a metal silicide, a semiconductor silicon substrate and an oxide layer from bottom to top.
  • a material insulating layer, a source electrode and a drain electrode are arranged on the upper surface of the oxide insulating layer, and a single-layer graphene film is covered on the upper surface of the oxide insulating layer, the source electrode and the drain electrode; the single-layer graphene film and the source electrode are covered with a single-layer graphene film; , the drain is in contact, and does not exceed the range defined by the source and the drain; the metal silicide is located below the semiconductor silicon substrate, and its range completely covers the entire area of the semiconductor silicon substrate; the metal silicide and the semiconductor silicon The contact between the substrates is good, forming a heterojunction.
  • the thickness of the metal silicide is 100 nm ⁇ 200 nm.
  • the metal silicide is a compound formed by transition metal and silicon.
  • the doping concentration of the semiconductor silicon substrate is less than 10 ⁇ 12 cm -3 , and the thickness is 200 ⁇ m.
  • the oxide insulating layer is silicon dioxide, and the thickness is 5 nm ⁇ 100 nm.
  • the light is incident from the top of the charge-coupled device (that is, the graphene side); the gate voltage applied between the source and the gate is a pulse voltage, and the source-drain voltage applied between the source and the drain is constant. Voltage.
  • the incident light irradiates the surface of the device
  • the visible light is absorbed by the semiconductor silicon, and the minority carriers generated by it are accumulated in the deep depletion potential well of the silicon; the infrared light passes through the silicon layer and is formed by metal silicide and silicon. Absorbed by the heterojunction, under the action of the electric field, the generated minority carriers are injected into the deep depletion potential well of the bulk silicon; when the photogenerated holes are accumulated in the silicon, the graphene on the upper layer of the device will be coupled out Equivalent electrons corresponding to holes in the potential well, thereby changing the conductivity of graphene.
  • the reading of the device uses the field effect of graphene to implement a single-pixel reading method.
  • a pulse gate voltage V gs greater than 5V is applied between the source and the gate to drive the semiconductor silicon lining.
  • the bottom enters the deep depletion state; at the same time, a fixed bias voltage V ds of 10mV is applied between the source and the drain, and the intensity of the incident light is judged by measuring the current passing between the source and the drain.
  • a pulse voltage of a certain frequency is applied between the gate and the source of the charge-coupled device to form a deep depletion region in the semiconductor substrate. If the semiconductor substrate used is n-type, the positive voltage is applied to the gate.
  • the graphene forms a MIS junction with the insulating layer and the semiconductor substrate.
  • the silicon substrate will enter a depleted state from electron accumulation. If the gate voltage is large enough, a hole inversion layer will be formed at the semiconductor-insulator interface. However, if the gate voltage is a pulse signal, since the generation of minority carriers requires a certain lifetime, the inversion layer will not appear immediately, and it remains in a depleted state, that is, a deep depletion state. Entering a deep depletion state, the width of the depletion region increases.
  • the silicon depletion region absorbs the visible light part of the incident light and generates electron-hole pairs; the Schottky junction formed by metal silicide and silicon absorbs the infrared part of the incident light, and at the same time Electron-hole pairs are created, in which holes are injected into the deep depletion region under the action of an electric field. If the semiconductor substrate is n-type, the electron flow is collected by the graphene under the action of the high-speed gate electric field, resulting in the increase of the Fermi level of the graphene and the accumulation of holes in the deep depletion potential well.
  • metal silicide is integrated on the back of silicon as an infrared photosensitive layer material, and a heterojunction between metal silicide and silicon is formed. Due to the high transparency of graphene, the absorption of infrared by silicon is weak. When the light is incident from the front, the visible light is absorbed by the silicon material, and the infrared light passes through the bulk silicon and enters the Schottky barrier formed by the metal silicide and the silicon, where it is absorbed and electron-hole pairs are generated.
  • the device uses a low-doped thin silicon wafer as the substrate, its deep depletion potential well is very close to the Schottky junction, and the infrared photogenerated carriers at the Schottky barrier are very strong under the action of the electric field. Almost implanted into deep depletion wells in silicon. Visible light is absorbed in silicon and excites electron-hole pairs, and the two parts of carriers are integrated together in the potential well, thus broadening the spectral response range of traditional CCD devices and increasing the absorption efficiency in the infrared light band.
  • the device of the present invention has a simple structure, is easy to manufacture on a large scale, and is compatible with the CMOS process.
  • the device of the present invention has an integral function similar to that of the traditional CCD device, and can also obtain a large response in a weak light environment.
  • FIG. 1 is a schematic structural diagram of a graphene field effect charge-coupled device containing a metal silicide infrared absorption layer of the present invention, wherein a gate 1, a metal silicide 2, a semiconductor silicon substrate 3, an oxide insulating layer 4, and a source electrode 5 , drain 6, single-layer graphene film 7;
  • FIG. 2 is a real shot of a graphene field effect charge-coupled device pixel array containing a metal silicide infrared absorption layer.
  • a graphene field-effect charge-coupled device (Charge Coupled Device, CCD) containing a metal silicide infrared absorption layer includes a gate 1, a metal silicide 2, a semiconductor silicon substrate 3 and The oxide insulating layer 4, the upper surface of the oxide insulating layer 4 is provided with a source electrode 5 and a drain electrode 6, and a single-layer graphene film 7 is covered on the upper surface of the oxide insulating layer 4, the source electrode 5 and the drain electrode 6; single-layer graphite
  • the olefin film 7 is in contact with the source electrode 5 and the drain electrode 6, and does not exceed the range defined by the source electrode 5 and the drain electrode 6; the metal silicide 2 is located under the semiconductor silicon substrate 3, and its range completely covers the semiconductor silicon substrate 3 The entire area; the metal silicide 2 and the semiconductor silicon substrate 3 are in good contact to form a heterojunction.
  • the metal silicide 2 adopts a Pt-Si layer.
  • a silicon dioxide insulating layer is grown on the upper surface of the lightly doped silicon substrate.
  • the resistivity of the silicon substrate used is 1k ⁇ 10k ⁇ cm; the thickness of the silicon dioxide insulating layer is 5nm ⁇ 100nm, and the growth temperature is 900 ⁇ 1200°C;
  • a Pt layer is fabricated using electron beam evaporation. Under the conditions of ultra-high vacuum (10 -7 Pa) and room temperature, 200nm high-purity metal Pt was evaporated on the backside of the silicon substrate by electron beam. Then use vacuum furnace annealing at 300 °C for one minute to form a compound between Pt and Si;
  • the high-speed pulse gate voltage is applied to the graphene field-effect charge-coupled device containing the metal silicide infrared absorption layer to drive the silicon substrate into deep depletion and the Schottky heterojunction into forward bias to realize light absorption and charge accumulation.
  • One end of the gate voltage is connected to the gate 1 of the device, and the other end is connected to the source 5, and the gate voltage is a pulse voltage with an amplitude of 30V.
  • a fixed bias voltage of 10mV is applied between the source electrode 5 and the drain electrode 6 to realize the lossless readout of the charges in the potential well on the graphene. As shown in Figure 1.
  • the PtSi-Si Schottky heterojunction is integrated on the back of the device.
  • visible light is absorbed by the silicon material, and infrared light passes through the bulk silicon and enters the Schottky barrier formed by metal silicide and silicon and is absorbed by it. Absorption, both parts of the light are excited to generate electron-hole pairs.
  • the device uses a low-doped thin silicon wafer as the substrate and uses a large gate voltage to drive the deep depletion potential well.
  • the deep depletion potential well is very close to the Schottky junction, and the infrared light generated at the Schottky barrier
  • the charge carriers are injected into the deep depletion potential well of silicon under the action of the electric field, and integrate with the visible light excited charge carriers in the silicon.
  • the electrons in the silicon flow through the external circuit and are collected by the graphene, causing the Fermi level of the graphene to rise. Due to the special band structure of graphene, the conductance of graphene will change proportionally accordingly. Due to the fixed bias applied to the graphene, the current through the graphene can simultaneously reflect the amount of charge stored in the potential well, and a single pixel can be read in real time.
  • the CCD in the present invention can use a standard semiconductor process to manufacture the photodetector array as shown in FIG. 2 .
  • the structure of each pixel element is the same as that in Embodiment 1, including: gate 1, Pt-Si layer, semiconductor silicon substrate 3, oxide insulating layer 4, source electrode 5, drain electrode 6 and single-layer graphene Film 7; wherein the single-layer graphene film 7 covers the upper surface of the oxide insulating layer 4, the source electrode 5 and the drain electrode 6, and does not exceed the range defined by the source electrode 5 and the drain electrode 6; the Pt-Si layer is located on the semiconductor silicon lining Below the bottom 3 , its range completely covers the semiconductor silicon substrate 3 .
  • the devices of the same structure are arranged on the substrate according to the same spacing, 4 ⁇ 4, to form a set of charge-coupled device arrays.
  • gold wires are used to connect the top electrode of each element in the photodetector array to the signal processing circuit to complete the package, forming a charge-coupled device pixel array.
  • the data in each pixel is obtained using a single pixel signal readout method.
  • One end of the gate voltage is connected to the gate of the device, and the other end is connected to the source, and the gate voltage is a pulse voltage with an amplitude of 30V. Apply a fixed 10mV bias between source and drain.
  • the CCD array in this example does not need to transfer the read signal multiple times, and each pixel in the array can operate independently.
  • the invention utilizes the good absorption characteristics of metal silicide to infrared light, and expands the response of the silicon-based imaging device in the infrared band.
  • the reading method of the present invention utilizes the field effect characteristics of graphene.
  • the invention expands the spectral response range of the silicon-based CCD device in the infrared band, maintains the characteristics of the silicon-based CCD with low noise, high reliability, mature technology and low cost, and has mature metal silicide preparation technology and good reliability.

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Abstract

一种含有金属硅化物红外吸收层的石墨烯场效应电荷耦合器件，包括栅极（1）、金属硅化物红外吸收层（2）、硅衬底（3）、氧化物绝缘层（4）、源极（5）、漏极（6）和单层石墨烯薄膜（7）；入射光照射到器件表面时，可见光被半导体硅吸收，其产生的少数载流子被积累到硅的深耗尽势阱里；红外光穿过硅层，被金属硅化物与硅形成的异质结所吸收，在电场的作用下，产生的少数载流子被注入到体硅的深耗尽势阱中。当硅中产生光生空穴积累时，器件上层的石墨烯会耦合出与势阱中的空穴对应的等量电子，从而改变石墨烯的电导率，从石墨烯的电流中能够读出硅势阱中的电荷。拓展了硅基CCD器件在红外波段的光谱响应范围，保持了硅基CCD噪声小、可靠性高、工艺成熟、成本低廉等特点。

Description

含有金属硅化物红外吸收层的石墨烯场效应电荷耦合器件 技术领域
本发明属于图像传感器技术领域，涉及一种含有金属硅化物红外吸收层的石墨烯场效应电荷耦合器件。
背景技术
电荷耦合器件(CCD)，是一种集成电路，由许多整齐排列的电容组成，能感应光线，并转换出模拟信号电流，信号电流再经过放大和模数转换，就可以实现图像的获取、传输和处理。经由外部电路的控制，每个小电容能将其所带的电荷转给它相邻的电容。当CCD器件应用于相机、扫描仪等设备的感光组件。其具有良好的感光效率和成像品质，但受限于硅较宽的带隙，光谱探测范围限制在可见光波段。为了拓宽图像传感器的光谱范围，我们通过集成金属硅化物作为红外感光层来增强硅基图像传感器的红外响应。金属硅化物与硅形成的肖特基结具有良好的红外吸收特性，制作工艺也较为成熟。此处以Pt为例，Pt硅化物是一种性能优良的金属化材料。Pt/Si界面在高温退火(>200℃)后很容易反应形成硅化物，且在Pt-Si形成过程中会自然地将界面上的杂质驱赶到硅化物的外表面，其形成的界面干净且接触性好。
石墨烯(Graphene)是一种新型二维材料，由碳原子以sp 2杂化轨道组成六角型晶格的平面薄膜，只有一个碳原子厚度。石墨烯是目前世界上最薄却也是最坚硬的纳米材料。它透明度极高，对可见光吸收率仅为2.3％；常温下电子迁移率超过15000cm 2/V·s。石墨烯透明和柔性使得其易于进行机械转移。将石墨烯覆盖在半导体氧化片上，可以构成简单的场效应结构。
发明内容
本发明的目的在于针对现有技术的不足，提供一种含有金属硅化物红外吸收层的石墨烯场效应电荷耦合器件。
本发明的目的是通过以下技术方案来实现的：一种含有金属硅化物红外吸收层的石墨烯场效应电荷耦合器件，自下而上依次包括栅极、金属硅化物、半导体硅衬底和氧化物绝缘层，所述氧化物绝缘层上表面设有源极和漏极，在氧化物绝缘层、源极和漏极上表面覆盖单层石墨烯薄膜；所述单层石墨烯薄膜与源极、漏极相接触，且不超出源极与漏极定义的范围；所述金属硅化物位于半导体硅衬底 的下方，其范围完全覆盖半导体硅衬底整个区域；所述金属硅化物与半导体硅衬底之间接触良好，形成异质结。
进一步地，所述金属硅化物的厚度为100nm～200nm。
进一步地，所述金属硅化物是过渡金属与硅生成的化合物。
进一步地，所述半导体硅衬底的掺杂浓度小于10^12cm -3，厚度为200μm。
进一步地，所述氧化物绝缘层为二氧化硅，厚度为5nm～100nm。
进一步地，光线从电荷耦合器件上方(即石墨烯一面)入射；所述源极及栅极之间施加的栅压为脉冲电压，所述源极和漏极之间施加的源漏电压为恒定电压。
进一步地，入射光照射到器件表面时，可见光被半导体硅吸收，其产生的少数载流子被积累到硅的深耗尽势阱里；红外光穿过硅层，被金属硅化物与硅形成的异质结所吸收，在电场的作用下，产生的少数载流子被注入到体硅的深耗尽势阱中；当硅中产生光生空穴积累时，器件上层的石墨烯会耦合出与势阱中的空穴对应的等量电子，从而改变石墨烯的电导率。
进一步地，该器件的读取利用石墨烯的场效应，实施单像素读取方式，当器件工作时，在源极及栅极之间施加一个大于5V的脉冲栅压V gs，驱动半导体硅衬底进入深耗尽状态；同时在源极和漏极之间施加一个10mV的固定偏压V ds，通过测量源极和漏极之间通过的电流判断入射光线的强度。
本发明提出的电荷耦合器件的工作原理如下：
(1)在电荷耦合器件的栅极和源极之间施加一定频率的脉冲电压，在半导体衬底内形成深耗尽区。如果使用的半导体衬底为n型，则电压正极施加在栅极。
(2)石墨烯与绝缘层、半导体衬底形成MIS结，随着栅电压逐渐增大，硅基底将从电子积累进入耗尽状态。若栅压足够大，半导体-绝缘层界面将形成空穴反型层。但是若栅压为脉冲信号，由于少数载流子的产生需要一定的寿命时间，也不会立即出现反型层，仍然保持为耗尽的状态，也即深耗尽状态。进入深耗尽状态，耗尽区宽度增大。
(3)当入射光照射到器件区域，硅耗尽区吸收入射光中的可见光部分并产生电子-空穴对；金属硅化物与硅形成的肖特基结吸收入射光中的红外部分，同时产生电子-空穴对，其中空穴在电场作用下注入到深耗尽区域。若半导体衬底为n型，在高速栅电场作用下电子流被石墨烯收集，导致石墨烯的费米能级上升，空穴则在深耗尽势阱中积累。
(4)由于石墨烯的特殊能带结构，石墨烯的电导会相应成比例的变化。这样给石墨烯施加固定的偏压后，通过石墨烯的电流能够同步反映出势阱内存储的电荷量，且无需多次转移读取。
本发明具有以下有益效果：
(1)本发明在硅的背部集成了金属硅化物作为红外感光层材料，并形成了金属硅化物与硅之间的异质结，由于石墨烯透明度高，硅对红外的吸收较弱，当光线从正面入射时，可见光被硅材料所吸收，红外光穿过体硅进入到金属硅化物与硅形成的肖特基势垒并被其吸收并产生电子-空穴对。
(2)由于该器件使用低掺杂的薄硅片做衬底，其深耗尽势阱与肖特基结非常接近，肖特基势垒处的红外光生载流子在电场的作用下很容易被注入到硅的深耗尽势阱中。可见光在硅中被吸收并激发出电子-空穴对，这两部分载流子在势阱中一起进行积分，从而拓宽了传统CCD器件的光谱响应范围，增加了红外光波段的吸收效率。
(3)本发明器件结构简单，易于大规模制造，并可与CMOS工艺兼容。
(4)石墨烯制备工艺成熟，造价相对较低，易于制备生产。金属硅化物的加工也非常成熟。
(5)本发明器件具有与传统CCD器件相似的积分功能，在弱光环境下同样可以得到很大的响应。
附图说明
图1为本发明含有金属硅化物红外吸收层的石墨烯场效应电荷耦合器件的结构示意图，其中，栅极1、金属硅化物2，半导体硅衬底3、氧化物绝缘层4、源极5、漏极6、单层石墨烯薄膜7；
图2为含有金属硅化物红外吸收层的石墨烯场效应电荷耦合器件像素阵列的实拍图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行完整的描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
实施例1
如图1所示，含有金属硅化物红外吸收层的石墨烯场效应电荷耦合器件(Charge Coupled Device,CCD)，自下而上依次包括栅极1、金属硅化物2、半导体硅衬底3和氧化物绝缘层4，氧化物绝缘层4上表面设有源极5和漏极6，在氧化物绝缘层4、源极5和漏极6上表面覆盖单层石墨烯薄膜7；单层石墨烯薄膜7与源极5、漏极6相接触，且不超出源极5与漏极6定义的范围；金属硅化物2位于半导体硅衬底3的下方，其范围完全覆盖半导体硅衬底3整个区域；金属硅化物2与半导体硅衬底3之间接触良好，形成异质结。本实施例中金属硅化物2采用Pt-Si层。
制备上述含有金属硅化物红外吸收层的石墨烯场效应电荷耦合器件的方法包括以下步骤：
(1)在轻掺硅衬底的上表面生长二氧化硅绝缘层，所用硅衬底的电阻率为1k～10kΩ·cm；二氧化硅绝缘层的厚度为5nm～100nm，生长温度为900～1200℃；
(2)使用电子束蒸发制作Pt层。在超高真空(10 -7Pa)及室温条件下，使用电子束蒸发200nm的高纯金属Pt于硅衬底背面。再使用真空炉退火在300℃下退火一分钟使Pt与Si形成化合物；
(3)在二氧化硅绝缘层表面使用光刻技术制作出源极和漏极的图形，然后采用电子束蒸发或热蒸发技术，首先生长厚度约为15nm的铬黏附层，然后生长80nm的金层作为电极；
(4)在源极、漏极和二氧化硅绝缘层的上表面覆盖单层石墨烯薄膜；石墨烯使用湿法转移：将单层石墨烯表面均匀旋涂一层聚甲基丙烯酸甲酯(PMMA)薄膜，然后放入酸性刻蚀溶液中浸泡约6h腐蚀去除铜箔，留下由PMMA支撑的单层石墨烯薄膜；将PMMA支撑的石墨烯薄膜用去离子水清洗后转移到二氧化硅绝缘层、源极和漏极的上表面；最后用丙酮和异丙醇浸泡样品去除PMMA；其中，所述酸刻蚀溶液由CuSO 4、HCl和水组成，CuSO 4：HCl：H 2O＝10g:45ml:50ml；
(5)对器件进行二次光刻，用光刻胶覆盖所需单层石墨烯图形的定义区域。再通过氧等离子体反应离子刻蚀技术(Oxygen plasma ICP-RIE)，其功率和刻蚀时间分别为75W，3min。刻蚀掉光刻胶外的多余石墨烯，刻蚀完成后，用丙酮和异丙醇清洗去除残余光刻胶；
(6)在金属硅化物的底部涂覆镓铟浆料，制备栅极，与金属硅化物形成欧姆接触。
对上述含有金属硅化物红外吸收层的石墨烯场效应电荷耦合器件加高速脉冲栅压，驱动硅衬底进入深耗尽，肖特基异质结进入正偏，实现光吸收和电荷积累。其中栅电压的一端连接在器件的栅极1上，另一端连接在源极5上，栅电压是幅值为30V的脉冲电压。在源极5和漏极6之间加10mV固定偏压，实现势阱内电荷在石墨烯上的无损读出。如图1所示。
该器件背面集成了PtSi-Si肖特基异质结，当光线入射时，可见光被硅材料所吸收，红外光穿过体硅进入到金属硅化物与硅形成的肖特基势垒并被其吸收，两部分光线均会激发产生电子-空穴对。该器件使用低掺杂的薄硅片做衬底并使用较大栅压驱动深耗尽势阱，其深耗尽势阱与肖特基结非常接近，肖特基势垒处的红外光生载流子在电场的作用下被注入到硅的深耗尽势阱中，和硅中可见光激发的载流子共同进行积分。
在高速栅电场作用下，硅中的电子流经外电路，被石墨烯收集，导致石墨烯的费米能级上升。由于石墨烯的特殊能带结构，石墨烯的电导会相应成比例的变化。由于石墨烯施加了固定的偏压，通过石墨烯的电流能够同步反映出势阱内存储的电荷量，且可实现单像素实时地读取。
实施例2
如图2所示，本发明中的电荷耦合器件可以使用标准半导体工艺，制作出如图2所示的光电探测器阵列。其中每个像素元的结构与实施例1中相同，都包含：栅极1、Pt-Si层、半导体硅衬底3、氧化物绝缘层4、源极5、漏极6与单层石墨烯薄膜7；其中单层石墨烯薄膜7覆盖在氧化物绝缘层4、源极5及漏极6上表面，且不超出源极5与漏极6定义的范围；Pt-Si层位于半导体硅衬底3的下方，其范围完全覆盖半导体硅衬底3。
将相同结构的器件按照同等的间距，4×4排布在衬底上，就构成了一组电荷耦合器件阵列。通过使用引线键合，用金线把光电探测器阵列中每个元件的顶电极与信号处理电路连接起来完成封装，就构成了电荷耦合器件像素阵列。
使用单像素信号读出方法来获得每个像素中的数据。其中栅电压的一端连接在器件的栅极上，另一端连接在源极上，栅电压是幅值为30V的脉冲电压。在源极和漏极之间加10mV固定偏压。本实例中的电荷耦合器件阵列无需多次转移读取信号，并且阵列中的每个像素都可以单独进行操作。
本发明利用金属硅化物对红外光线的良好吸收特性，拓展了硅基成像器件在 红外波段的响应。本发明的读取方式利用了石墨烯的场效应特性。本发明拓展了硅基CCD器件在红外波段的光谱响应范围，保持了硅基CCD噪声小、可靠性高、工艺成熟、成本低廉等特点，且金属硅化物制备工艺成熟，可靠性较好。
以上所述仅是本发明的优选实施方式，虽然本发明已以较佳实施例披露如上，然而并非用以限定本发明。任何熟悉本领域的技术人员，在不脱离本发明技术方案范围情况下，都可利用上述揭示的方法和技术内容对本发明技术方案做出许多可能的变动和修饰，或修改为等同变化的等效实施例。因此，凡是未脱离本发明技术方案的内容，依据本发明的技术实质对以上实施例所做的任何的简单修改、等同变化及修饰，均仍属于本发明技术方案保护的范围内。

Claims (8)

  1. 一种含有金属硅化物红外吸收层的石墨烯场效应电荷耦合器件，其特征在于，自下而上依次包括栅极(1)、金属硅化物(2)、半导体硅衬底(3)和氧化物绝缘层(4)，所述氧化物绝缘层(4)上表面设有源极(5)和漏极(6)，在氧化物绝缘层(4)、源极(5)和漏极(6)上表面覆盖单层石墨烯薄膜(7)；所述单层石墨烯薄膜(7)与源极(5)、漏极(6)相接触，且不超出源极(5)与漏极(6)定义的范围；所述金属硅化物(2)位于半导体硅衬底(3)的下方，其范围完全覆盖半导体硅衬底(3)整个区域；所述金属硅化物(2)与半导体硅衬底(3)之间接触良好，形成异质结。
  2. 根据权利要求1所述的含有金属硅化物红外吸收层的石墨烯场效应电荷耦合器件，其特征在于，所述金属硅化物(2)的厚度为100nm～200nm。
  3. 根据权利要求1所述的含有金属硅化物红外吸收层的石墨烯场效应电荷耦合器件，其特征在于，所述金属硅化物(2)是过渡金属与硅生成的化合物。
  4. 根据权利要求1所述的含有金属硅化物红外吸收层的石墨烯场效应电荷耦合器件，其特征在于，所述半导体硅衬底(3)的掺杂浓度小于10^12cm -3，厚度为200μm。
  5. 根据权利要求1所述的含有金属硅化物红外吸收层的石墨烯场效应电荷耦合器件，其特征在于，所述氧化物绝缘层(4)为二氧化硅，厚度为5nm～100nm。
  6. 根据权利要求1所述的含有金属硅化物红外吸收层的石墨烯场效应电荷耦合器件，其特征在于，光线从电荷耦合器件上方入射；所述源极(5)及栅极(1)之间施加的栅压为脉冲电压，所述源极(5)和漏极(6)之间施加的源漏电压为恒定电压。
  7. 根据权利要求1所述的含有金属硅化物红外吸收层的石墨烯场效应电荷耦合器件，其特征在于，入射光照射到器件表面时，可见光被半导体硅吸收，其产生的少数载流子被积累到硅的深耗尽势阱里；红外光穿过硅层，被金属硅化物与硅形成的异质结所吸收，在电场的作用下，产生的少数载流子被注入到体硅的深耗尽势阱中；当硅中产生光生空穴积累时，器件上层的石墨烯会耦合出与势阱中的空穴对应的等量电子，从而改变石墨烯的电导率。
  8. 根据权利要求1所述的含有金属硅化物红外吸收层的石墨烯场效应电荷耦合器件，其特征在于，该器件的读取利用石墨烯的场效应，实施单像素读取方 式，当器件工作时，在源极(5)及栅极(1)之间施加一个大于5V的脉冲栅压V gs，驱动半导体硅衬底(3)进入深耗尽状态；同时在源极(5)和漏极(6)之间施加一个10mV的固定偏压V ds，通过测量源极(5)和漏极(6)之间通过的电流判断入射光线的强度。
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