CN116417429A - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN116417429A
CN116417429A CN202211633450.5A CN202211633450A CN116417429A CN 116417429 A CN116417429 A CN 116417429A CN 202211633450 A CN202211633450 A CN 202211633450A CN 116417429 A CN116417429 A CN 116417429A
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CN
China
Prior art keywords
substrate
upper substrate
sealing resin
semiconductor element
resin
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Pending
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CN202211633450.5A
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English (en)
Chinese (zh)
Inventor
村山启
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Publication of CN116417429A publication Critical patent/CN116417429A/zh
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    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
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    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
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    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
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    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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    • H01L23/49833Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the chip support structure consisting of a plurality of insulating substrates
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    • H01L22/30Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
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    • H01L2224/08221Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/08225Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/08235Disposition the bonding area connecting directly to another bonding area, i.e. connectorless bonding, e.g. bumpless bonding the bonding area connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bonding area connecting to a via metallisation of the item
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    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
CN202211633450.5A 2021-12-23 2022-12-19 半导体装置 Pending CN116417429A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2021209839A JP7760360B2 (ja) 2021-12-23 2021-12-23 半導体装置
JP2021-209839 2021-12-23

Publications (1)

Publication Number Publication Date
CN116417429A true CN116417429A (zh) 2023-07-11

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Application Number Title Priority Date Filing Date
CN202211633450.5A Pending CN116417429A (zh) 2021-12-23 2022-12-19 半导体装置

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US (1) US20230207443A1 (enExample)
EP (1) EP4203011A3 (enExample)
JP (1) JP7760360B2 (enExample)
CN (1) CN116417429A (enExample)

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CN118841378A (zh) * 2023-04-25 2024-10-25 长江存储科技有限责任公司 封装体结构及其形成方法
JP2025087205A (ja) 2023-11-29 2025-06-10 新光電気工業株式会社 半導体装置

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KR20120007840A (ko) * 2010-07-15 2012-01-25 삼성전자주식회사 두 개의 패키지 기판 사이에 배치된 스페이서를 가진 pop 반도체 패키지
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KR102059403B1 (ko) * 2016-10-04 2019-12-26 삼성전자주식회사 팬-아웃 반도체 패키지
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EP4203011A2 (en) 2023-06-28
EP4203011A3 (en) 2023-07-26
US20230207443A1 (en) 2023-06-29
JP2023094391A (ja) 2023-07-05
JP7760360B2 (ja) 2025-10-27

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