CN116325100A - 表面处理装置及半导体装置的制造装置 - Google Patents

表面处理装置及半导体装置的制造装置 Download PDF

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Publication number
CN116325100A
CN116325100A CN202080105720.8A CN202080105720A CN116325100A CN 116325100 A CN116325100 A CN 116325100A CN 202080105720 A CN202080105720 A CN 202080105720A CN 116325100 A CN116325100 A CN 116325100A
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CN
China
Prior art keywords
bonding
chip
surface treatment
wafer
joint surface
Prior art date
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Pending
Application number
CN202080105720.8A
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English (en)
Chinese (zh)
Inventor
菊地広
李瑾
高野彻朗
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yamaha Robotics Co Ltd
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Yamaha Robotics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yamaha Robotics Co Ltd filed Critical Yamaha Robotics Co Ltd
Publication of CN116325100A publication Critical patent/CN116325100A/zh
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0448—Apparatus for applying a liquid, a resin, an ink or the like
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H10W72/07152—Means for cooling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/0711—Apparatus therefor
    • H10W72/07173—Means for moving chips, wafers or other parts, e.g. conveyor belts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W80/00—Direct bonding of chips, wafers or substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W80/00—Direct bonding of chips, wafers or substrates
    • H10W80/301—Bonding techniques, e.g. hybrid bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W80/00—Direct bonding of chips, wafers or substrates
    • H10W80/301—Bonding techniques, e.g. hybrid bonding
    • H10W80/312—Bonding techniques, e.g. hybrid bonding characterised by the direct bonding of electrically conductive pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W80/00—Direct bonding of chips, wafers or substrates
    • H10W80/301—Bonding techniques, e.g. hybrid bonding
    • H10W80/327—Bonding techniques, e.g. hybrid bonding characterised by the direct bonding of insulating parts, e.g. of silicon oxide layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass

Landscapes

  • Pressure Welding/Diffusion-Bonding (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Die Bonding (AREA)
  • Wire Bonding (AREA)
CN202080105720.8A 2020-10-05 2020-10-05 表面处理装置及半导体装置的制造装置 Pending CN116325100A (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2020/037776 WO2022074719A1 (ja) 2020-10-05 2020-10-05 表面処理装置および半導体装置の製造装置

Publications (1)

Publication Number Publication Date
CN116325100A true CN116325100A (zh) 2023-06-23

Family

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Family Applications (1)

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CN202080105720.8A Pending CN116325100A (zh) 2020-10-05 2020-10-05 表面处理装置及半导体装置的制造装置

Country Status (6)

Country Link
US (1) US12489004B2 (https=)
EP (1) EP4227980A4 (https=)
JP (1) JP7470457B2 (https=)
KR (1) KR102894616B1 (https=)
CN (1) CN116325100A (https=)
WO (1) WO2022074719A1 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2022150172A (ja) * 2021-03-26 2022-10-07 株式会社ディスコ ウエーハの貼り合わせ方法
FR3144695B1 (fr) * 2022-12-28 2026-04-03 Commissariat Energie Atomique Procédé de collage hybride direct de puce à plaque
JP2024097401A (ja) * 2023-01-06 2024-07-19 ヤマハロボティクスホールディングス株式会社 半導体チップのアライメント方法、接合方法、半導体装置、並びに電子部品製造システム
JP7659910B2 (ja) * 2023-04-24 2025-04-10 ヤマハロボティクスホールディングス株式会社 プラズマ処理方法及び接合システム

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013243333A (ja) * 2012-04-24 2013-12-05 Tadatomo Suga チップオンウエハ接合方法及び接合装置並びにチップとウエハとを含む構造体
WO2017155002A1 (ja) * 2016-03-11 2017-09-14 ボンドテック株式会社 基板接合方法
US20190326252A1 (en) * 2018-04-20 2019-10-24 Invensas Bonding Technologies, Inc. Dbi to si bonding for simplified handle wafer

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012175043A (ja) 2011-02-24 2012-09-10 Tokyo Electron Ltd 接合装置、接合システム、接合方法、プログラム及びコンピュータ記憶媒体
JP6337400B2 (ja) 2012-04-24 2018-06-06 須賀　唯知 チップオンウエハ接合方法及び接合装置並びにチップとウエハとを含む構造体
JP6429179B2 (ja) * 2014-04-25 2018-11-28 ボンドテック株式会社 基板接合装置および基板接合方法
US9870922B2 (en) 2014-04-25 2018-01-16 Tadatomo Suga Substrate bonding apparatus and substrate bonding method
JP6448858B2 (ja) * 2016-09-30 2019-01-09 ボンドテック株式会社 基板接合方法および基板接合装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013243333A (ja) * 2012-04-24 2013-12-05 Tadatomo Suga チップオンウエハ接合方法及び接合装置並びにチップとウエハとを含む構造体
WO2017155002A1 (ja) * 2016-03-11 2017-09-14 ボンドテック株式会社 基板接合方法
US20190326252A1 (en) * 2018-04-20 2019-10-24 Invensas Bonding Technologies, Inc. Dbi to si bonding for simplified handle wafer

Also Published As

Publication number Publication date
JP7470457B2 (ja) 2024-04-18
JPWO2022074719A1 (https=) 2022-04-14
EP4227980A1 (en) 2023-08-16
US20230369079A1 (en) 2023-11-16
WO2022074719A1 (ja) 2022-04-14
EP4227980A4 (en) 2024-09-25
KR20230054731A (ko) 2023-04-25
US12489004B2 (en) 2025-12-02
KR102894616B1 (ko) 2025-12-02

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