CN1162863C - 具有单元电阻及对单元电阻估值的装置的磁电阻存储器 - Google Patents

具有单元电阻及对单元电阻估值的装置的磁电阻存储器 Download PDF

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CN1162863C
CN1162863C CNB008057982A CN00805798A CN1162863C CN 1162863 C CN1162863 C CN 1162863C CN B008057982 A CNB008057982 A CN B008057982A CN 00805798 A CN00805798 A CN 00805798A CN 1162863 C CN1162863 C CN 1162863C
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CN1347560A (zh
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R・特维斯
R·特维斯
W·韦伯
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Infineon Technologies AG
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/14Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
    • G11C11/15Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1653Address circuits or decoders
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1653Address circuits or decoders
    • G11C11/1655Bit-line or column circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1653Address circuits or decoders
    • G11C11/1657Word-line or row circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1673Reading or sensing circuits or methods

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Measurement Of Resistance Or Impedance (AREA)
  • Analogue/Digital Conversion (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

本发明的主题涉及对磁电阻存储器估值的电路,其中在该估值装置中将这样地排除大的、尤其对于具有小电压电平及小损耗功率的新元件来说是关键的偏移电压,即,使与单元的相应信息状态相关的单元电流减去一个平均单元电流,及将该电流产值转换成一个相应的输出电压,其中具有不同信息内容的单元中的单元电阻的组合用于构成单元平均电流。

Description

具有单元电阻及对单元电阻估值的装置的 磁电阻存储器
技术领域
本发明涉及借助一个参考电阻时磁电阻存储单元(MRAM)中磁致变化的电阻估值的装置。这种存储单元典型地具有一个软磁层及一个硬磁层,它们是导电的并彼此通过一个隧道氧化物隔开,其中隧道几率及由此电阻与两个层的极化方向有关。
背景技术
这样一种装置已由美国专利US5,173,837,尤其是由其图4公知,其中每列引入一个参考单元的电阻,由此可快速及损耗功率很小地进行估值。
由于制造的公差在整个存储区域上各单元电阻不是恒定的,对于相同的信息状态在通过一个估值电路执行电阻-电压变换后出现了不同的输出电压,这些输出电压常常不能被后级的决定电路配置。
发明内容
本发明的任务在于,给出一种对磁电阻存储器中单元电阻估值的装置,在该估值装置中将排除其中大的、尤其对于具有小电压电平及小损耗功率的新元件来说是关键的偏移电压。
根据本发明,该任务将通过以下技术方案来解决。
根据本发明的一种具有单元电阻及对单元电阻估值的装置的磁电阻存储器,其中每个单元电阻的第一端子通过开关与字线电压相连接,及每个单元电阻的第二端子通过另一开关与一个导线节点相连接,其中导线节点通过一个参考电阻与参考电压源相连接,使得流出导线节点的单元电流减去一个平均电流,及其中一个放大器将各单元电流与平均电流的差值转换成一个作为估值信号的电压。
本发明还包括基于上述技术方案的有利构型。
本发明的实质在于,使与单元的相应信息状态相关的单元电流减去一个平均单元电流,及将该电流差值转换成一个相应的输出电压,其中具有不同信息内容的单元中的单元电阻的组合用于构成单元平均电流。
附图说明
图1示出根据本发明的磁电阻存储器的一个优选实施例,其中示出磁电阻存储器的一个单元区组成的片段。
具体实施方式
以下将借助图1来详细说明根据本发明的一个优选实施例。该图1表示位导线y+2...y...y-2及字线x-2...X...X+3的一个矩阵形式的结构,它描述由一个磁电阻存储器的一个单元区组成的片段。在每个位导线及每个字线之间设有一个磁致电阻的电阻R,它通常由彼此叠放并通过一个隧道氧化物隔开的软磁区域及硬磁区组成。在选出的字线x及选出的位导线y之间具有一个选出的单元电阻R。这里字线的选择或寻址例如是借助转换开关US-2...US+3来实现的,这些转换开关各与一个字线x-2...X...X+3相连接及通过通过一个选出的字线-这里是字线x与字线电压VWL相连接,及其它的字线与参考电位GND相连接。由于不是所有的与字线x连接的单元电阻,而仅是与被寻址的位导线y相连接的单元电阻R被连接到共用的导线L上,故除开关S外所有的开关S-2...S+3均打开。
对于由多个位导线及字线组成的单元区的区域或对于整个的单元区设有估值电路及连接其后的决定级E,后者由估值电路的输出电压产生相应的数据电平D。
实际的估值电路具有一个运算放大器OP1,它的输出连接到输出端VOUT及通过一个反馈电阻RG反馈连接到反相输入端,及其非反相输入端与参考电位连接。该运算放大器OP1的反相输入端与汇流线L相连接,因此在该例中字线电压VWL通过转换开关US、选出的单元电阻R及闭合的开关S与反相输入端相连接,及由导线L流出相应的单元电流I。单元电阻R与存储的信息相关及由下式描述:
R= R*(1±d),
式中R为平均电阻及d为与信息相关的相对电阻变化,后者的量级例如为百分之几。在本发明中将电流I与平均电流 I相减及仅是该电流差值I- I到达由电阻RG反馈的运算放大器OP1的反相输入端。平均电流 I由一个参考电阻RREF及一个参考电压VREF构成,其中电压VREF具有与字线电压VWL不同的符号。参考电阻RREF及参考电压VREF必需这样地取值,即在单元电阻R=R及字线电压VWL时,电流I等于 I,及由此输出电压等于零。
在此情况下,参考电压VREF可有利地借助通常反相的运算放大器电路根据字线电压VWL来产生,也可以此方式相反地由预定参考电压VREF来产生字线电压VWL。
参考电阻RREF可有利地由与单元电阻相同的材料组成。在参考电阻RREF与单元电阻相同的几何布置时可提供的仅是电阻R= R*(1+d),而不是平均电阻 R。为此在最简单的情况下将具有逻辑输入1的一个单元的单元电阻及具有逻辑输入0的一个单元的单元电阻相串联,由此提供一个具有值2* R的参考电阻及需要相应的参考电阻RREF。通过两个这样的串联电路相并联,便可用简单的方式产生参考电阻RREF= R。为了得到对尽可能多的单元优化的平均值,可以并联其它这样的串联电路,由此使参考电阻及相应地为此所需的参考电压变低。

Claims (4)

1.一种具有单元电阻及对单元电阻估值的装置的磁电阻存储器,
其中每个单元电阻(R)的第一端子通过开关(US)与字线电压(VWL)相连接,及每个单元电阻的第二端子通过另一开关(S)与一个导线节点(L)相连接,
其中导线节点通过一个参考电阻(RREF)与参考电压源(VREF)相连接,使得流出导线节点的单元电流(I)减去一个平均电流(I),及
其中一个放大器(OP1,RG)将各单元电流与平均电流的差值转换成一个作为估值信号的电压(VOUT)。
2.根据权利要求1所述的存储器,
其中参考电阻(RREF)由具有不同信息内容的各个单元的单元电阻的组合构成。
3.根据权利要求2所述的存储器,
其中参考电阻是包括具有不同信息内容的各个单元的单元电阻的单一串联电路,或者是包括这种串联电路的并联电路。
4.根据以上权利要求的其中之一所述的存储器,
其中借助一个反相的电压放大电路,参考电压源(VREF)由字线电压(VWL)构成或相反地字线电压由参考电压构成。
CNB008057982A 1999-03-30 2000-03-13 具有单元电阻及对单元电阻估值的装置的磁电阻存储器 Expired - Fee Related CN1162863C (zh)

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DE19914488A DE19914488C1 (de) 1999-03-30 1999-03-30 Vorrichtung zur Bewertung der Zellenwiderstände in einem magnetoresistiven Speicher
DE19914488.5 1999-03-30

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Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10030234C2 (de) * 2000-06-20 2003-03-27 Infineon Technologies Ag Integrierter Speicher mit Speicherzellen mit magnetoresistivem Speichereffekt
DE10043440C2 (de) * 2000-09-04 2002-08-29 Infineon Technologies Ag Magnetoresistiver Speicher und Verfahren zu seinem Auslesen
JP4712204B2 (ja) * 2001-03-05 2011-06-29 ルネサスエレクトロニクス株式会社 記憶装置
DE10112281B4 (de) 2001-03-14 2006-06-29 Infineon Technologies Ag Leseverstärkeranordnungen für eine Halbleiterspeichereinrichtung
JP5355666B2 (ja) * 2001-04-26 2013-11-27 ルネサスエレクトロニクス株式会社 薄膜磁性体記憶装置
JP2003016777A (ja) 2001-06-28 2003-01-17 Mitsubishi Electric Corp 薄膜磁性体記憶装置
US6385079B1 (en) * 2001-08-31 2002-05-07 Hewlett-Packard Company Methods and structure for maximizing signal to noise ratio in resistive array
DE10149737A1 (de) 2001-10-09 2003-04-24 Infineon Technologies Ag Halbleiterspeicher mit sich kreuzenden Wort- und Bitleitungen, an denen magnetoresistive Speicherzellen angeordnet sind
KR100513370B1 (ko) * 2001-12-07 2005-09-07 주식회사 하이닉스반도체 자기 저항 램
JP4049604B2 (ja) * 2002-04-03 2008-02-20 株式会社ルネサステクノロジ 薄膜磁性体記憶装置
KR100448853B1 (ko) 2002-05-20 2004-09-18 주식회사 하이닉스반도체 마그네틱 램
EP1516175B1 (de) * 2002-06-24 2006-11-02 Siemens Aktiengesellschaft Biosensor-array und verfahren zum betreiben eines biosensor-arrays
US6829188B2 (en) * 2002-08-19 2004-12-07 Micron Technology, Inc. Dual loop sensing scheme for resistive memory elements
WO2004095464A1 (ja) 2003-04-21 2004-11-04 Nec Corporation データの読み出し方法が改善された磁気ランダムアクセスメモリ
US6816403B1 (en) * 2003-05-14 2004-11-09 International Business Machines Corporation Capacitively coupled sensing apparatus and method for cross point magnetic random access memory devices
US7042757B2 (en) * 2004-03-04 2006-05-09 Hewlett-Packard Development Company, L.P. 1R1D MRAM block architecture
DE102004045219B4 (de) * 2004-09-17 2011-07-28 Qimonda AG, 81739 Anordnung und Verfahren zum Auslesen von Widerstandsspeicherzellen
DE102004056911B4 (de) * 2004-11-25 2010-06-02 Qimonda Ag Speicherschaltung sowie Verfahren zum Auslesen eines Speicherdatums aus einer solchen Speicherschaltung
US8254195B2 (en) * 2010-06-01 2012-08-28 Qualcomm Incorporated High-speed sensing for resistive memories
KR20130021739A (ko) 2011-08-23 2013-03-06 삼성전자주식회사 저항성 메모리 장치, 이의 테스트 시스템 및 저항성 메모리 장치의 테스트 방법
US9070424B2 (en) * 2012-06-29 2015-06-30 Samsung Electronics Co., Ltd. Sense amplifier circuitry for resistive type memory
KR20140028481A (ko) 2012-08-29 2014-03-10 에스케이하이닉스 주식회사 쓰기 전류를 측정할 수 있는 반도체 메모리 장치 및 쓰기 전류 측정 방법
KR101447819B1 (ko) * 2013-05-08 2014-10-10 한양대학교 산학협력단 마그네틱 메모리의 테스트 방법
US9281041B1 (en) 2014-12-16 2016-03-08 Honeywell International Inc. Delay-based read system for a magnetoresistive random access memory (MRAM) bit
EP3424330B1 (de) 2017-07-03 2021-01-06 Albert Handtmann Maschinenfabrik GmbH & Co. KG Aufhängeeinheit mit schräg gestellter führungsschiene

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5173873A (en) * 1990-06-28 1992-12-22 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration High speed magneto-resistive random access memory
US6021065A (en) * 1996-09-06 2000-02-01 Nonvolatile Electronics Incorporated Spin dependent tunneling memory
US5493533A (en) * 1994-09-28 1996-02-20 Atmel Corporation Dual differential trans-impedance sense amplifier and method
US5654566A (en) * 1995-04-21 1997-08-05 Johnson; Mark B. Magnetic spin injected field effect transistor and method of operation

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JP3740369B2 (ja) 2006-02-01
KR100457264B1 (ko) 2004-11-16
DE19914488C1 (de) 2000-05-31
JP2002541608A (ja) 2002-12-03
TW466485B (en) 2001-12-01
US20020093848A1 (en) 2002-07-18
US6512688B2 (en) 2003-01-28
EP1166275B1 (de) 2003-09-03
EP1166275A1 (de) 2002-01-02
DE50003538D1 (de) 2003-10-09
CN1347560A (zh) 2002-05-01
WO2000060601A1 (de) 2000-10-12

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