CN1145169C - 对磁电阻存储器中单元电阻估值的装置 - Google Patents

对磁电阻存储器中单元电阻估值的装置 Download PDF

Info

Publication number
CN1145169C
CN1145169C CNB008057990A CN00805799A CN1145169C CN 1145169 C CN1145169 C CN 1145169C CN B008057990 A CNB008057990 A CN B008057990A CN 00805799 A CN00805799 A CN 00805799A CN 1145169 C CN1145169 C CN 1145169C
Authority
CN
China
Prior art keywords
resistance
amplifier
reference unit
cell
current drain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB008057990A
Other languages
English (en)
Other versions
CN1346492A (zh
Inventor
R·特维斯
W·韦伯
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Publication of CN1346492A publication Critical patent/CN1346492A/zh
Application granted granted Critical
Publication of CN1145169C publication Critical patent/CN1145169C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/14Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
    • G11C11/15Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1653Address circuits or decoders
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1653Address circuits or decoders
    • G11C11/1655Bit-line or column circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1653Address circuits or decoders
    • G11C11/1657Word-line or row circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1673Reading or sensing circuits or methods

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Hall/Mr Elements (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Measuring Magnetic Variables (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)

Abstract

本发明涉及一种对磁电阻存储器中单元电阻估值的装置,其中设有多个参考单元,两个相邻的参考单元电阻可与字导线电压相连接,选出的位导线通过选出的单元电阻及两个邻近参考位导线通过参考单元电阻可与字导线电压相连接,参考单元电阻与反馈放大器构成求和放大器,单元电阻与另一反馈放大器构成具有相同放大系数的放大器,各放大器的输出端与比较器的输入端相连接,该比较器的输出端输出一个与相应单元电阻相关的估值信号。本发明以简单的方式借助两个相邻的参考单元实现了高的估值可靠性。

Description

对磁电阻存储器中单元电阻估值的装置
技术领域
本发明涉及借助一个参考电阻对磁电阻存储单元(MRAM)中磁致变化的电阻估值的装置。这种存储单元典型地具有一个软磁层及一个硬磁层,它们是导电的并彼此通过一个隧道氧化物隔开,其中隧道几率及由此电阻与两个层的极化方向有关。
背景技术
这样一种装置已由美国专利US5,173,873,尤其是由其图4公知,其中每列仅引入一个用于对存储单元估值的参考单元,及由此可快速及损耗功率很小地进行估值。
由于制造的公差在整个存储区域上各单元电阻不是恒定的,尤其在大存储单元区中易于出现错误估值,因为由于存储信息变化引起的一个存储单元的相对电阻变化权是很小的。
发明内容
本发明的任务在于,给出一种对磁电阻存储器(MRAM)中单元电阻估值的装置,在该估值装置中将以尽可能小的附加成本,尤其对于大MRAMs达到尽可能高的估值可靠性。
根据本发明该任务将通过以下技术方案来解决。
根据本发明的一种对磁电阻存储器中单元电阻估值的装置,其中在单元区中设有多个具有单元电阻的存储单元及多个具有参考单元电阻的参考单元,其中除一个选出的单元电阻外还同时有两个相邻的参考单元电阻可与一个字导线电压相连接,其中一个选出的位导线通过选出的单元电阻及相应地同时两个邻近参考位导线通过参考单元电阻可与一个字导线电压相连接,其中参考单元电阻与一个反馈放大器一起构成一个求和放大器,其中相应的单元电阻与另一反馈放大器一起构成具有与求和放大器相同放大系数的一个放大器,及,其中求和放大器的输出端及另一放大器的输出端各与一个比较器的一个输入端相连接,及该比较器的输出端输出一个与相应单元电阻相关的估值信号。
本发明的一个有利构型是,在根据本发明的对磁电阻存储器中单元电阻估值的装置中,相应参考单元电阻及求和放大器的反馈电阻之间的连接节点通过第一电流漏极与参考电位相连接,其中相应寻址单元电阻及具有双倍放大倍数的放大器的另一反馈电阻之间的连接节点通过第二电流漏极与参考电位相连接,其中电流漏极具有的电流为另一电流漏极的两倍,并且另一电流漏极的电流相应于字导线电压的值除以单元电阻的值。
本发明的实质在于,在一个单元区中,譬如在均匀间隔的行中设置参考单元,及每个单元电阻与两个邻近的参考单元电阻的平均值相比较,其中每个参考单元电阻被用于两组单元电阻的比较。
附图说明
图1示意地示出根据本发明的对磁电阻存储器中单元电阻估值的装置的一个优选实施例的结构。
具体实施方式
以下将借助附图来详细说明本发明的一个优选实施例。该附图表示位导线y+4...y...y-6及字导线x-2...X...X+3的一个矩阵形式的结构,它描述由一个磁电阻存储器的一个单元区组成的片段。在每个位导线及每个字导线之间设有一个磁致电阻的电阻,它通常由彼此叠放并通过一个隧道氧化物隔开的软磁区域及硬磁区组成。在图示的单元区中,譬如所有与位导线y+3相连接的单元电阻及所有与位导线y-4相连接的单元电阻构成参考单元电阻,这里与其它的单元电阻相比它们被画得较粗。在选出的字导线x及选出的位导线y之间具有一个选出的单元电阻R,及在同一字导线及两个邻近的参考位导线y+3及y-4之间设有参考单元电阻RR1及RR2。这里字导线的选择或寻址例如是借助转换开关US-2...US+3来实现的,这些转换开关依次与字导线x-2...X...X+3相连接及总是通过一个字导线、这里是字导线x与字导线电压VWL相连接,及其它的字导线与参考电位GND相连接。参考位导线、如y+3,y-4通过开关如S-4及S+3被连接到共用的参考导线RL上,因为它们最靠近被寻址的单元电阻R。被选出的位导线y通过开关S连接到共用导线L上。由于不是所有的与字导线x连接的单元电阻,而仅是与被寻址的位导线y相连接的单元电阻R被连接到共用导线L上,故所有其它的与常规位导线及共用导线L连接的开关、如S-6...S+3均打开。参考单元电阻RR1及RR2与通过电阻RG2反馈的运算放大器OP2一起构成一个反相求和的放大器,在其输出端输出一个电压,该电压与由两个单元电阻RR1及RR2的平均值相关。单元电阻R与通过电阻RG1反馈的运算放大器OP1一起构成一个反相电压放大器,其中反馈电阻RG1具有的电阻值为运算放大器OP2的反馈电阻RG2的两倍。因此形成一个可与求和放大器的参考信号相比较的信号,因为通过两个参考电阻比通过单个电阻R提供两倍的电流。反相求和放大器OP2的输出电压输入到一个比较器COMP的反相输入端及反相放大器OP1的输出电压输入到该比较器的非反相输入端,在其输出端产生出一个与相应单元电阻相关的估值信号VOUT。通过这种连接可有利地使用普通的比较器。
常规位导线及参考位导线之间的数目比是根据参数波动及相对电阻变化来选择的,因此不会出现错误估值。这里,在该例中表示每8个位导线有一个参考位电线。
在上述实施例的一个有利构型中,附加地设有第一电流漏极(Stromsenke)I2及第二电流漏极I1,其中相应参考单元电阻及求和放大器的反馈电阻RG2之间的连接节点通过第一电流漏极I2与参考电位GND相连接,及相应寻址单元电阻R及具有双倍放大倍数的放大器的反馈电阻RG1之间的连接节点通过第二电流漏极I1与参考电位GND相连接,其中电流漏极I2具有的电流为另一电流漏极I1的两倍。该措施用于:当估值过程时这两个运算放大器OP1及OP2可工作在一个合适的工作点上,即以很小DC偏移的输出电压工作。对此必需遵守条件:I1=VWL/R,其中通过电阻R及电流漏极I1或通过参考电阻RR1和RR2及电流漏极I2必需对相应的公共节点供给具有相反符号的电流。

Claims (2)

1.一种对磁电阻存储器中单元电阻估值的装置,
其中在单元区中设有多个具有单元电阻(R)的存储单元及多个具有参考单元电阻(RR1,RR2)的参考单元,
其中除一个选出的单元电阻(R)外还同时有两个相邻的参考单元电阻(RR1,RR2)可与一个字导线电压(VWL)相连接,
其中一个选出的位导线(y)通过选出的单元电阻(R)及相应地同时两个邻近参考位导线(y+3,y-4)通过参考单元电阻(RR1,RR2)可与一个字导线电压(VML)相连接,
其中参考单元电阻与一个反馈放大器(OP2,RG2)一起构成一个求和放大器,
其中相应的单元电阻与另一反馈放大器(OP1,RG1)一起构成具有与求和放大器相同放大系数的一个放大器,及其中求和放大器的输出端及另一放大器的输出端各与一个比较器的一个输入端相连接,及该比较器的输出端输出一个与相应单元电阻相关的估值信号(VOUT)。
2.根据权利要求1所述的对磁电阻存储器中单元电阻估值的装置,
其中,相应参考单元电阻及求和放大器的反馈电阻(RG2)之间的连接节点通过第一电流漏极(I2)与参考电位(GND)相连接,其中相应寻址单元电阻(R)及具有双倍放大倍数的放大器的另一反馈电阻(RG1)之间的连接节点通过第二电流漏极(I1)与参考电位相连接,其中电流漏极(I2)具有的电流为另一电流漏极(I1)的两倍,并且另一电流漏极的电流相应于字导线电压(VWL)的值除以单元电阻(R)的值。
CNB008057990A 1999-03-30 2000-03-13 对磁电阻存储器中单元电阻估值的装置 Expired - Fee Related CN1145169C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19914489.3 1999-03-30
DE19914489A DE19914489C1 (de) 1999-03-30 1999-03-30 Vorrichtung zur Bewertung der Zellenwiderstände in einem magnetoresistiven Speicher

Publications (2)

Publication Number Publication Date
CN1346492A CN1346492A (zh) 2002-04-24
CN1145169C true CN1145169C (zh) 2004-04-07

Family

ID=7902996

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB008057990A Expired - Fee Related CN1145169C (zh) 1999-03-30 2000-03-13 对磁电阻存储器中单元电阻估值的装置

Country Status (8)

Country Link
US (1) US6490192B2 (zh)
EP (1) EP1166274B1 (zh)
JP (1) JP3740368B2 (zh)
KR (1) KR100457265B1 (zh)
CN (1) CN1145169C (zh)
DE (2) DE19914489C1 (zh)
TW (1) TW466484B (zh)
WO (1) WO2000060600A1 (zh)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6185143B1 (en) * 2000-02-04 2001-02-06 Hewlett-Packard Company Magnetic random access memory (MRAM) device including differential sense amplifiers
JP4577334B2 (ja) * 2000-11-27 2010-11-10 株式会社日立製作所 半導体装置
US6392923B1 (en) * 2001-02-27 2002-05-21 Motorola, Inc. Magnetoresistive midpoint generator and method
JP5355666B2 (ja) * 2001-04-26 2013-11-27 ルネサスエレクトロニクス株式会社 薄膜磁性体記憶装置
DE10149737A1 (de) 2001-10-09 2003-04-24 Infineon Technologies Ag Halbleiterspeicher mit sich kreuzenden Wort- und Bitleitungen, an denen magnetoresistive Speicherzellen angeordnet sind
EP1321944B1 (en) * 2001-12-21 2008-07-30 Kabushiki Kaisha Toshiba Magnetic random access memory
US6839269B2 (en) 2001-12-28 2005-01-04 Kabushiki Kaisha Toshiba Magnetic random access memory
US6512689B1 (en) * 2002-01-18 2003-01-28 Motorola, Inc. MRAM without isolation devices
JP2003242771A (ja) 2002-02-15 2003-08-29 Toshiba Corp 半導体記憶装置
JP4049604B2 (ja) * 2002-04-03 2008-02-20 株式会社ルネサステクノロジ 薄膜磁性体記憶装置
KR100448853B1 (ko) 2002-05-20 2004-09-18 주식회사 하이닉스반도체 마그네틱 램
KR100506932B1 (ko) * 2002-12-10 2005-08-09 삼성전자주식회사 기준 셀들을 갖는 자기 램 소자 및 그 구조체
US6985383B2 (en) * 2003-10-20 2006-01-10 Taiwan Semiconductor Manufacturing Company, Ltd. Reference generator for multilevel nonlinear resistivity memory storage elements
US7440314B2 (en) * 2004-03-05 2008-10-21 Nec Corporation Toggle-type magnetoresistive random access memory
US7203112B2 (en) * 2004-08-05 2007-04-10 Taiwan Semiconductor Manufacturing Co., Ltd. Multiple stage method and system for sensing outputs from memory cells
DE102004045219B4 (de) * 2004-09-17 2011-07-28 Qimonda AG, 81739 Anordnung und Verfahren zum Auslesen von Widerstandsspeicherzellen
US7286429B1 (en) 2006-04-24 2007-10-23 Taiwan Semiconductor Manufacturing Company, Ltd. High speed sensing amplifier for an MRAM cell
JP5046194B2 (ja) 2006-08-07 2012-10-10 日本電気株式会社 ワード線駆動電位可変のmram
KR101109555B1 (ko) * 2010-06-16 2012-01-31 이화여자대학교 산학협력단 불휘발성 메모리 장치 및 그것의 읽기 방법
EP2612357A4 (en) 2010-08-30 2015-03-04 Hewlett Packard Development Co MULTILAYER MEMORY MATRIX
US9466030B2 (en) 2012-08-30 2016-10-11 International Business Machines Corporation Implementing stochastic networks using magnetic tunnel junctions

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4939693A (en) * 1989-02-14 1990-07-03 Texas Instruments Incorporated BiCMOS static memory with improved performance stability
US5173873A (en) * 1990-06-28 1992-12-22 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration High speed magneto-resistive random access memory
US5493533A (en) * 1994-09-28 1996-02-20 Atmel Corporation Dual differential trans-impedance sense amplifier and method
US5640343A (en) * 1996-03-18 1997-06-17 International Business Machines Corporation Magnetic memory array using magnetic tunnel junction devices in the memory cells
DE19744095A1 (de) * 1997-10-06 1999-04-15 Siemens Ag Speicherzellenanordnung
DE10010457A1 (de) * 2000-03-03 2001-09-20 Infineon Technologies Ag Integrierter Speicher mit Speicherzellen mit magnetoresistivem Speichereffekt
JP3800925B2 (ja) * 2000-05-15 2006-07-26 日本電気株式会社 磁気ランダムアクセスメモリ回路
DE10032274A1 (de) * 2000-07-03 2002-01-24 Infineon Technologies Ag Integrierte Speicher mit Speicherzellen mit magnetoresistivem Speichereffekt
US6767655B2 (en) * 2000-08-21 2004-07-27 Matsushita Electric Industrial Co., Ltd. Magneto-resistive element

Also Published As

Publication number Publication date
TW466484B (en) 2001-12-01
US20020071306A1 (en) 2002-06-13
KR100457265B1 (ko) 2004-11-16
JP2002541607A (ja) 2002-12-03
US6490192B2 (en) 2002-12-03
DE50000926D1 (de) 2003-01-23
EP1166274A1 (de) 2002-01-02
KR20020012166A (ko) 2002-02-15
EP1166274B1 (de) 2002-12-11
CN1346492A (zh) 2002-04-24
WO2000060600A1 (de) 2000-10-12
DE19914489C1 (de) 2000-06-08
JP3740368B2 (ja) 2006-02-01

Similar Documents

Publication Publication Date Title
CN1145169C (zh) 对磁电阻存储器中单元电阻估值的装置
CN1162863C (zh) 具有单元电阻及对单元电阻估值的装置的磁电阻存储器
CN1213453C (zh) 包含阻塞寄生路径电流的共享设备的交叉点存储器阵列
US8320166B2 (en) Magnetic random access memory and method of reading data from the same
US6278631B1 (en) Magnetic random access memory array divided into a plurality of memory banks
US7359235B2 (en) Separate write and read access architecture for a magnetic tunnel junction
TW520499B (en) MTJ MRAM series-parallel architecture
TW584851B (en) MTJ MRAM parallel-parallel architecture
US6477077B2 (en) Non-volatile memory device
JP2002533863A (ja) 参照メモリ・アレイを有する磁気ランダム・アクセス・メモリ
JP2001229665A (ja) スタックされたmtjセル・メモリの検出方法および装置
US7839702B2 (en) Three-dimensional non-volatile register with an oxygen-ion-based memory element and a vertically-stacked register logic
US20020000597A1 (en) Nonvolatile semiconductor memory device and method for recording information
US20060038210A1 (en) Multi-sensing level MRAM structures
US20060039183A1 (en) Multi-sensing level MRAM structures
US5923583A (en) Ferromagnetic memory based on torroidal elements
US5864498A (en) Ferromagnetic memory using soft magnetic material and hard magnetic material
JPH10247382A (ja) マルチピースセルおよびそのセルを含む磁気ランダムアクセスメモリアレイ
CN1326149C (zh) 集成磁阻半导体存储器装置
KR20030088126A (ko) 집적 자기 저항성 반도체 메모리 장치
US11742020B2 (en) Storage device
US6826077B2 (en) Magnetic random access memory with reduced parasitic currents
US20040240266A1 (en) Magnetic random access memory using memory cells with rotated magnetic storage elements
US20040100836A1 (en) Magnetic memory configuration
US10783946B2 (en) Semiconductor memory device including memory cell arrays

Legal Events

Date Code Title Description
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C06 Publication
PB01 Publication
C14 Grant of patent or utility model
GR01 Patent grant
C41 Transfer of patent application or patent right or utility model
C56 Change in the name or address of the patentee

Owner name: INFINEON TECHNOLOGIES AG

Free format text: FORMER NAME: INFENNIAN TECHNOLOGIES AG

CP01 Change in the name or title of a patent holder

Address after: Munich, Germany

Patentee after: Infineon Technologies AG

Address before: Munich, Germany

Patentee before: INFINEON TECHNOLOGIES AG

TR01 Transfer of patent right

Effective date of registration: 20130705

Address after: Munich, Germany

Patentee after: QIMONDA AG

Address before: Munich, Germany

Patentee before: Infineon Technologies AG

C41 Transfer of patent application or patent right or utility model
TR01 Transfer of patent right

Effective date of registration: 20160114

Address after: German Berg, Laura Ibiza

Patentee after: Infineon Technologies AG

Address before: Munich, Germany

Patentee before: QIMONDA AG

CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20040407

Termination date: 20160313