CN115812254A - 一种半导体器件及其制造方法 - Google Patents

一种半导体器件及其制造方法 Download PDF

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Publication number
CN115812254A
CN115812254A CN202080102849.3A CN202080102849A CN115812254A CN 115812254 A CN115812254 A CN 115812254A CN 202080102849 A CN202080102849 A CN 202080102849A CN 115812254 A CN115812254 A CN 115812254A
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China
Prior art keywords
diamond
substrate
trench
groove
grooves
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CN202080102849.3A
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胡彬
段焕涛
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Publication of CN115812254A publication Critical patent/CN115812254A/zh
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • H01L23/3677Wire-like or pin-like cooling fins or heat sinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3732Diamonds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1602Diamond
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66446Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003Nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

本申请实施例公开了一种半导体器件及其制造方法,半导体器件可以包括衬底,以及位于衬底上的外延层和电极,其中衬底中具有纵向贯穿衬底的金刚石结构,金刚石结构在纵向上可以分为第一金刚石部分和第一金刚石部分下方的第二金刚石部分,第一金刚石部分和第二金刚石部分的横向尺寸不同,由于金刚石结构的导热性能好,贯穿衬底的金刚石结构可以构成纵向的导热通道,提高半导体器件的散热性能,利于半导体器件的高功率性能的有效发挥。此外,第一金刚石部分和第二金刚石部分的横向尺寸不同,则利于控制第一金刚石部分和第二金刚石部分的结构,同时可以兼顾散热性能和外延层之间的晶格匹配,利于得到更高质量的外延层,利于得到高性能的半导体器件。

Description

PCT国内申请,说明书已公开。

Claims (24)

  1. PCT国内申请,权利要求书已公开。
CN202080102849.3A 2020-10-30 2020-10-30 一种半导体器件及其制造方法 Pending CN115812254A (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2020/125328 WO2022088055A1 (zh) 2020-10-30 2020-10-30 一种半导体器件及其制造方法

Publications (1)

Publication Number Publication Date
CN115812254A true CN115812254A (zh) 2023-03-17

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ID=81381596

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CN202080102849.3A Pending CN115812254A (zh) 2020-10-30 2020-10-30 一种半导体器件及其制造方法

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US (1) US20230268243A1 (zh)
EP (1) EP4213184A4 (zh)
JP (1) JP2023547925A (zh)
CN (1) CN115812254A (zh)
WO (1) WO2022088055A1 (zh)

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8575657B2 (en) * 2012-03-20 2013-11-05 Northrop Grumman Systems Corporation Direct growth of diamond in backside vias for GaN HEMT devices
US9685513B2 (en) * 2012-10-24 2017-06-20 The United States Of America, As Represented By The Secretary Of The Navy Semiconductor structure or device integrated with diamond
US9196703B2 (en) * 2013-08-22 2015-11-24 Northrop Grumman Systems Corporation Selective deposition of diamond in thermal vias
US9893058B2 (en) * 2015-09-17 2018-02-13 Semiconductor Components Industries, Llc Method of manufacturing a semiconductor device having reduced on-state resistance and structure
WO2018004565A1 (en) * 2016-06-29 2018-01-04 Intel Corporation Techniques for forming iii-n semiconductor devices with integrated diamond heat spreader
JP6759885B2 (ja) * 2016-09-06 2020-09-23 富士通株式会社 半導体装置及び半導体装置の製造方法
CN110223918B (zh) * 2019-04-23 2021-01-15 西安电子科技大学 一种孔径式复合衬底氮化镓器件及其制备方法
CN111211161A (zh) * 2020-01-15 2020-05-29 中山大学 一种双向散热的纵向氮化镓功率晶体管及其制备方法

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EP4213184A1 (en) 2023-07-19
WO2022088055A1 (zh) 2022-05-05
JP2023547925A (ja) 2023-11-14
US20230268243A1 (en) 2023-08-24
EP4213184A4 (en) 2023-11-08

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