CN1155159A - 栅电极及其形成方法 - Google Patents

栅电极及其形成方法 Download PDF

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CN1155159A
CN1155159A CN96121474A CN96121474A CN1155159A CN 1155159 A CN1155159 A CN 1155159A CN 96121474 A CN96121474 A CN 96121474A CN 96121474 A CN96121474 A CN 96121474A CN 1155159 A CN1155159 A CN 1155159A
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gate electrode
amorphous silicon
silicon layer
insulating film
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CN1172378C (zh
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崔在成
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SK Hynix Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
    • H01L21/28052—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a silicide layer formed by the silicidation reaction of silicon with a metal layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
    • H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
    • H01L29/4933—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a silicide layer contacting the silicon layer, e.g. Polycide gate

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Abstract

一种在非晶硅上层叠有硅化钨的构造的栅电极，包括在半导体衬底上部形成的栅绝缘膜；在所述栅绝缘膜上部由乙硅烷气体形成的非晶硅层；在所述非晶硅层上部形成的、含微量质杂的硅化钨层，所述非晶硅层具有可防止所述杂质向栅绝缘膜侧渗透的粒度尺寸。

Description

栅电极及其形成方法
本发明涉及半导体器件所用的晶体管栅电极，尤其是涉及在非晶硅上层叠硅化钨结构的栅电极。
通常，MOS晶体管的栅电极是在先于源极和漏极，首先形成栅绝缘膜的半导体衬底上形成的。所述栅电极是由多晶硅形成的，为提高其性能，或者用非晶质的多晶硅代替，或者在多晶硅上层叠硅化钨层。
图2是已有的实施例，是具有在多晶硅层上层叠硅化钨的结构的半导体元件的局部剖视图。
参看图2，已有的栅极结构是，在半导体衬底10的表面形成栅氧化膜(SiO2)12，在栅氧化膜上部依次层叠多晶硅层14和硅化钨层16。
多晶硅是具有结晶性的物质，由被晶界等分隔的小的单晶区域(粒度)等构成。淀积时，可以获得具有非晶性和结晶性的多晶硅膜等；淀积后，通过高温处理，展现结晶构造。
主要是通过化学汽相淀积(CVD)法来形成多晶硅层14。此时，对于多晶硅，采用硅烷(SiH4)气体作为源气体。作为化学汽相淀积法的应用结果，形成的多晶硅的粒度为0.2～0.3μm大小。
硅化钨层16可通过化学汽相淀积法或物理淀积法有选择地形成。采用化学汽相淀积法时，半导体衬底10上具有用于形成硅化钨的多晶硅层14的对象层，并在含有WF6气体的气氛中。此时，所述WF6气体所含的少量氟原子渗入所述多晶硅层14的表面层。结果，在硅钨层16中存在少量的氟原子。
所述硅化钨层16中所含的所述氟原子，在后续热处理工序中，大部分经由所述多晶硅层14，渗入所述栅氧化膜12。这是因为构成所述多晶硅层14的结构粒度的尺寸非常小，存在很多所述氟原子的渗透路径。其结果，所述栅氧化膜12的厚度增大，而且所述栅氧化膜12的电特性显著变劣。
另一方面，在非晶硅上形成硅化钨时，形成的非晶硅粒度比多晶硅时要大，但由于这些粒度的尺寸小至0.5μm的程度，所以形成硅化钨时依然发生氟原子渗透的问题。
因此，本发明的目的是提供一种由多晶硅和硅化钨的叠层构造形成的栅电极，能防止因氟原子的渗透而导致栅氧化膜的电特性变劣和厚度增大的栅电极及其形成方法。
为实现上述目的，本发明提供一种栅电极，具有在半导体衬底上部形成的栅绝缘膜，在所述栅绝缘膜上部由乙硅烷气体形成的非晶硅层和在所述非晶硅层上部形成的、含微量杂质的硅化钨层，它的特点是所述非晶硅层具有可防止所述杂质向栅绝缘膜侧渗透的粒度尺寸。
根据本发明，栅电极具有在栅氧化膜上部形成的、含很大的结构颗粒的非晶质的多晶硅层。所述含有大结构颗粒的非晶质的多晶硅层，可使杂质向所述栅氧化膜侧渗透的通路变小。
附图的简要说明如下：
图1是本发明涉及的实施例，是具有在多晶硅层上层叠硅化钨结构的栅电极剖视图。
图2是已有的实施例，是具有在多晶硅层上层叠硅化钨结构的栅电极剖视图。
以下，参照附图详细说明本发明的优选实施例。
参照图1，在半导体衬底20的上部形成栅绝缘膜22，在所述栅绝缘膜22的上部，层叠含大的结构颗粒的非晶硅层24和含微量的氟原子的硅化钨层26。
以乙硅烷(Si2H6)为源气体，通过化学汽相淀积法，形成所述非晶硅层24，其结构粒度尺寸约为2～3μm，与结晶硅层叠的已有结构相比，其粒度大到10倍的程度。因此，所述非晶硅层24与已有的栅电极所使用的多晶硅层相比，杂质向所述栅绝缘膜22侧的渗透通路至少能减少到1/10的程度。结果，所述栅绝缘膜22的厚度无需增大，而且所述栅绝缘膜22的电特性也不会发生大幅度地下降。本发明适用的硅化钨以WSi2为好。
以下，说明所述结构的栅电极的形成过程。
在O2气体中暴露所述半导体衬底20，在所述半导体衬底20表面生长氧化物(SiO2)，由此形成所述栅绝缘膜24。
由此，用450～580℃的温度，使形成有所述栅绝缘膜22的所述半导体衬底20暴露于预定压力的乙硅烷(Si2H6)气体，由此形成含有2～3μm大小的结构颗粒的所述非晶硅层24。所述乙硅烷气体反应时的压力一般设定为0.1～数十个Torr的程度。
最后，使形成有非晶硅层24的半导体衬底20暴露于WF6气体，所述WF6气体所含钨原子与所述多晶硅层14反应，由此形成所述硅化钨层26。所述硅化钨层26形成时，所述WF6气体所含的少量氟原子28渗入所述非晶硅层24的表面层。结果，所述硅化钨层26中存在少量的氟原子。
所述硅化钨层26中所含的所述氟原子28，在后续热处理时，经由所述非晶硅层24向所述栅绝缘膜22侧渗透的量明显减少。这是因为，构成所述非晶硅层24的结构颗粒非常大，向所述栅绝缘膜22侧的渗透通路减少的缘故。
结果，使所述栅绝缘膜22的厚度的增大最小化，而且使所述栅绝缘膜22的电特性的下降最小化。所述栅绝缘膜22的增大被抑制在5～10以下，与已有的栅电极相比，可改善达200％的程度。而且，根据施加一定电流的试验结果，与已有的栅电极相比，所述栅绝缘膜22的电特性也能提高200％的程度。
如上所述，本发明为在栅氧化膜上依次层叠结晶硅和硅化钨层，形成多边结构的栅电极，通过使用乙硅烷气体，用非晶质的硅代替所述的结晶质的多晶硅，构成尽可能大的结构粒度尺寸，使所述硅化钨层所含的氟原子向所述栅绝缘膜侧的渗透最小化。据此，本发明的优点是可使所述栅绝缘膜厚度的增加最小化，还可使所述栅绝缘膜的电特性下降最小化。
这里，尽管结合附图对本发明的特定实施例做了说明，但本领域的技术人员可以对此做出修改及变形。因此，以下权利要求书的范围应理解为包含属于本发明的精神及范围的全部变化及重现。

Claims (7)

1、一种栅电极，其特征在于，具有在半导体衬底上部形成的栅绝缘膜；在所述栅绝缘膜上部由乙硅烷气体形成的非晶硅层；在所述非晶硅层上部形成的、含有微量杂质的硅化钨层，所述非晶硅层具有可防止所述杂质向栅绝缘膜侧渗透的粒度尺寸。
2、根据权利要求1所述的栅电极，其特征在于，所述非晶硅层的粒度尺寸是2～3μm。
3、根据权利要求1所述的栅电极，其特征在于，所述杂质是氟元素。
4、一种栅电极的形成方法，其特征在于包括以下工序：
提供在其上形成有栅绝缘膜的半导体衬底；
把半导体衬底安置于化学汽相淀积所用的反应室，并在乙硅烷气氛中进行热处理，再在所述栅绝缘膜上形成非晶硅层；
在所述非晶硅层上形成硅化钨。
5、根据权利要求4所述的栅电极形成方法，其特征在于，所述硅化钨是WSi2。
6、根据权利要求4所述的栅电极形成方法，其特征在于，所述反应室的压力为0.1～数十个Torr。
7、根据权利要求4所述的栅电极形成方法，其特征在于，为了形成多晶硅，所述乙硅烷气体反应的反应室的温度是450～580℃。
CNB961214740A 1995-12-15 1996-12-15 栅电极及其形成方法 Expired - Fee Related CN1172378C (zh)

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CN101572228B (zh) * 2008-04-28 2011-03-23 中芯国际集成电路制造(北京)有限公司 多晶硅薄膜及栅极的形成方法
CN112514031A (zh) * 2018-08-11 2021-03-16 应用材料公司 石墨烯扩散阻挡物

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GB9802940D0 (en) * 1998-02-11 1998-04-08 Cbl Ceramics Ltd Gas sensor
KR100710645B1 (ko) * 2001-05-18 2007-04-24 매그나칩 반도체 유한회사 반도체소자의 금속배선 형성방법

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ATE122176T1 (de) * 1990-05-31 1995-05-15 Canon Kk Verfahren zur herstellung einer halbleiteranordnung mit gatestruktur.
JP2901423B2 (ja) * 1992-08-04 1999-06-07 三菱電機株式会社 電界効果トランジスタの製造方法
US5364803A (en) * 1993-06-24 1994-11-15 United Microelectronics Corporation Method of preventing fluorine-induced gate oxide degradation in WSix polycide structure
JP2560993B2 (ja) * 1993-09-07 1996-12-04 日本電気株式会社 化合物半導体装置の製造方法
US5441904A (en) * 1993-11-16 1995-08-15 Hyundai Electronics Industries, Co., Ltd. Method for forming a two-layered polysilicon gate electrode in a semiconductor device using grain boundaries

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101572228B (zh) * 2008-04-28 2011-03-23 中芯国际集成电路制造(北京)有限公司 多晶硅薄膜及栅极的形成方法
CN112514031A (zh) * 2018-08-11 2021-03-16 应用材料公司 石墨烯扩散阻挡物

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GB2308233A (en) 1997-06-18
GB2308233B (en) 2000-11-15
KR100203896B1 (ko) 1999-06-15
JPH1032334A (ja) 1998-02-03
GB9626113D0 (en) 1997-02-05
KR970053905A (ko) 1997-07-31

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