CN1154177C - 半导体封装及其制造方法 - Google Patents

半导体封装及其制造方法 Download PDF

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CN1154177C
CN1154177C CNB988007932A CN98800793A CN1154177C CN 1154177 C CN1154177 C CN 1154177C CN B988007932 A CNB988007932 A CN B988007932A CN 98800793 A CN98800793 A CN 98800793A CN 1154177 C CN1154177 C CN 1154177C
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chip
circuit substrate
semiconductor packages
resin
flip
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CN1229525A (zh
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石田芳弘
夫
饭沼芳夫
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Citizen Watch Co Ltd
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Abstract

通过倒装芯片连接把比IC芯片小的电路基片1安装在形成了IC芯片5的晶片上。然后，使用密封树脂密封IC芯片5和电路基片1之间的间隔。再切割晶片11，切割成半导体封装20。

Description

半导体封装及其制造方法
本发明涉及小型半导体封装及其制造方法，更详细地说，涉及通过倒装芯片连接将电路基片安装到IC芯片上的IC芯片般大小的半导体封装及其制造方法。
随着半导体封装的小型化、高密度化，已开发出了将裸片面朝下直接安装在基片上的倒装芯片连接(倒装芯片键合)方法。而且，近几年来，装载了与摄象机一体式VTR和便携电话等的裸片尺寸大致相同的小型封装、即所谓CSP(芯片尺寸/规模封装)的便携机器相继问世。由于这样的缘故，市场对CSP的要求正规化，因此，近来，CSP的开发正在飞速发展。
下面，参照图4，作为以往的CSP的半导体封装的制造方法的一个例子，就倒装芯片安装BGA(网格焊球阵列)的制造方法的例子进行概述。此外，在这个以往例子中，只着眼于一个半导体封装进行说明。因此，在这个以往的例子中省略了切割工序的说明。
在以往例子中，首先，在使树脂的基体材料1a的两面形成铜箔6的电路基片1上形成通孔。接着，通过无电解铜电镀和电解铜电镀在该电路基片上形成铜电镀层(未图示)。此外，在通孔的内壁表面也形成该铜电镀层。
然后，使用电镀抗蚀剂(未图示)对电路基片1两面的铜电镀层进行叠层。再使该电镀抗蚀剂顺次暴光和显像，形成图形掩模(未图示)。之后，经过该图形掩模对铜电镀层使用腐蚀液进行图形蚀刻。通过该图形蚀刻，在电路基片1的上面形成作为多列分配的IC连接用电极的键合图形3。另外，通过该图形蚀刻，在电路基片1的底面形成被配置成矩阵形状的焊盘电极4。
接着，进行抗焊剂处理，在集成电路基片100的底面形成抗蚀剂膜(未图示)。该抗蚀剂膜具有露出可锡焊区域的焊盘电极4的开口部分。通过形成该抗蚀剂膜，使电路基片1的底面变得平坦。这样，就制成了在底面矩阵状配置有多个同一形状的可锡焊区域的电路基片1。(图4(a))。
此外，在图4的(c)、(d)～(g)中，省略了焊盘电极4的示图。
接着，将焊锡球9固定在电路基片1的焊盘电极上。在这里，如图4(b)所示那样，将焊剂12涂敷在焊锡球9上。然后，依靠焊剂12将涂敷了焊剂12的焊锡球暂时固定在焊盘电板上(图4(c))。
再者，焊锡球的组成若以重量％来表示，则铅(Pb)为60％，锡(Sn)为40％。以下，将该组成的焊锡表示为“6/4焊锡”。
接着，在IC芯片5上，形成倒装芯片连接用的焊料突点7。再在该焊料突点7上涂敷焊剂12(图4(d))。
然后，将暂时固定了焊锡球9的IC芯片5装载在电路基片1上。这时，使IC芯片5的焊料突点7位于电路基片1的键合焊盘3上。通过该装载，使用涂敷在焊料突点7的焊剂12，将IC芯片5暂时固定在电路基片1上(图4e)。
接下来，通过在加热炉中在210℃～230℃的温度范围对电路基片1和IC芯片5加热，进行回流操作。通过该回流，涂敷在焊锡球9上的焊剂12与焊锡球一起熔化，形成焊锡球电极10。另外，通过该回流，涂敷在焊料突点7上的焊剂12与焊料突点7一起熔化。其结果，经由焊料突点7和键合焊盘3，IC芯片5被倒装芯片连接在电路基片1上(图4(f))。
然后，在树脂密封工序中，为了保护安装在电路基片1中的IC芯片5，就对IC芯片5进行侧压模(side mold)。这时，通过使IC芯片5的表面露出，确保IC芯片5的散热性(图4(g))。
这样，就制成了倒装芯片·上空腔(cavity up)BGA20。
但是，近几年，随着小型便携机器新的小型化的要求，半导体封装的小型化成为当务之急，同时，要求廉价制造半导体封装。为此，试图缩小比IC芯片5还要大的电路基片的占有面积，使其接近IC芯片的占有面积。
但是，若使电路基片的占有面积与IC芯片的占有面积相等，就会存在在电路基片上安装IC芯片时的制造年代被丢失的问题。
再有，若使电路基片的占有面积与IC芯片的占有面积相等，则安装在电路基片上的IC芯片之间几乎没有间隔。其结果，由于IC芯片之间的间隙缘故，则存在着向IC芯片和电路基片之间注入密封树脂变得困难的问题。
因此，涉及本发明的半导体封装及其制造方法，鉴于上述的问题，是以提供可靠性高、生产性好、价格低廉的小型半导体封装及其制造方法为目的。
若依据本发明的半导体封装，在将IC芯片和电路基片进行了倒装芯片连接的半导体封装中，使电路基片的占有面积比IC芯片的占有面积还小。
这样，若依据本发明的半导体封装，则根据IC芯片的大小来决定半导体封装的大小。与此相反，在以往的半导体封装中，根据比IC芯片还要大的电路基片的大小来决定半导体封装的大小。因此，若依据本发明，与以往相比，就能够使半导体封装小型化。
另外，若依据本发明的半导体封装的制造方法，当制造将IC芯片和电路基片相互倒装芯片连接的半导体封装时，包含以下工序，它们是：在晶片上所形成的多个IC芯片中分别形成焊料突点的焊料突点工序；经由焊料突点将占有面积比各个IC芯片的占有面积还要小的电路基片倒装芯片连接到各个IC芯片的键合工序；通过密封树脂对晶片和电路基片之间的间隔进行树脂密封的树脂密封工序；以及，通过切割将晶片切割分成各个IC芯片，由此形成半导体封装的切割工序。这样，若依据涉及本发明的半导体封装的制造方法，则分别将比IC芯片更小的电路基片倒装芯片连接在晶片上所形成的各IC芯片上。在倒装芯片连接时，可以利用晶片的边缘部分作为制造年代(标记)。因此，在倒装芯片连接时，在电路基片一侧，无须设置制造年代。
此外，因为使电路基片缩小到比IC芯片还要小，因此，在晶片上的各IC芯片所安装的电路基片之间可以设置间隙。其结果，从电路基片之间的间隙，能够很容易地向IC芯片和电路基片之间注入密封树脂。
而且，由于密封树脂的注入变得容易，因此能够抑制密封不良现象的发生。其结果，就能够提高所制造的半导体封装的可靠性。
另外，通过抑制密封不良现象的发生，能够提高合格率。其结果，就能够控制半导体封装的制造成本，有助于使其价格变得便宜。
此外，由于使电路基片的大小变得比IC芯片还小，因此，与以往相比，能增加从集成电路基片中选取的每单位面积的电路基片数目。
其结果，能够抑制半导体封装的制造成本，使半导体封装的价格变得便宜。
因此，若依据涉及本发明的半导体封装的制造方法，就能够提供可靠性高、生产性好、价格便宜的小型的半导体封装。
图1是用于说明涉及本发明的第1实施形态的半导体封装构造的断面图。
图2是用于说明构成涉及本发明的第1实施形态的半导体封装电路基片构造的主要部件断面图。
图3的(a)～(e)是用于说明涉及本发明的第2实施形态的半导体封装的制造方法的图，(a)是用于说明焊料突点形成工序的图，(b)是用于说明键合工序的图，(c)是用于说明树脂密封工序的图，(d)是用于说明切割工序的图，(e)是用于说明所制造的半导体封装的图。
图4的(a)～(g)是用于说明以往的半导体封装的制造方法的工序图。
图5是用于说明涉及本发明的第3实施形态的半导体封装构造的断面图，图5(b)及(c)是用于说明构成涉及本发明的第3实施形态的半导体封装的电路基片构造的主要部件断面图。
图6是用于说明涉及本发明的第3实施形态的半导体封装构造的主要部件断面图。
以下，参照附图说明有关本发明的实施形态。
此外，所参照的附图，只不过在能够理解本发明的程度上概略地示出各构成成分的大小、形状和配置关系。因此，本发明并不仅限于图示的例子。
〔第1实施形态〕
首先，参照图1，说明有关本发明的半导体封装的实施形态。图1是用于说明涉及第1实施形态的半导体封装的构造的断面图。
如图1所示那样，该实施形态的半导体封装由IC芯片5和电路基片1构成。该IC芯片5和电路基片1通过焊料突点相互倒装芯片连接。而且，电路基片1的占有面积变得比IC芯片5的占有面积还狭窄。
再者，在图1中，部分省略了IC芯片的内部构造的图示。
这样，由于使电路基片1的外形尺寸比IC芯片5的外形尺寸还小，所以，半导体封装的大小由IC芯片5的大小来决定。因此，与在比IC芯片还大的电路基片上安装IC芯片的以往的半导体封装相比，能够使半导体封装小型化。
另外，在该半导体封装20中，使用密封用的树脂密封IC芯片5和电路基片1的间隔。再在电路基片1的周边侧面也用密封树脂覆盖起来。
还有，在以往的半导体封装中，比电路基片小的IC芯片的周边侧面使用密封树脂覆盖。
此处，参照图2，说明有关电路基片1的构造。图2是电路基片1的主要部件断面图。该电路基片1是把包含了玻璃布的树脂基片作为基体材料而构成的。而且，由于含有玻璃布，因此，能使电路基片1的电路的配线图形的线宽变细。其结果，能使配线图形高密度化。此外，由于含有玻璃布，还能提高操作性。
再者，作为电路基片1的基体材料，也可以使用陶瓷基片。若使用陶瓷基片，则能使配线密度精密化。另外，陶瓷的线膨胀系数小。因此，若使用陶瓷基片作为基体材料，则能抑制由于电路基片1的温度变化所引起的变形的发生。
另外，如图2所示，该电路基片1在一面上具备倒装芯片连接用的键合焊盘3。在该键合焊盘3上将连接焊料突点7。该电路基片1在另一面上具备外部连接用的电极10。外部连接用的电极10在焊盘电极4上形成有焊锡球9作为突起电极。而且，半导体封装经由该外部连接用的电极10，例如与母板电气连接。另外，键合焊盘3和焊盘电极4都是用Ni(镍)+Au(金)电镀层2e形成的。
再者，在图1中，省略了键合焊盘3和焊盘电极4的图示。
而且，该电路基片1具备用于电气连接键合焊盘3和外部连接用电极10的通孔2。在该通孔2的内壁表面形成铜电镀层2a。再在该通孔2中填充树脂2b。另外，填充了树脂2b的通孔两端，覆盖着铜电镀层2c。该铜电镀层2c与铜电镀层2a电气连接。而且，键合焊盘3和焊盘电极4以各自的表面在铜电镀层2c上形成。因此，键合焊盘3和由焊盘电极4与焊锡球9组成的突起电极10被电气连接。
这样，若用树脂2b填充通孔2，就能够防止焊锡流入通孔2的内部。另外，在电路基片1的表面，在通孔2的形成位置上也可形成配线图形。因此，能够试图做到对电路基片1的表面的有效利用。
尤其是，在该实施形态中，键合焊盘3和突起电极10一一对应进行连接。而且，如图1所示，各突起电极10分别设置在通孔2的形成位置上。在这种情况下，由于在通孔2中，填充了树脂2b，因此，能防止突起电极10向通孔2内凹陷。因此，能确保突起电极10的高精度。
〔第2实施形态〕
下面，参照图3，说明有关涉及第2实施形态的半导体封装的制造方法。再者，在图3的(a)～(e)中，在附图的右侧分别示出俯视图，在各俯视图的左侧，分别示出沿着该俯视图的A-A线切口的断面图。另外，在图3中，为方便起见，示出从一块晶片中取出4个半导体封装20的例子。
在第2实施形态中，顺次经过焊料突点形成工序、键合工序、树脂密封工序和切割工序，制造具备将IC芯片和电路基片相互倒装芯片连接的半导体封装。
<焊料突点形成工序>
首先，在焊料突点形成工序中，在由晶片11所形成的多个IC芯片5中，分别形成焊料突点7(图3(a))。该焊料突点7将6/4焊锡作为材料。另外，在IC芯片5的表面上所形成的焊盘电极(未图示)上形成焊料突点7。
在该焊料突点7的形成当中，例如，可以使用柱式突起方式、球型突起方式和电镀突起方式等方法。在这些方法中，电镀突起方式能够在焊盘电极间狭窄的排列中形成突起。因此，电镀突起方式对于IC芯片的小型化特别有效。
<键合工序>
接着，在键合工序方面，经由焊料突点7将占有面积比各个IC芯片5的占有面积还要狭窄的电路基片1逐个地倒装芯片连接到由晶片11所形成的各个IC芯片5中(图3(b))。在倒装芯片连接时，首先，将电路基片1装载在IC芯片5上。
这时，使焊料突点7位于电路基片1的涂敷了焊剂的键合焊盘(图3中未图示)上。而且，通过由焊锡回流使焊剂熔化后与焊锡焊盘熔为一体，将电路基片1固定在IC芯片5上。
此外，在该键合工序中，晶片11中的IC芯片5的非形成区域5a可以利用作为制造年代标记。
此处，就电路基片1的形成方法的例子进行说明。当图2所示的电路基片1形成时，首先，通过NC(数控)钻孔加工，在集成电路基片的基体材料1a上形成通孔2。接着，在该基体材料1a的两面，通过无电解铜电镀和电解铜电镀形成铜电镀层2a。还有，在通孔2的内壁表面也形成该铜电镀层2a。
接着，用树脂2b填充通孔2。然后，在填充了树脂2b的通孔2的两端，通过无电解铜电镀和电解铜电镀，形成铜电镀层2c。该铜电镀层2c在线路上与铜电镀层2a连接。
接下来，用电镀抗蚀剂(未图示)进行叠层。再使该电镀抗蚀剂暴光并显象后形成图形掩模(未图示)。之后，经由该图形掩模对铜电镀层进行使用了腐蚀液的图形蚀刻。通过该图形蚀刻，在电路基片1的上面构图作为多列分配的IC连接用电极的键合图形3。另外，通过该图形蚀刻，在电路基片1的底面，构图矩阵形配置的焊盘电极4。
接着，进行抗焊剂处理，并形成在键合图形3和焊盘电极4的区域分别具有开口部分的抗蚀膜2d。这些开口部分被配置成矩阵形状。
然后，在抗蚀膜2d的各开口部分通过形成Ni+Au电镀层2e来形成键合图形3和焊盘电极4。然后，用焊剂将焊锡球9暂时固定在该焊盘电极4上。
该焊锡球9将6/4焊锡作为材料。因此，在回流工序中，当焊剂融化、焊料突点7被固定时，该焊锡球9也被固定在焊盘电极4上，并形成突起电极10。
(树脂密封工序>
接着，在树脂密封工序中，用密封树脂对晶片11和电路基片1之间的间隔进行密封(图3(c))。在树脂密封时，从电路基片1之间注入热固性树脂，对在晶片11上形成的IC芯片5和电路基片1之间的间隔进行树脂密封。再对相邻的电路基片1之间的间隔也进行树脂密封。通过该树脂密封，各电路基片1被固定在晶片11上。
<切割工序>
然后，在切割工序中，通过切割将晶片11切割分成各个IC芯片5(图3(d))。在切割时，使用粘接剂或称作双面带的固定装置将晶片11固定在夹具(未图示)上。然后，使用包括切割锯在内的切削装置沿着相互正交的X方向和Y方向的切割线(街道线)切割。
再者，在切割时，被密封在电路基片1之间的间隔中的密封树脂也与晶片11一起被切割。因此，通过该切割，密封树脂8的截面被形成。
接着，将被切削的晶片11分割成每个IC芯片5。再使用溶解液等将各个IC芯片从夹具上分离出来。这样，就能得到半导体封装20(图3(e))。
〔第3实施形态〕
接下来，参照图5(a)～(c)，作为第3实施形态，将说明本发明的半导体封装的一个例子。
如图5(a)所示那样，本实施形态的半导体封装20a由IC芯片5和电路基片1组成。该IC芯片5和电路基片1经由焊料突点7被相互倒装芯片连接。而且，在第3实施形态的半导体封装20a中，也使电路基片1的占有面积比IC芯片5的占有面积狭窄。
这种构造的半导体封装20a是在形成了焊料突点7的IC芯片5中安装电路基片(插入式基片)而形成的。
因此，首先，在IC芯片5的表面，形成焊盘电极18。该焊盘电极18是以小于1mm的间距，而且配置成5行5列的网状而形成的。接着在各焊盘电极18上形成焊料突点7。
另一方面，在构成电路基片1的基体材料1a中，如图5(b)所示那样，形成通孔(器件孔)2。通孔2通过激光加工或冲压加工在基体材料1a上钻孔而形成。另外，这些通孔2与IC芯片5上的焊盘电极18一样，也是以小于1mm的间距且配置成网状而形成的。
此外，如图5(b)所示那样，为了堵住基体材料1a的一个面的各通孔2的开口部分，形成键合焊盘3。若从基体材料1a的另一面看该状态，则在通孔2的底面露出键合焊盘3。
然后，在形成键合焊盘3的基体材料1a的一面上，形成抗蚀膜2d。该抗蚀膜2d在键合焊盘3上具有开口部分。因此，若从基体材料1a的一面看该状态，则在抗蚀膜2d的开口部分露出键合焊盘3。
接着，如图5(c)所示那样，通过从基体材料1a另一面印刷和熔化焊锡膏，将作为导电材料的焊锡19填充到通孔2中。然后，如图5(c)所示，通过熔化并粘接作为突起电极的焊锡球9，在填充到通孔2的焊锡19中，形成外部连接用电极10。这样，通过在通孔2中填充焊锡19，不仅在通孔2内部不残留不必要的空间，而且，能够形成外部连接用电极10。
然后，在形成了外部用电极10的电路基片1中，倒装芯片连接IC芯片5。在倒装芯片连接时，在电路基片1的各键合焊盘3中，分别连接IC芯片的各焊料突点7。再用密封树脂对IC芯片5和电路基片1之间的间隔进行树脂密封。经过这样的工序，就能得到半导体封装20a。
而且，该半导体封装20a经由外部连接用的电极10安装到例如母板(未图示)中。
另外，在该实施形态的电路基片20a中，通过通孔2连接外部连接用电极10和键合焊盘3。因此，在电路基片20a的一面上，无须设置键合焊盘3以外的配线图形。其结果，与使用设置了配线图形的电路基片的情况相比，能够缩短键合焊盘3的间距。其结果，能够使半导体封装小型化。
此外，在本实施形态中，在电路基片20a的另一边的表面上，也无须设置外部连接用电极10以外的配线图形。其结果，与使用设置了配线图形的电路基片的情况相比，能够缩短外部连接用电极10。这一点，由于在有配线图形时，若增加外部连接用电极的数量，则配线的占有面积也增加，因此，难以将外部连接用电极的间距设定在1mm以下。
另外，作为导电材料，除焊锡外，也可使用导电性树脂。
〔第4实施形态〕
接下来，参照图6，作为第4实施形态，将对本发明的半导体封装的一个例子进行说明。图6是第4实施形态的半导体封装20b的主要部件断面图。另外，在与第3实施形态相同的构成成分中，附加相同的符号，并省略其详细说明。
如图6所示那样，该实施形态的半导体封装20b在基体材料1a的一面设置电极4以代替在电路基片1的基体材料1a的另一面(即，倒装芯片连接芯片5一侧的表面)设置键合焊盘3。设置该焊盘电极4是为了堵住基体材料1a的另一面通孔2的开口部分。然后，将焊锡球9连接到该焊盘电极4上。因此，由该焊盘电极4和焊锡球9构成外部连接电极10。
另外，在通孔2中，从基体材料1a的一面填充焊锡19。并且，在IC芯片5中倒装安装电路基片1时，连接该焊锡19和IC芯片5的焊料突点7使它们成为一个整体。
但是，在这种单面基片的电路基片1的一面，除了在通孔2中露出的焊锡19以外，没有形成配线图形。因此，在基体材料1a的一面，不必形成抗蚀剂膜。另外，在基体材料1b的另一面也不必形成抗蚀剂膜。
如以上那样，涉及本发明的半导体封装及其制造方法对于装载在摄象机一体型VTR和小型便携机器等设备中的、可靠性高、操作性好的半导体封装及其制造方法是非常合适的。

Claims (16)

1.将IC芯片和电路基片进行倒装芯片连接的半导体封装，其特征在于，所述电路基片的占有面积比所述IC芯片的占有面积还狭窄。
2.权利要求1所述的半导体封装，其特征在于，通过密封树脂密封所述IC芯片和所述电路基片之间的间隔。
3.权利要求2所述的半导体封装，其特征在于，将所述电路基片的周边侧面用所述密封树脂覆盖。
4.权利要求1～3的任何一个所述的半导体封装，其特征在于，所述的电路基片在第1主表面具备倒装芯片连接用的键合焊盘，在第2主表面具备外部连接用的电极，并且，所述电路基片具备用于电气连接所述键合焊盘和所述外部连接用电极的通孔。
5.权利要求4所述的半导体封装，其特征在于，在所述通孔内壁表面上形成了导电性的电镀层，在所述的通孔中填充了树脂。
6.权利要求4所述的半导体封装，其特征在于，在所述通孔中填充了导电材料。
7.权利要求6所述的半导体封装，其特征在于，所述导电材料是导电性树脂或焊锡。
8.权利要求4所述的半导体封装，其特征在于，在所述第2主表面内的所述通孔形成位置设置各所述外部连接用电极。
9.权利要求4所述的半导体封装，其特征在于，所述外部连接用电极具有突起电极。
10.权利要求9所述的半导体封装，将所述突起电极作为焊锡球。
11.权利要求1所述的半导体封装，其特征在于，经由焊料突点将所述IC芯片和所述电路基片进行倒装芯片连接。
12.权利要求1所述的半导体封装，其特征在于，所述电路基片将含有玻璃布的树脂基片作为基体材料。
13.权利要求1所述的半导体封装，其特征在于，所述电路基片将陶瓷基片作为基体材料。
14.将IC芯片和电路基片相互倒装芯片连接的半导体封装的制造方法，其特征在于该制造方法包含以下工序：
在晶片上所形成的多个IC芯片中，分别形成焊料突点的焊料突点形成工序；经由所述焊料突点将占有面积比各个IC芯片的占有面积还要狭窄的电路基片倒装芯片连接到所述各个IC芯片的键合工序；使用密封树脂对晶片和所述电路基片之间的间隔进行树脂密封的树脂密封工序以及通过使用切割将所述晶片切割分成各个所述IC芯片，形成所述半导体封装的切割工序。
15.权利要求14所述的半导体封装的制造方法，其特征在于，在所述树脂密封工序中，对相邻的所述电路基片之间的间隔进行树脂密封。
16.权利要求14或15所述的半导体封装的制造方法，其特征在于，在所述切割工序中，当切割所述晶片时，形成所述密封树脂的截断面。
CNB988007932A 1997-06-23 1998-06-22 半导体封装及其制造方法 Expired - Fee Related CN1154177C (zh)

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