CN115104183A - 电路结构和电子设备 - Google Patents
电路结构和电子设备 Download PDFInfo
- Publication number
- CN115104183A CN115104183A CN202080096697.0A CN202080096697A CN115104183A CN 115104183 A CN115104183 A CN 115104183A CN 202080096697 A CN202080096697 A CN 202080096697A CN 115104183 A CN115104183 A CN 115104183A
- Authority
- CN
- China
- Prior art keywords
- substrate
- chip
- cable
- circuit structure
- cable connection
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Combinations Of Printed Boards (AREA)
Abstract
一种电路结构以及电子设备,该电路结构(100)包括:第一基板(10)、第二基板(12)和芯片(11);其中,芯片(11)和第二基板(12)均被承载在第一基板(10)上;第二基板(12)上设置有线缆连接区域(121);芯片(11)通过跳线或者第一基板(10)上的布线层与第二基板(12)上的线缆连接区域(121)电性连接。该电路结构(100)可以实现与芯片(11)电性连接的线缆(13)数目的灵活设置。
Description
PCT国内申请,说明书已公开。
Claims (11)
- PCT国内申请,权利要求书已公开。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/CN2020/077872 WO2021174470A1 (zh) | 2020-03-05 | 2020-03-05 | 电路结构和电子设备 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN115104183A true CN115104183A (zh) | 2022-09-23 |
Family
ID=77612807
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202080096697.0A Pending CN115104183A (zh) | 2020-03-05 | 2020-03-05 | 电路结构和电子设备 |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN115104183A (zh) |
WO (1) | WO2021174470A1 (zh) |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101017785A (zh) * | 2006-02-10 | 2007-08-15 | 矽品精密工业股份有限公司 | 半导体堆栈结构及其制法 |
CN100521179C (zh) * | 2006-11-21 | 2009-07-29 | 日月光半导体制造股份有限公司 | 可堆栈式半导体封装结构 |
CN101252105A (zh) * | 2008-03-28 | 2008-08-27 | 友达光电股份有限公司 | 电路板结构、覆晶电路和驱动电路的布线结构 |
US20110147908A1 (en) * | 2009-12-17 | 2011-06-23 | Peng Sun | Module for Use in a Multi Package Assembly and a Method of Making the Module and the Multi Package Assembly |
CN106206559A (zh) * | 2015-05-04 | 2016-12-07 | 葳天科技股份有限公司 | 模块化的发光装置 |
KR102511832B1 (ko) * | 2016-08-26 | 2023-03-20 | 삼성전자주식회사 | 반도체 패키지 장치 |
-
2020
- 2020-03-05 WO PCT/CN2020/077872 patent/WO2021174470A1/zh active Application Filing
- 2020-03-05 CN CN202080096697.0A patent/CN115104183A/zh active Pending
Also Published As
Publication number | Publication date |
---|---|
WO2021174470A1 (zh) | 2021-09-10 |
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Legal Events
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PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination |