CN114616650A - 基板处理方法、基板处理装置和纳米线或纳米片的晶体管的制造方法 - Google Patents

基板处理方法、基板处理装置和纳米线或纳米片的晶体管的制造方法 Download PDF

Info

Publication number
CN114616650A
CN114616650A CN202080072884.5A CN202080072884A CN114616650A CN 114616650 A CN114616650 A CN 114616650A CN 202080072884 A CN202080072884 A CN 202080072884A CN 114616650 A CN114616650 A CN 114616650A
Authority
CN
China
Prior art keywords
gas
plasma
processing
substrate
substrate processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202080072884.5A
Other languages
English (en)
Inventor
小山贤一
山内祥平
土桥和也
清水昭贵
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of CN114616650A publication Critical patent/CN114616650A/zh
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/3244—Gas supply means
    • H01J37/32449—Gas control, e.g. control of the gas flow
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • C23C28/30—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • C23C28/30—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer
    • C23C28/32—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one pure metallic layer
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • C23C28/30—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer
    • C23C28/32—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one pure metallic layer
    • C23C28/322—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one pure metallic layer only coatings of metal elements only
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • C23C28/30—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer
    • C23C28/34—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one inorganic non-metallic material layer, e.g. metal carbide, nitride, boride, silicide layer and their mixtures, enamels, phosphates and sulphates
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • C23C28/30—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer
    • C23C28/34—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one inorganic non-metallic material layer, e.g. metal carbide, nitride, boride, silicide layer and their mixtures, enamels, phosphates and sulphates
    • C23C28/341—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one inorganic non-metallic material layer, e.g. metal carbide, nitride, boride, silicide layer and their mixtures, enamels, phosphates and sulphates with at least one carbide layer
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • C23C28/30—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer
    • C23C28/34—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one inorganic non-metallic material layer, e.g. metal carbide, nitride, boride, silicide layer and their mixtures, enamels, phosphates and sulphates
    • C23C28/345—Coatings combining at least one metallic layer and at least one inorganic non-metallic layer including at least one inorganic non-metallic material layer, e.g. metal carbide, nitride, boride, silicide layer and their mixtures, enamels, phosphates and sulphates with at least one oxide layer
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • C23C28/40—Coatings including alternating layers following a pattern, a periodic or defined repetition
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C28/00—Coating for obtaining at least two superposed coatings either by methods not provided for in a single one of groups C23C2/00 - C23C26/00 or by combinations of methods provided for in subclasses C23C and C25C or C25D
    • C23C28/40—Coatings including alternating layers following a pattern, a periodic or defined repetition
    • C23C28/42—Coatings including alternating layers following a pattern, a periodic or defined repetition characterized by the composition of the alternating layers
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C8/00—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals
    • C23C8/02—Pretreatment of the material to be coated
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C8/00—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals
    • C23C8/06—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using gases
    • C23C8/08—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using gases only one element being applied
    • C23C8/10—Oxidising
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C8/00—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals
    • C23C8/06—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using gases
    • C23C8/08—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using gases only one element being applied
    • C23C8/10—Oxidising
    • C23C8/12—Oxidising using elemental oxygen or ozone
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C8/00—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals
    • C23C8/06—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using gases
    • C23C8/08—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using gases only one element being applied
    • C23C8/20—Carburising
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C8/00—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals
    • C23C8/06—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using gases
    • C23C8/08—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using gases only one element being applied
    • C23C8/24—Nitriding
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C8/00—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals
    • C23C8/06—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using gases
    • C23C8/36—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals using gases using ionised gases, e.g. ionitriding
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C8/00—Solid state diffusion of only non-metal elements into metallic material surfaces; Chemical surface treatment of metallic material by reaction of the surface with a reactive gas, leaving reaction products of surface material in the coating, e.g. conversion coatings, passivation of metals
    • C23C8/80—After-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32357—Generation remote from the workpiece, e.g. down-stream
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02252—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02321—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
    • H01L21/02329—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen
    • H01L21/02332—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer introduction of nitrogen into an oxide layer, e.g. changing SiO to SiON
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
    • H01L21/0234—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67063—Apparatus for fluid treatment for etching
    • H01L21/67069—Apparatus for fluid treatment for etching for drying etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0665—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0665—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
    • H01L29/0669—Nanowires or nanotubes
    • H01L29/0673—Nanowires or nanotubes oriented parallel to a substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
    • H01L29/42392—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor fully surrounding the channel, e.g. gate-all-around
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66439—Unipolar field-effect transistors with a one- or zero-dimensional channel, e.g. quantum wire FET, in-plane gate transistor [IPG], single electron transistor [SET], striped channel transistor, Coulomb blockade transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66545—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/6656—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using multiple spacer layers, e.g. multiple sidewall spacers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66787—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
    • H01L29/66795—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/785—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00—Manufacture or treatment of nanostructures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/32—Processing objects by plasma generation
    • H01J2237/33—Processing objects by plasma generation characterised by the type of processing
    • H01J2237/334—Etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
    • H01J2237/32—Processing objects by plasma generation
    • H01J2237/33—Processing objects by plasma generation characterised by the type of processing
    • H01J2237/338—Changing chemical properties of treated surfaces
    • H01J2237/3387—Nitriding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/775—Field effect transistors with one dimensional charge carrier gas channel, e.g. quantum wire FET

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Materials Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Mechanical Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Analytical Chemistry (AREA)
  • Nanotechnology (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

本发明的课题在于，交替地层叠有硅层与硅锗层的基板的处理中，适当地缩短处理工序。本发明为一种基板处理方法，其为交替地层叠有硅层与硅锗层的基板的处理方法，所述基板处理方法使用经等离子体化的包含氟和氧的处理气体，将前述硅锗层的露出面的表层选择性地改性，形成氧化膜。

Description

基板处理方法、基板处理装置和纳米线或纳米片的晶体管的 制造方法
技术领域
本公开涉及基板处理方法、基板处理装置和纳米线或纳米片的晶体管的制造方法。
背景技术
专利文献1中公开了如下方法：硅锗层和例如硅层露出的基板中，选择性地蚀刻硅锗层。根据专利文献1中记载的蚀刻方法，在真空气氛中，向基板同时供给含氟气体和三氟化氯气体，从而使蚀刻速度均匀，实现了使硅锗层的蚀刻量一致。
现有技术文献
专利文献
专利文献1：日本特开2018-170380号公报
发明内容
发明要解决的问题
本公开所涉及的技术在交替地层叠有硅层与硅锗层的基板的处理中适当地缩短处理工序。
用于解决问题的方案
本公开的一方式为交替地层叠有硅层与硅锗层的基板的处理方法，所述基板的处理方法使用经等离子体化的包含氟和氧的处理气体，将前述硅锗层的露出面的表层选择性地改性，形成氧化膜。
发明的效果
根据本公开，在交替地层叠有硅层与硅锗层的基板的处理中，适当地缩短处理工序。
附图说明
图1为示意性示出现有的晶圆处理的样子的说明图。
图2为示出等离子体处理装置的构成的一例的纵截面图。
图3为示意性示出本实施方式所涉及的晶圆处理的样子的一例的说明图。
图4为比较本实施方式所涉及的等离子体处理中的硅层与硅锗层的氧化量的图。
图5为示出本实施方式所涉及的等离子体处理中的硅锗层的氧化量和蚀刻量的经时变化的一例的图。
图6为示出本实施方式所涉及的等离子体处理的结果的一例的图像。
图7为示出等离子体处理装置的另一构成的一例的纵截面图。
图8为示出氧化膜的改性的样子的说明图。
具体实施方式
半导体器件中，含有硅的膜被广泛用于各种用途中。栅电极、晶种层等中使用有例如硅锗(SiGe)膜、硅(Si)膜。而且，以往，所谓纳米片或纳米线的GAA(全环绕栅极(Gate allaround))晶体管的制造工序中，如图1所示，依次进行：(a)SiGe膜和Si膜在基板(晶圆W)上的层叠、(b)SiGe膜的选择蚀刻、(c)作为层间绝缘膜的内间隔物(IS)的埋入、(d)多余的内间隔物的蚀刻。需要说明的是，(c)中埋入的层间绝缘膜构成为在其后的工序中埋入的金属栅电极与沟道之间的绝缘膜。
上述专利文献1中公开的技术是用于进行该(b)SiGe膜的选择蚀刻的方法。要求均匀地控制这种SiGe膜的选择蚀刻中层叠的各SiGe膜的蚀刻量。而且，根据专利文献1中公开的蚀刻方法，通过同时供给含氟气体和三氟化氯气体，从而实现了使SiGe膜的蚀刻量均匀。
然而，这种现有的制造工序中，前述(a)～(d)的各工序中需要高精度的加工，成品率的降低、巨大的成本成为课题，存在改善的余地。
因此，本发明人等进行了深入研究，结果发现：对晶圆W的自由基氧化处理中，SiGe膜的蚀刻与氧化同时进行。即，由此，新发现了能省略现有的制造工序中的前述(a)～(d)的工序的可能性。而且，关于上述见解，专利文献1中也未记载。
本公开所涉及的技术是基于上述见解而作出的，在交替地层叠有硅(Si)层与硅锗(SiGe)层的基板的处理中，适当地缩短处理工序。以下，对作为本实施方式所涉及的基板处理装置的等离子体处理装置、和作为使用该等离子体处理装置进行的基板处理方法的等离子体处理，边参照附图边进行说明。需要说明的是，本说明书和附图中，对具有实质上相同的功能构成的要素标注相同的符号，从而省略重复说明。
＜等离子体处理装置＞
图2为示意性示出等离子体处理装置1的构成的概要的纵截面图。需要说明的是，以下的说明中，将交替地排列有SiGe层与Si层的各层露出的端面有时称为SiGe层和Si层的“露出面”。
需要说明的是，等离子体处理装置1中，选择性地对层叠在晶圆W上而形成的Si层和SiGe层中的SiGe层进行改性。具体而言，选择性地去除SiGe层的露出面上的附着物，且使SiGe层氧化，由此，在晶圆W上的SiGe层的露出面的表层、即从露出面向深度方向形成氧化膜(SiO2膜)。
如图2所示，等离子体处理装置1具备用于收纳晶圆W的密闭结构的处理容器10。处理容器10例如由铝或铝合金形成，上端开放，处理容器10的上端由成为顶部的盖体10a阻塞。在处理容器10的侧面设有晶圆W的搬入搬出口(未作图示)，借助该搬入搬出口与等离子体处理装置1的外部连接。搬入搬出口由闸阀(未作图示)开关自由地构成。
处理容器10的内部由隔板11被分隔成上方的等离子体生成空间P和下方的处理空间S。即，本实施方式所涉及的等离子体处理装置1构成为等离子体生成空间P与处理空间S分离的远程等离子体处理装置。
隔板11具有以从等离子体生成空间P朝向处理空间S重叠的方式配置的至少2个板状构件12、13。在板状构件12、13之间配置有调节该板状构件12、13的间隔的间隔物14。另外，板状构件12、13分别具有沿重叠方向贯通而形成的狭缝12a、13a。各狭缝12a、13a以在俯视下不重叠的方式配置，由此，隔板11作为抑制在等离子体生成空间P生成等离子体时等离子体中的离子渗透到处理空间S的、所谓离子阱发挥功能。更具体而言，利用以狭缝12a和狭缝13a不重叠的方式配置的狭缝配置结构、即迷宫结构，阻止沿各向异性移动的离子的移动，另一方面使沿各向同性移动的自由基透过。
需要说明的是，隔板11的结构不限定于图示的例子，可以采用任意构成。
等离子体生成空间P具有：向处理容器10内供给处理气体的供气部20；和，将向处理容器10内供给的处理气体等离子体化的等离子体生成部30。
在供气部20上连接有多个气体供给源(未作图示)，这些气体供给源向处理容器10的内部供给包含含氟气体(例如NF3气体)、含氧气体(例如O2气体)和稀释气体(例如Ar气体)的处理气体。需要说明的是，含氟气体、含氧气体和稀释气体的种类不限定于此，可以任意选择。
另外，在供气部20上设置有用于调节处理气体向等离子体生成空间P的供给量的流量调节器(未作图示)。流量调节器例如具有开关阀和质量流量控制器。
等离子体生成部30构成为使用RF天线的电感耦合型的装置。处理容器10的盖体10a例如由石英板形成，构成为电介质窗。在盖体10a的上方形成有用于在处理容器10的等离子体生成空间P生成电感耦合等离子体的RF天线31，RF天线31借助匹配器32与高频电源33连接。
匹配器32具有用于匹配高频电源33侧的阻抗与负载(RF天线31、等离子体)侧的阻抗的匹配的可变电抗的匹配电路(未作图示)。
高频电源33以任意输出值输出适于通过电感耦合的高频放电产生等离子体的恒定频率(通常为13.56MHz以上)的高频电力。
处理空间S具有：在处理容器10内载置晶圆W的载置台40；和，将处理容器10内的处理气体排出的排气部50。
载置台40具有：用于载置晶圆W的上部台41、和固定于处理容器10的底面、且用于支撑上部台41的下部台42。在上部台41的内部设有用于调节晶圆W的温度的温度调节机构43。
排气部50在载置台40的外侧借助设置于处理容器10的底部的排气管与例如真空泵等排气机构(未作图示)连接。而且在排气管上设有自动压力控制阀(APC)。利用这些排气机构和自动压力控制阀，控制处理容器10内的压力。
以上的等离子体处理装置1中，设置有作为控制部的控制装置60。控制装置60例如为具备CPU、存储器等的计算机，具有程序存储部(未作图示)。程序存储部中存储有用于控制等离子体处理装置1中的晶圆W的处理的程序。另外，程序存储部中还存储有控制上述各种处理装置、输送装置等驱动系统的动作、用于实现等离子体处理装置1中的后述的晶圆处理的程序。需要说明的是，上述程序记录在计算机可读取的存储介质H中，并可以从该存储介质H安装到控制装置60中。
＜等离子体处理＞
本实施方式所涉及的等离子体处理装置1如以上构成。接着，对用等离子体处理装置1进行的等离子体处理进行说明。需要说明的是，搬入等离子体处理装置1的晶圆W上，预先交替地层叠前述Si层与SiGe层而形成。
首先，如上述，交替地层叠Si层与SiGe层而形成的晶圆W由设置于等离子体处理装置1的外部的晶圆输送机构(未作图示)搬入，载置于载置台40。
所搬入的晶圆W中，层叠在该晶圆W上而形成的Si层和SiGe层中的、SiGe层被选择性地改性。具体而言，将处理气体(本实施方式中，为NF3气体、O2气体和Ar气体)从供气部20向等离子体生成空间P供给，且向RF天线31供给高频电力，生成作为电感耦合等离子体的含有氧和氟的等离子体。换言之，所生成的等离子体含有氟自由基(F*)和氧自由基(O*)。
此处，向等离子体生成空间P供给的处理气体的流量优选O2：NF3＝100～2500sccm：1～20sccm、更优选NF3气体相对于O2气体的体积比率为0.1体积％以上且1.0体积％以下。另外，优选等离子体生成空间P中的高频电力的功率为100W～1000W、等离子体生成空间P的压力(真空度)为6.67Pa～266.6Pa(50mTorr～2000mTorr)。而且进而，等离子体生成空间P的温度优选为0℃～120℃、更优选为15～100℃。
在等离子体生成空间P中生成的等离子体经由隔板11被供给至处理空间S。此处，如前述在隔板11中形成迷宫结构，因此，仅在等离子体生成空间P中生成的自由基渗透到处理空间S。而且，如图3(a)所示，通过使供给至处理空间S的自由基作用于SiGe层的露出面，从而如图3(b)所示，SiGe层被改性，在SiGe层的露出面的表层形成氧化膜Ox。
此处，图4为比较本实施方式所涉及的等离子体处理中的Si层与SiGe层的氧化量的图。而且图5为示出本实施方式所涉及的等离子体处理中的SiGe层的蚀刻量和氧化量的经时变化的图。需要说明的是，如图5所示，SiGe层的“蚀刻量”是指从晶圆W(Si层)的外端部至SiGe层的外端部为止的距离。另外，如图5所示，SiGe层的“氧化量”是指形成于SiGe层的露出面的氧化膜Ox的径向厚度。
如图4所示，可知：在本实施方式所涉及的等离子体处理中，SiGe层的氧化量(氧化速度)是Si层的氧化量(氧化速度)的大致6倍。换言之，根据本实施方式所涉及的等离子体处理，可以适当地对SiGe层进行选择性地改性(氧化)。
而且如图5所示，通过层叠Si和SiGe并进行等离子体处理，从而SiGe层的蚀刻量、即残留于晶圆W上的SiGe层的径向尺寸可以相对于处理时间进行线性控制。另一方面，可知：通过层叠Si和SiGe并进行等离子体处理，从而SiGe层的氧化量、即形成于SiGe层的露出面上的氧化膜(SiO2膜)的径向厚度不依赖于处理时间而在约10nm处达到饱和。换言之，根据本实施方式所涉及的等离子体处理，可以在保持SiGe层的氧化量为期望值不变的同时适当地控制SiGe层的蚀刻量，因此，可以将SiGe层的线宽、即后续工序中形成的沟道宽度控制为任意尺寸。
对SiGe层的改性具体地进行说明。自由基如果透过处理空间S，首先，附着于SiGe层的露出面上的沉积物(例如利用作为预处理的反应性离子蚀刻(反应离子蚀刻(RIE：Reactive Ion Etching))处理而附着)被F*所去除。接着，O*作用于SiGe层，SiGe层的露出面被氧化，形成氧化膜Ox(SiO2膜)。SiGe层的氧化中，O2代替Ge键合于Si，由此，Ge气体化(例如Ge2F4、GeOF2)而飞散，例如由F*、Ar*被输送至排气部50并被回收。本实施方式中，将上述一系列的沉积物的去除和SiGe层的氧化一并称为“改性”。
此处，本发明人等对如以上形成的氧化膜(SiO2膜)进行了研究，结果发现：上述氧化膜的漏电流少，担保良好的绝缘性，另外，具有作为绝缘膜的良好的CV、IV特性。即，发现：可以作为绝缘氧化膜利用。而且进而发现：EOT(等效氧化层厚度(Equivalent OxideThickness))减少也是轻微的，也可以确保耐热性。即，通过利用如此形成的氧化膜作为内间隔物，从而对图1所示的现有的GAA晶体管的制造工艺可以削减到1/3左右的工序数。具体而言，如图1所示，仅通过使经等离子体化的处理气体作用于SiGe层而不进行SiGe层的选择蚀刻、内间隔物的埋入和蚀刻，从而将SiGe层选择性地氧化，可以利用所形成的氧化膜作为内间隔物，因此，能够大幅削减工序数。
需要说明的是，在一次等离子体处理中向处理空间S供给自由基的时间变长的情况下，有基于该自由基的、对Si层的作用变大的担心。为了抑制上述对Si层的影响，进行等离子体处理的平均每组的处理时间例如优选30秒～180秒。
此处，等离子体处理中的SiGe层的蚀刻量、即SiGe层的径向尺寸如图5所示由等离子体处理时间控制。因此，抑制自由基对Si层的作用、且以期望的深度形成氧化膜时，期望多组重复进行前述1组的等离子体处理(30秒～180秒)。
另外，等离子体处理中的输出变高的情况下，仍然有自由基对Si层造成影响的担心。为了抑制上述对Si层的影响，等离子体处理的功率如前述优选100W～1000W。
而且进一步，本实施方式中，进行在不同于进行等离子体处理的处理空间S的另一等离子体生成空间P中生成等离子体的、所谓远程等离子体生成，将在等离子体生成空间P中生成的等离子体输送至处理空间S。氟离子等离子在输送过程中容易失活，因此，通过如此使用远程等离子体，从而处理空间S中可以进行以自由基为主体的处理。而且，通过如此使用自由基，从而能够减少对Si层、SiGe层和晶圆W的损伤。
而且，等离子体处理装置1中的等离子体处理结束的晶圆W利用设置于等离子体处理装置1的外部的晶圆输送机构(未作图示)从等离子体处理装置1搬出，一系列的等离子体处理结束。
以上，根据本实施方式，对SiGe层形成内间隔物时，仅通过在等离子体处理装置1中在期望的条件下供给经等离子体化的处理气体，从而可以进行SiGe层的改性，因此，可以削减等离子体处理所耗费的工序数。另外，通过如此削减工序数，从而可以削减等离子体处理所耗费的成本，且可以提高形成内间隔物所耗费的加工精度。
图6为示出本实施方式所涉及的等离子体处理中进行了SiGe层改性的结果的SEM图像。可知，通过本实施方式所涉及的等离子体处理，如图6(a)所示，仅将形成于晶圆W上的Si层和SiGe层中、SiGe层适当地改性，如图6(b)所示，可以形成氧化膜Ox。
另外，根据本实施方式，由于向处理空间S供给F*并进行沉积物的去除，因此无需如现有那样，在SiGe层的等离子体处理之前进行预处理(例如基于HF处理的自然氧化膜的去除等)。
而且，根据本实施方式，由于在等离子体处理装置中进行远程等离子体处理，因此抑制所产生的等离子体到达Si层、SiGe层和晶圆W，能够抑制对这些Si层、SiGe层和晶圆W造成损伤。具体而言，所生成的含有氟和氧的自由基在失活的状态下到达晶圆W的露出面，因此适当地进行SiGe层的改性，且能够抑制对Si层和晶圆W造成影响。
而且进而，根据本实施方式，由于远程等离子体处理在100W～1000W的功率下进行、且处理容器10的隔板11具有迷宫结构，因此能够适当地抑制所产生的离子到达Si层、SiGe层和晶圆W。即，能够进一步适当地抑制对Si层和晶圆W造成影响。
需要说明的是，本实施方式所涉及的等离子体处理中，供给O2、NF3和Ar作为处理气体，但可以进一步追加供给Ar气体作为Add气体。
需要说明的是，根据本实施方式，选择NF3作为处理气体所包含的含氟气体，但只要在等离子体生成时可以适当地生成F*即可，例如可以选择SF6气体、F2气体。另外，稀释气体不限定于Ar气体，可以选择包含H2气体或稀有气体中的至少1种的任意气体。
另外，等离子体生成空间P中的等离子体源也不限定于本实施方式那样的电感耦合等离子体，例如能采用微波等离子体等任意构成。但是，本发明人等利用平行平板型的等离子体处理装置进行同一实验，结果如本实施方式所示，无法适当地进行SiGe层的选择性改性，Si层也会被同时改性。因此，等离子体处理装置中，优选通过远程等离子体生成来生成等离子体。
需要说明的是，本实施方式中的基于等离子体处理形成氧化膜后，可以在BT处理装置(未作图示)中进行氧化物的去除(BT处理)。
需要说明的是，如上述，对于形成有作为内间隔物的氧化膜Ox的晶圆W，之后在例如设置于该等离子体处理装置1的外部的蚀刻处理装置(未作图示)中有时进行湿式蚀刻处理。因此，本实施方式所涉及的等离子体处理装置1中，也可以进一步进行用于改善上述实施方式中形成的内间隔物(氧化膜Ox)的耐湿式蚀刻性的等离子体处理。
具体而言，例如通过使用包含含氮气体(例如N2气体、NH3气体或NF3气体等)的第2处理气体，并对形成有氧化膜Ox的晶圆W进一步实施等离子体处理，从而能够改善内间隔物(氧化膜Ox)的耐湿式蚀刻性。
使用第2处理气体对晶圆W进行等离子体处理时，N*作用于氧化膜Ox，氧化膜Ox被氮化，如图8(a)所示，在内间隔物的表层形成作为保护膜的氮化膜Nt。作为氧化膜Ox的SiO2膜的氮化中，N代替O2键合于Si，由此，O2气体化而飞散。而且，通过如此在内间隔物的至少表层形成具有耐湿式蚀刻性的氮化膜Nt(例如SiN膜)，从而在湿式蚀刻处理时，由氮化膜Nt保护氧化膜Ox免受蚀刻溶液的影响。即，能够通过残留于氮化膜Nt的内侧的氧化膜Ox维持作为内间隔物的特性，且通过该氮化膜Nt改善耐湿式蚀刻性。
需要说明的是，本发明人等对如此形成的氮化膜Nt进行了研究，结果发现：即使通过上述氮化膜Nt也可以发挥至少作为内间隔物的特性。即，图8(a)的图示中，将氧化膜Ox的至少表层氮化，并层叠氧化膜Ox与氮化膜Nt而形成，但例如如图8(b)所示，也可以将氧化膜Ox的全部置换为氮化膜Nt，将该氮化膜Nt用作内间隔物。其中，如果与氮化膜Nt比较，则氧化膜Ox具有作为更良好的绝缘膜的特性(CV、IV特性)，因此，也如图8(a)所示，氮化膜Nt更优选用作作为内间隔物的氧化膜Ox的保护膜。
需要说明的是，通过用于改善耐湿式蚀刻性的等离子体处理而形成的膜不限定于上述的氮化膜Nt。例如，使用包含含碳气体的第2处理气体，使氧化膜Ox碳化，如图8(c)所示，可以在内间隔物的至少表层形成具有耐湿式蚀刻性的碳化膜Cb(例如SiC膜)。作为含碳气体，例如可以使用CH4气体、CHF3气体、CH2F2气体、CH3F气体、CF4气体、C4F6气体、C4F8气体、CO气体、CO2气体、COS气体等。而且，如此形成碳化膜Cb的情况下，也与上述氮化膜Nt同样地，可以改善对在后续处理工序中进行的湿式蚀刻处理的耐性。
需要说明的是，本发明人等对如此形成的碳化膜Cb进行了研究，结果发现：上述碳化膜Cb与氧化膜Ox相比，具有更良好的作为绝缘膜的特性(CV、IV特性)，可以进一步减少内间隔物的介电常数。即，图8(c)的图示中，将氧化膜Ox的至少表层碳化，层叠氧化膜Ox与碳化膜Cb而形成，但例如图8(d)所示，可以将全部氧化膜Ox置换为碳化膜Cb，利用该碳化膜Cb作为内间隔物。上述情况下，与利用氧化膜Ox作为内间隔物的情况下相比，可以改善耐湿式蚀刻性，且可以进一步改善内间隔物的绝缘性。
需要说明的是，本实施方式中，等离子体处理装置1中等离子体生成空间P与处理空间S可以设置于相同腔室内、即一体地设置在处理容器10的上部，但等离子体处理装置1的构成不限定于此。例如如图7所示，也可以将等离子体生成空间P设置于处理容器10的外部。
此次公开的实施方式在全部方面为示例，应认为没有限制。上述实施方式在不脱离所附的权利要求书和其主旨的情况下，可以以各种方式省略、置换、变更。
需要说明的是，以下的构成也属于本公开的保护范围。
(1)一种基板处理方法，其为交替地层叠有硅层与硅锗层的基板的处理方法，
所述基板处理方法使用经等离子体化的包含氟和氧的处理气体，将前述硅锗层的露出面的表层选择性地改性，形成氧化膜。
根据前述(1)，交替地层叠有硅层与硅锗层的基板的等离子体处理中，由包含氟和氧的处理气体生成等离子体，仅通过供给上述等离子体化了的处理气体，从而可以适当地进行硅锗层的改性(附着物的去除和硅锗层的氧化)。
(2)根据前述(1)所述的基板处理方法，其中，前述处理气体包含O2气体和含氟气体，含氟气体相对于O2气体的体积比率为0.1体积％以上且1.0体积％以下。
(3)根据前述(2)所述的基板处理方法，其中，前述含氟气体为NF3气体、F2气体或SF6气体。
(4)根据前述(1)～前述(3)中任一项所述的基板处理方法，其中，前述处理气体还包含H2气体或稀有气体中的至少1种。
(5)根据前述(1)～前述(4)中任一项所述的基板处理方法，其中，前述处理气体的等离子体化中使用远程等离子体。
根据前述(5)，通过使处理气体为远程等离子体生成，从而可以适当地抑制Si层、SiGe层和晶圆W的损伤，且可以适当地进行SiGe层的改性。
(6)根据前述(1)～前述(5)中任一项所述的基板处理方法，其中，前述硅锗层的自前述露出面的蚀刻量与对前述基板的等离子体处理时间成比例。
(7)根据前述(1)～前述(6)中任一项所述的基板处理方法，其中，前述氧化膜的形成厚度不依赖于对前述基板的等离子体处理时间而在期望的值下达到饱和。
(8)根据前述(6)或前述(7)所述的基板处理方法，其中，重复进行对前述基板的等离子体处理，1组等离子体处理时间为30秒～180秒。
根据前述(8)，通过将等离子体处理的时间控制在所需时间内，从而可以进一步适当地抑制Si层的损伤。另外，通过重复进行等离子体处理，从而可以适当地进行SiGe层的露出面表层的改性，即，可以从露出面改性至期望的深度。
(9)根据前述(1)～前述(8)中任一项所述的基板处理方法，其中，使用经等离子体化的包含含氮气体的第2处理气体，将前述氧化膜的至少表层改性，形成氮化膜。
(10)根据前述(1)～前述(8)中任一项所述的基板处理方法，其中，使用经等离子体化的包含含碳气体的第2处理气体，将前述氧化膜的至少表层改性，形成碳化膜。
根据前述(9)、或前述(10)，通过将形成于露出面的表层的氧化膜的至少表层进一步改性，形成氮化膜、或碳化膜，从而可以改善例如对内间隔物形成后的处理工序中进行的湿式蚀刻处理的耐性。
(11)一种基板处理装置，其为对交替地层叠有硅层与硅锗层的基板进行处理的基板处理装置，所述基板处理装置具有：
处理部，其使用经等离子体化的包含氟和氧的处理气体，将前述硅锗层的露出面的表层选择性地改性，形成氧化膜；和，
控制部，其控制前述处理部中的等离子体处理。
(12)根据前述(11)所述的基板处理装置，其中，
前述处理气体包含O2气体和含氟气体，
前述控制部以含氟气体相对于O2气体的体积比率成为0.1体积％以上且1.0体积％以下的方式控制前述处理部中的处理气体的供给量。
(13)根据前述(12)所述的基板处理装置，其中，前述含氟气体为NF3气体、F2气体或SF6气体。
(14)根据前述(11)～前述(13)中任一项所述的基板处理装置，其中，前述控制部以进一步供给H2气体或稀有气体中的至少1种的方式控制前述处理部中的前述处理气体的供给。
(15)根据前述(11)～前述(14)中任一项所述的基板处理装置，其中，前述处理部中的前述处理气体的等离子体化中使用远程等离子体。
(16)根据前述(11)～前述(15)中任一项所述的基板处理装置，其中，前述等离子体处理中的前述硅锗层的自前述露出面的蚀刻量与等离子体处理时间成比例。
(17)根据前述(11)～前述(16)中任一项所述的基板处理装置，其中，前述等离子体处理中的前述氧化膜的形成厚度不依赖于等离子体处理时间而在期望的值下达到饱和。
(18)根据前述(16)或前述(17)所述的基板处理装置，其中，前述控制部重复进行对前述基板的等离子体处理，将1组等离子体处理时间控制在30秒～180秒。
(19)根据前述(11)～前述(18)中任一项所述的基板处理装置，其中，前述控制部如下进行控制：以使用经等离子体化的包含含氮气体的第2处理气体，将前述氧化膜的至少表层改性而形成氮化膜的方式，控制前述处理部中的等离子体处理。
(20)根据前述(11)～前述(18)中任一项所述的基板处理装置，其中，前述控制部如下进行控制：以使用经等离子体化的包含含碳气体的第2处理气体，将前述氧化膜的至少表层改性而形成碳化膜的方式，控制前述处理部中的等离子体处理。
(21)一种纳米线或纳米片的晶体管的制造方法，其为使用交替地层叠有硅层与硅锗层的基板进行的纳米线或纳米片的晶体管的制造方法，
所述制造方法使用经等离子体化的包含氟和氧的处理气体，将前述硅锗层的露出面的表层选择性地改性，形成绝缘氧化膜。
(22)根据前述(21)所述的纳米线或纳米片的晶体管的制造方法，其中，使用经等离子体化的包含含氮气体的第2处理气体，将前述绝缘氧化膜的至少表层改性而形成氮化膜。
(23)根据前述(21)所述的纳米线或纳米片的晶体管的制造方法，其中，使用经等离子体化的包含含碳气体的第2处理气体，将前述绝缘氧化膜的至少表层改性而形成碳化膜。
附图标记说明
1等离子体处理装置
60控制装置
S处理空间
W晶圆

Claims (23)

1.一种基板处理方法，其为交替地层叠有硅层与硅锗层的基板的处理方法，
所述基板处理方法使用经等离子体化的包含氟和氧的处理气体，将所述硅锗层的露出面的表层选择性地改性，形成氧化膜。
2.根据权利要求1所述的基板处理方法，其中，所述处理气体包含O2气体和含氟气体，含氟气体相对于O2气体的体积比率为0.1体积％以上且1.0体积％以下。
3.根据权利要求2所述的基板处理方法，其中，所述含氟气体为NF3气体、F2气体或SF6气体。
4.根据权利要求1～3中任一项所述的基板处理方法，其中，所述处理气体还包含H2气体或稀有气体中的至少1种。
5.根据权利要求1～4中任一项所述的基板处理方法，其中，所述处理气体的等离子体化中使用远程等离子体。
6.根据权利要求1～5中任一项所述的基板处理方法，其中，所述硅锗层的自所述露出面的蚀刻量与对所述基板的等离子体处理时间成比例。
7.根据权利要求1～6中任一项所述的基板处理方法，其中，所述氧化膜的形成厚度不依赖于对所述基板的等离子体处理时间而在期望的值下达到饱和。
8.根据权利要求6或7所述的基板处理方法，其中，重复进行对所述基板的等离子体处理，1组等离子体处理时间为30秒～180秒。
9.根据权利要求1～8中任一项所述的基板处理方法，其中，使用经等离子体化的包含含氮气体的第2处理气体，将所述氧化膜的至少表层改性，形成氮化膜。
10.根据权利要求1～8中任一项所述的基板处理方法，其中，使用经等离子体化的包含含碳气体的第2处理气体，将所述氧化膜的至少表层改性，形成碳化膜。
11.一种基板处理装置，其为对交替地层叠有硅层与硅锗层的基板进行处理的基板处理装置，所述基板处理装置具有：
处理部，其使用经等离子体化的包含氟和氧的处理气体，将所述硅锗层的露出面的表层选择性地改性，形成氧化膜；和，
控制部，其控制所述处理部中的等离子体处理。
12.根据权利要求11所述的基板处理装置，其中，
所述处理气体包含O2气体和含氟气体，
所述控制部以含氟气体相对于O2气体的体积比率成为0.1体积％以上且1.0体积％以下的方式控制所述处理部中的处理气体的供给量。
13.根据权利要求12所述的基板处理装置，其中，所述含氟气体为NF3气体、F2气体或SF6气体。
14.根据权利要求11～13中任一项所述的基板处理装置，其中，所述控制部以进一步供给H2气体或稀有气体中的至少1种的方式控制所述处理部中的所述处理气体的供给。
15.根据权利要求11～14中任一项所述的基板处理装置，其中，所述处理部中的所述处理气体的等离子体化中使用远程等离子体。
16.根据权利要求11～15中任一项所述的基板处理装置，其中，所述等离子体处理中的所述硅锗层的自所述露出面的蚀刻量与等离子体处理时间成比例。
17.根据权利要求11～16中任一项所述的基板处理装置，其中，所述等离子体处理中的所述氧化膜的形成厚度不依赖于等离子体处理时间而在期望的值下达到饱和。
18.根据权利要求16或17所述的基板处理装置，其中，所述控制部重复进行对所述基板的等离子体处理，将1组等离子体处理时间控制在30秒～180秒。
19.根据权利要求11～18中任一项所述的基板处理装置，其中，所述控制部如下进行控制：以使用经等离子体化的包含含氮气体的第2处理气体，将所述氧化膜的至少表层改性而形成氮化膜的方式，控制所述处理部中的等离子体处理。
20.根据权利要求11～18中任一项所述的基板处理装置，其中，所述控制部如下进行控制：以使用经等离子体化的包含含碳气体的第2处理气体，将所述氧化膜的至少表层改性而形成碳化膜的方式，控制所述处理部中的等离子体处理。
21.一种纳米线或纳米片的晶体管的制造方法，其为使用交替地层叠有硅层与硅锗层的基板进行的纳米线或纳米片的晶体管的制造方法，
所述制造方法使用经等离子体化的包含氟和氧的处理气体，将所述硅锗层的露出面的表层选择性地改性，形成绝缘氧化膜。
22.根据权利要求21所述的纳米线或纳米片的晶体管的制造方法，其中，使用经等离子体化的包含含氮气体的第2处理气体，将所述绝缘氧化膜的至少表层改性而形成氮化膜。
23.根据权利要求21所述的纳米线或纳米片的晶体管的制造方法，其中，使用经等离子体化的包含含碳气体的第2处理气体，将所述绝缘氧化膜的至少表层改性而形成碳化膜。
CN202080072884.5A 2019-10-29 2020-10-15 基板处理方法、基板处理装置和纳米线或纳米片的晶体管的制造方法 Pending CN114616650A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2019-196464 2019-10-29
JP2019196464 2019-10-29
PCT/JP2020/038903 WO2021085158A1 (ja) 2019-10-29 2020-10-15 基板処理方法、基板処理装置及びナノワイヤ又はナノシートのトランジスタの製造方法

Publications (1)

Publication Number Publication Date
CN114616650A true CN114616650A (zh) 2022-06-10

Family

ID=75716233

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202080072884.5A Pending CN114616650A (zh) 2019-10-29 2020-10-15 基板处理方法、基板处理装置和纳米线或纳米片的晶体管的制造方法

Country Status (6)

Country Link
US (1) US20220406572A1 (zh)
JP (1) JP7257543B2 (zh)
KR (1) KR20220070294A (zh)
CN (1) CN114616650A (zh)
TW (1) TW202129027A (zh)
WO (1) WO2021085158A1 (zh)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116741630A (zh) * 2023-08-14 2023-09-12 北京北方华创微电子装备有限公司 干法刻蚀方法和半导体工艺设备
CN117038444A (zh) * 2023-08-14 2023-11-10 北京北方华创微电子装备有限公司 干法刻蚀方法和半导体工艺设备

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2022112423A (ja) * 2021-01-21 2022-08-02 東京エレクトロン株式会社 プラズマ処理装置
WO2022264380A1 (ja) * 2021-06-17 2022-12-22 株式会社日立ハイテク プラズマ処理方法および半導体装置の製造方法

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4558285B2 (ja) * 2003-06-27 2010-10-06 東京エレクトロン株式会社 プラズマクリーニング方法および基板処理方法
JP2008160145A (ja) * 2008-02-04 2008-07-10 Renesas Technology Corp 絶縁ゲート型電界効果型トランジスタ及び半導体装置
US8859389B2 (en) * 2011-01-28 2014-10-14 Kabushiki Kaisha Toshiba Methods of making fins and fin field effect transistors (FinFETs)
JP6020239B2 (ja) * 2012-04-27 2016-11-02 東京エレクトロン株式会社 成膜方法及び成膜装置
JP5851349B2 (ja) * 2012-06-04 2016-02-03 株式会社日立ハイテクノロジーズ プラズマエッチング方法及びプラズマエッチング装置
JP6138653B2 (ja) * 2013-10-08 2017-05-31 株式会社日立ハイテクノロジーズ ドライエッチング方法
US9666449B2 (en) * 2014-06-17 2017-05-30 Micron Technology, Inc. Conductors having a variable concentration of germanium for governing removal rates of the conductor during control gate formation
US9716145B2 (en) * 2015-09-11 2017-07-25 International Business Machines Corporation Strained stacked nanowire field-effect transistors (FETs)
US9984890B2 (en) * 2016-03-02 2018-05-29 Tokyo Electron Limited Isotropic silicon and silicon-germanium etching with tunable selectivity
JP6619703B2 (ja) * 2016-06-28 2019-12-11 株式会社Ｓｃｒｅｅｎホールディングス エッチング方法
JP6812880B2 (ja) 2017-03-29 2021-01-13 東京エレクトロン株式会社 基板処理方法及び記憶媒体。
US10685887B2 (en) * 2017-12-04 2020-06-16 Tokyo Electron Limited Method for incorporating multiple channel materials in a complimentary field effective transistor (CFET) device
CN110071040B (zh) * 2018-01-22 2024-04-09 东京毅力科创株式会社 蚀刻方法
WO2019199922A1 (en) * 2018-04-13 2019-10-17 Mattson Technology, Inc. Processing of workpieces with reactive species generated using alkyl halide

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116741630A (zh) * 2023-08-14 2023-09-12 北京北方华创微电子装备有限公司 干法刻蚀方法和半导体工艺设备
CN117038444A (zh) * 2023-08-14 2023-11-10 北京北方华创微电子装备有限公司 干法刻蚀方法和半导体工艺设备
CN116741630B (zh) * 2023-08-14 2023-12-22 北京北方华创微电子装备有限公司 干法刻蚀方法和半导体工艺设备

Also Published As

Publication number Publication date
TW202129027A (zh) 2021-08-01
US20220406572A1 (en) 2022-12-22
WO2021085158A1 (ja) 2021-05-06
JPWO2021085158A1 (zh) 2021-05-06
KR20220070294A (ko) 2022-05-30
JP7257543B2 (ja) 2023-04-13

Similar Documents

Publication Publication Date Title
CN114616650A (zh) 基板处理方法、基板处理装置和纳米线或纳米片的晶体管的制造方法
US7910497B2 (en) Method of forming dielectric layers on a substrate and apparatus therefor
US20230178419A1 (en) Scaled liner layer for isolation structure
TWI450338B (zh) 場效電晶體之閘極介電質的製造方法
US20140302686A1 (en) Apparatus and Method for Conformal Treatment of Dielectric Films Using Inductively Coupled Plasma
WO2011108663A1 (ja) プラズマエッチング方法、半導体デバイスの製造方法、及びプラズマエッチング装置
KR102272823B1 (ko) 에칭 방법 및 에칭 장치
US20050255711A1 (en) Method for forming underlying insulation film
US11384431B2 (en) Substrate processing apparatus
JP2017152531A (ja) 基板処理方法
WO2021187163A1 (ja) 基板処理方法及び基板処理装置
KR102092760B1 (ko) 층간 폴리실리콘 유전체 캡 및 그것을 형성하는 방법
KR102334581B1 (ko) 실리콘 질화막의 성막 방법 및 성막 장치
US11328932B2 (en) Substrate processing method and substrate processing apparatus
JP2022541735A (ja) 誘電体材料を硬化させる方法及び装置
JP7209567B2 (ja) エッチング方法およびエッチング装置
KR100966388B1 (ko) 금속 실리케이트막의 형성 방법 및 기록 매체
JP2013055240A (ja) 半導体装置の製造方法、及び基板処理装置
JP2022094914A (ja) エッチング方法およびエッチング装置
CN114639602A (zh) 蚀刻方法和蚀刻装置

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination