CN114585147A - 印刷电路板和电子组件封装件 - Google Patents

印刷电路板和电子组件封装件 Download PDF

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Publication number
CN114585147A
CN114585147A CN202110618365.0A CN202110618365A CN114585147A CN 114585147 A CN114585147 A CN 114585147A CN 202110618365 A CN202110618365 A CN 202110618365A CN 114585147 A CN114585147 A CN 114585147A
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Prior art keywords
insulating layer
layer
external connection
circuit board
printed circuit
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CN202110618365.0A
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English (en)
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李相旻
曺永一
罗锺锡
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Samsung Electro Mechanics Co Ltd
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Samsung Electro Mechanics Co Ltd
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Publication of CN114585147A publication Critical patent/CN114585147A/zh
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    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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Abstract

本发明提供一种印刷电路板和电子组件封装件，所述印刷电路板包括：第一绝缘层；外连接焊盘，嵌在所述第一绝缘层的第一表面中，并且具有第一外部暴露表面，所述第一外部暴露表面设置在与所述第一绝缘层的所述第一表面的高度基本相同的高度处；第二绝缘层，设置在所述第一绝缘层的第二表面上，并且具有与所述第一绝缘层的所述第二表面接触的第一表面；以及第一布线图案，嵌在所述第二绝缘层中，并且从所述第二绝缘层的所述第一表面暴露，以与所述外连接焊盘的与所述第一外部暴露表面相对的第二外部暴露表面接触。

Description

印刷电路板和电子组件封装件
本申请要求于2020年12月2日在韩国知识产权局提交的第10-2020-0166989号韩国专利申请的优先权的权益，所述韩国专利申请的全部公开内容出于所有目的通过引用被包含于此。
技术领域
本公开涉及一种印刷电路板和电子组件封装件。
背景技术
随着半导体芯片的节点的节距减小，形成在连接到半导体芯片的印刷电路板上的连接焊盘的节距也变得更细小。另外，由于电子产品厚度的限制，应用于小型电子产品(诸如，移动电话等)的印刷电路板通过安装包括单芯片和堆叠芯片的半导体芯片来封装。
嵌入式轨迹基板(ETS)法用作制造印刷电路板的方法以制造具有超细小节距的连接焊盘的薄印刷电路板，并且通过该ETS法制造的印刷电路板已经商业化。
由于通过ETS法制造的印刷电路板的引线键合焊盘和其中嵌入有引线键合焊盘的绝缘层可能不平坦，因此连接到引线键合焊盘的芯片的结合性不优异。
在电子产品的厚度受限的这种情况下，需要提供通过使连接到极细小的芯片节点的引线键合焊盘的节距最小化来增大每单位面积的引线键合焊盘的数量的技术。
发明内容
本公开的一方面在于提供一种印刷电路板，所述印刷电路板包括形成为平坦的外连接焊盘和外连接焊盘嵌在其中的绝缘层。
本公开的一方面在于提供一种印刷电路板，在所述印刷电路板中，仅外连接焊盘形成在没有其他布线图案的单个绝缘层中，并且连接到外连接焊盘的布线图案形成在另一绝缘层中，以在单个绝缘层中形成具有超细小节距的外连接焊盘。
本公开的一方面在于提供一种包括印刷电路板的电子组件封装件，在所述印刷电路板中，外连接焊盘形成在没有其他布线图案的单个绝缘层中并具有超细小节距。
根据本公开的一方面，一种印刷电路板包括：第一绝缘层；外连接焊盘，嵌在所述第一绝缘层的第一表面中，并且具有第一外部暴露表面，所述第一外部暴露表面设置在与所述第一绝缘层的所述第一表面的高度基本相同的高度处；第二绝缘层，设置在所述第一绝缘层的第二表面上，并且具有与所述第一绝缘层的所述第二表面接触的第一表面；以及第一布线图案，嵌在所述第二绝缘层中，并且从所述第二绝缘层的所述第一表面暴露，以与所述外连接焊盘的与所述第一外部暴露表面相对的第二外部暴露表面接触。
此外，根据本公开的另一方面，一种印刷电路板包括：第一绝缘层；第一外连接焊盘和第二外连接焊盘，嵌在所述第一绝缘层中，所述第二外连接焊盘与所述第一外连接焊盘间隔开；以及第二绝缘层，包括连接到所述第一外连接焊盘和所述第二外连接焊盘中的每个的第一布线图案，其中，所述第一外连接焊盘的第一表面和所述第二外连接焊盘的第一表面暴露于所述第一绝缘层的第一表面并与所述第一绝缘层的所述第一表面基本共面，并且所述第一绝缘层和所述第二绝缘层是彼此不同的层。
此外，根据本公开的又一方面，一种电子组件封装件包括：印刷电路板，包括第一绝缘层和第二绝缘层，外连接焊盘嵌在所述第一绝缘层中，所述第一绝缘层具有与所述外连接焊盘的厚度基本相同的厚度，所述第二绝缘层与所述第一绝缘层接触并且包括连接到所述外连接焊盘的第一布线图案；半导体芯片，连接到所述外连接焊盘；以及包封层，包封所述半导体芯片。
附图说明
通过附图以及下面的具体实施方式，本公开的以上和其他方面、特征和优点将被更清楚地理解，在附图中：
图1是示出根据本公开的示例实施例的印刷电路板的截面的示意图；
图2A至图2I是示出制造图1的印刷电路板的方法的截面图；
图3和图4是示出通过组合半导体芯片和根据示例实施例的印刷电路板而形成的电子组件封装件的示意图。
具体实施方式
将参照附图描述本公开的优选示例实施例。
示例实施例可进行各种修改，并且示例实施例被提供以帮助本领域技术人员获得彻底的、全面的理解。因此，为了清楚起见，可夸大附图中的元件的形状和尺寸，并且在附图中由相同附图标记指示的元件指的是相同元件。
在整个说明书中，当诸如层、区域或基板的元件被描述为“在”另一元件“上”、“连接到”另一元件或“结合到”另一元件时，所述元件可直接“在”所述另一元件“上”、直接“连接到”所述另一元件或直接“结合到”所述另一元件，或者可存在介于它们之间的一个或更多个其他元件。相比之下，当元件被描述为“直接在”另一元件“上”、“直接连接到”另一元件或“直接结合到”另一元件时，不存在介于它们之间的其他元件。
尽管可在此使用诸如“第一”和“第二”的术语来描述各种构件、组件、区域、层或部分，但这些构件、组件、区域、层或部分不受这些术语限制。更确切地说，这些术语仅用于将一个构件、组件、区域、层或部分与另一构件、组件、区域、层或部分区分开。因此，在不脱离示例的教导的情况下，在此描述的示例中所称的第一构件、第一组件、第一区域、第一层或第一部分也可被称作第二构件、第二组件、第二区域、第二层或第二部分。
在此使用的术语仅用于描述各种示例，并且不用于限制本公开。在这种情况下，除非另有说明，否则单数表述包括复数表述。
印刷电路板
图1是示出根据本公开的示例实施例的印刷电路板的截面的示意图。
参照图1，印刷电路板1包括第一绝缘层10、外连接焊盘50和55、第二绝缘层20和第一布线图案22。
外连接焊盘50和55嵌在第一绝缘层10中，并且第一绝缘层10与外连接焊盘50和55具有基本相同的厚度。外连接焊盘包括多个外连接焊盘(包括第一外连接焊盘50和第二外连接焊盘55)，并且第一外连接焊盘50与第二外连接焊盘55之间的距离可形成超细小的节距。此外，第一绝缘层10与外连接焊盘50和55具有基本相同的厚度的事实意味着：第一外连接焊盘50的第一表面10a以及第二外连接焊盘55的第一表面10a与第一绝缘层的第一表面10a设置在基本相同的高度并且形成为平坦的，从而具有基本相同的厚度。表述“基本相同”意味着在制造工艺中发生的工艺误差、位置偏移和测量误差允许的范围内是相同的。
外连接焊盘50和55的厚度与第一绝缘层10的厚度基本相同，并且外连接焊盘50和55从第一绝缘层的第一表面10a和第一绝缘层的与第一表面10a相对的第二表面10b暴露。在半导体芯片封装件中，从第一绝缘层10的第一表面10a暴露的外连接焊盘50和55可以是半导体芯片通过其被引线键合到印刷电路板的引线键合焊盘或者半导体芯片通过其被倒装芯片键合到印刷电路板的连接焊盘。厚度基本相同的事实意味着厚度在制造工艺中发生的工艺误差、位置偏移和测量误差允许的范围内是相同的。
第二绝缘层20设置在第一绝缘层10的第二表面10b上，并且第二绝缘层20的第一表面20a与第一绝缘层10的第二表面10b接触。第一绝缘层10和第二绝缘层20是不同的层，并且可彼此区分开。
第二绝缘层20包括嵌在其中的第一布线图案22。第一布线图案22从第二绝缘层20的第一表面20a暴露，以与外连接焊盘50的暴露在外部的表面的相对表面接触。此外，与第一布线图案22间隔开的第二布线图案24嵌在第二绝缘层20中。在此，与第一布线图案22相比，第二布线图案24不直接接触并且不连接到外连接焊盘50和55。第二布线图案24可通过过孔60连接到嵌在第三绝缘层40中的第三布线图案42，第三绝缘层40设置在第二绝缘层20的与第二绝缘层20的第一表面20a相对的第二表面20b上。如图1中所示，第一布线图案22的与第一布线图案22的连接到外连接焊盘的部分相对的表面与第二绝缘层20的第二表面20b间隔开，第二绝缘层20的第二表面20b与第二绝缘层20的第一表面20a相对。
第二绝缘层20和第三绝缘层40被重复地堆积以形成多层电路板，并且第二绝缘层20和第三绝缘层40的层数可根据需要确定。此外，第三绝缘层40的第三布线图案42可以是如本示例实施例中的最外的布线图案(具体地，最下的布线图案)。
外连接焊盘50和55暴露于外部，并且被构造为具有第一金属层52和第二金属层54在第一绝缘层10和第二绝缘层20的厚度方向上从外部朝向内部依次堆叠的结构。
第一金属层52可包括金(Au)层、银(Ag)层和镍(Ni)层中的任意一种。第一金属层52是在形成封装件时电连接到半导体芯片的金属焊盘，并且可以是通过镀覆Au而形成的金属层，以有利于引线键合。
第二金属层54可包括金(Au)层、银(Ag)层和镍(Ni)层中的任意一者。第二金属层54不受具体限制，只要它是可电连接到第二绝缘层20的第一布线图案22的金属层即可，并且第二金属层54可以是通过镀覆Ni形成的金属层。可选地，第二金属层可形成为其中堆叠有Ag层和Ni层的多层结构。
由于第一金属层52形成为具有允许引线键合的深度，因此第二金属层54比第一金属层52厚。
包括第一金属层52和第二金属层54的外连接焊盘50具有与第一绝缘层10的厚度基本相同的厚度，并且第一金属层52的上表面形成为与第一绝缘层的第一表面10a基本共面。由此，可改善引线键合的可靠性。厚度基本相同的事实意味着厚度在制造工艺中发生的工艺误差、位置偏移和测量误差允许的范围内是相同的。
根据本示例实施例的印刷电路板1还可包括位于第一绝缘层10上的阻焊剂层45，以保护外连接焊盘50。阻焊剂层45可通过丝网印刷法使用感光阻焊剂(PSR)油墨来层叠。阻焊剂涂覆的面积和尺寸根据设计的外连接焊盘50的图案形状和尺寸来确定，并且阻焊剂层45包括使外连接焊盘50暴露的开口452。当利用激光形成开口452时，非感光热固性树脂用作阻焊剂层45的材料。
此外，第一绝缘层10可包括热固性绝缘树脂或感光绝缘树脂。第一绝缘层10可包括与阻焊剂层45的材料相同的感光阻焊剂油墨，并且保护嵌在第一绝缘层10中的外连接焊盘50和55。
第二绝缘层20可包括含玻璃的绝缘材料或者不含玻璃的无机绝缘层。
图2A至图2I是示出制造图1的印刷电路板的方法的截面图。
图2A至图2I是示出用于制造根据示例实施例的印刷电路板的方法的实施例的图。除非在上下文中明确地说明了特定的顺序，否则可以以不同的顺序执行各个工艺。
在图2A中，提供在其至少一个表面上堆叠有基础铜层102的绝缘芯100。在本示例实施例中，绝缘芯100可以是在其两侧上堆叠有基础铜层102的载体板。然后，在基础铜层102上堆叠第一绝缘层10。在第一绝缘层10中，根据设计的电路图案形成接触孔15，并且选择性地使基础铜层102暴露。基础铜层102成为用于形成外连接焊盘的镀覆种子层。
第一绝缘层10可包括热固性绝缘树脂或感光绝缘树脂。感光阻焊剂油墨可用作感光绝缘树脂，并且可通过对第一绝缘层10执行光刻而以超细小的节距形成第一绝缘层10的接触孔15。
参照图2B，通过对被精细图案化的接触孔15暴露的基础铜层102进行镀覆而填充接触孔15，来执行形成第一外连接焊盘50的工艺。通过电镀、化学镀覆或溅射来执行镀覆，并且第一外连接焊盘50最终成为诸如引线键合焊盘或倒装芯片连接焊盘的外连接焊盘。
第一外连接焊盘50包括通过对基础铜层102进行首次镀覆而形成的第一金属层52以及在形成第一金属层52之后通过再次镀覆而形成的第二金属层54。虽然附图中未示出，但是可在形成第一外连接焊盘50的工艺中形成第二外连接焊盘。
可通过镀覆金(Au)层、银(Ag)层和镍(Ni)层中的任意一者来形成第一金属层52。第一金属层52是在形成封装件时电连接到半导体芯片的金属焊盘，并且可以是通过镀覆Au形成的金属层，以有利于引线键合。
第二金属层54也可包括金(Au)层、银(Ag)层和镍(Ni)层中的任意一者。第二金属层54可以是通过镀覆镍(Ni)而形成的金属层。可选地，第二金属层可形成为其中堆叠有Ag层和Ni层的多个层。
由于第一金属层52形成为足够薄以允许引线键合，因此第二金属层54比第一金属层52厚。
参照图2C和图2D，执行在第一绝缘层10上堆叠布线图案的工艺。
首先，在图2C中，在第一绝缘层10上堆叠抗蚀剂图案层200，抗蚀剂图案层200包括使第一外连接焊盘50暴露的接触孔25以及将在其中形成布线图案的布线图案孔27。在抗蚀剂图案层200的下表面上形成用于布线图案镀覆的基础铜层(未示出)。可利用基础铜层来镀覆抗蚀剂图案层200的接触孔25和布线图案孔27，以形成布线图案22和24。作为形成接触孔25和布线图案孔27的方法，可执行光刻、激光钻孔等。通过电镀、化学镀覆或溅射来执行用于形成布线图案22和24的镀覆，并且可使用铜(Cu)作为形成布线图案22和24的材料。
通过接触孔25形成第一布线图案22，并且通过布线图案孔27形成与第一布线图案22间隔开的第二布线图案24。
参照图2D，在形成第一布线图案22和第二布线图案24之后，去除抗蚀剂图案层200。还根据预先设计的电路图案通过蚀刻或物理抛光去除基础铜层(未示出)。
参照图2E，开始在第一绝缘层10上形成第二绝缘层20的工艺。第一绝缘层10和第二绝缘层20是不同的层，并且可彼此区分开。
第一布线图案22以及与第一布线图案22间隔开的第二布线图案24嵌在第二绝缘层20中。第二绝缘层20可包括含玻璃的绝缘材料或者不含玻璃的无机绝缘层(该无机绝缘层可包括树脂)。半固化片(PPG)可用作含玻璃的绝缘材料，并且味之素堆积膜(ABF)可用作不含玻璃的无机绝缘树脂。绝缘材料不受具体限制。
参照图2F，在第二绝缘层20中形成过孔60，并且对过孔60进行以下工艺：将通过镀覆形成在第二绝缘层20的另一表面上的第三布线图案42连接到第二布线图案24(内层图案)。
通过堆叠抗蚀剂图案层(图2F中未示出，然而可参照图2C)并且对形成在第二绝缘层20的外表面上的基础铜层300(作为种子层)执行镀覆来形成第三布线图案42。在形成第三布线图案42之后，通过蚀刻等去除抗蚀剂图案层。然后，还根据设计的电路图案去除基础铜层300。
如上，可通过重复堆叠绝缘层、形成过孔以及连接内层图案和外层图案的工艺来堆叠用于印刷电路板的期望数量的层。在本示例实施例中，第三布线图案42是最外层布线图案。
参照图2G和图2H，去除绝缘芯100，以使形成在绝缘芯100的第一表面和第二表面上的单元板结构分离。通过分离单元板结构，使以超细小节距嵌在第一绝缘层10中的第一外连接焊盘50和第二外连接焊盘55暴露于外部。
参照图2I，堆叠使包括第一外连接焊盘50和第二外连接焊盘55的外连接焊盘选择性地暴露的阻焊剂层45。另外，也在第二绝缘层20上堆叠第三绝缘层40，以保护第三布线图案42。
可通过丝网印刷法使用感光阻焊剂(PSR)油墨堆叠第三绝缘层40和阻焊剂层45，以保护外连接焊盘50。根据设计的外连接焊盘50的图案形状和尺寸来确定阻焊剂涂覆的面积和尺寸。阻焊剂层45可具有使第一外连接焊盘50暴露的开口452。当通过激光形成开口452时，使用非感光热固性树脂作为阻焊剂层45的形成材料。
再次参照图1以及图2A至图2I，根据本公开的示例实施例的印刷电路板1包括第一绝缘层10和第二绝缘层20。
彼此间隔开或彼此以超细小节距设置的第一外连接焊盘50和第二外连接焊盘55嵌在第一绝缘层10中。
第二绝缘层20包括连接到第一外连接焊盘50和第二外连接焊盘55中的每个的第一布线图案22。
另外，在本示例实施例的印刷电路板1中，第一外连接焊盘50的第一表面10a和第二外连接焊盘55的第一表面10a暴露于第一绝缘层10的第一表面10a，并且与第一绝缘层10的第一表面10a基本共面。第一绝缘层10和第二绝缘层20形成彼此区别开的不同层。
第一外连接焊盘50的厚度和第二外连接焊盘55的厚度与第一绝缘层10的厚度基本相同，包括金(Au)的第一金属层52和包括镍(Ni)的第二金属层54在第一绝缘层和第二绝缘层堆叠的方向上从外部朝向内部堆叠。第二金属层54比第一金属层52厚。在其他实施例中已经定义了表述“基本相同”的含义，因此将省略重复的描述。
第二绝缘层20包括在同一层上与第一布线图案22间隔开的第二布线图案24，并且第二布线图案24通过过孔60连接到形成在第二绝缘层20上的第三布线图案42，其中，第三布线图案42可以是最外层布线图案。
本示例实施例的印刷电路板1还包括阻焊剂层45，阻焊剂层45设置在第一绝缘层10上并且保护第一外连接焊盘50和第二外连接焊盘55。
此外，阻焊剂层45形成有使第一外连接焊盘50和第二外连接焊盘55暴露的开口452，使得阻焊剂层45位于第一外连接焊盘50与第二外连接焊盘55之间。
此外，第一绝缘层10可包括热固性绝缘树脂或感光绝缘树脂，并且第二绝缘层20可包括含玻璃的绝缘材料或不含玻璃的无机绝缘树脂。
电子组件封装件
图3和图4是示出通过组合半导体芯片和根据示例实施例的印刷电路板而形成的电子组件封装件的示意图。
参照图3和图4，根据本公开的示例实施例的电子组件封装件1000包括上述印刷电路板、半导体芯片1100和包封层1200。
印刷电路板可包括：第一绝缘层10，外连接焊盘50嵌在第一绝缘层10中，并且第一绝缘层10具有与外连接焊盘50的厚度基本相同的厚度；以及第二绝缘层20，与第一绝缘层10接触并且包括连接到外连接焊盘50的第一布线图案22。厚度基本相同的事实意味着厚度在制造工艺中发生的工艺误差、位置偏移和测量误差允许的范围内是相同的。
半导体芯片1100可连接到印刷电路板的外连接焊盘50，以与印刷电路板交换电信号。外连接焊盘50可通过引线键合(诸如使用引线1500)和倒装芯片键合中的至少一种连接到半导体芯片1100。在倒装芯片键合的情况下，半导体芯片1100的连接端子1400经由焊料凸块1420连接到印刷电路板的外连接焊盘50。
图4中示出的包封层1200包封半导体芯片1100，以保护电子组件免受外部环境的影响。另外，诸如焊球的连接结构1600可设置在第三布线图案42(最外的布线图案)上。在示例中，根据本公开的示例实施例的电子组件封装件1000还可包括：第三绝缘层40，设置在第二绝缘层20上，覆盖第三布线图案42，并且具有用于使第三布线图案42的一部分暴露的开口；以及连接结构1600，设置在第三绝缘层40的开口中并且连接到第三布线图案42。
如上所述，根据本公开的印刷电路板，形成超细小的节距并嵌在单个绝缘层中的外连接焊盘可与绝缘层设置在基本相同的高度处并且与绝缘层一起形成为平坦的。
根据本公开的印刷电路板，仅外连接焊盘嵌在没有其他布线图案的单个绝缘层中，使得可实现相邻的外连接焊盘之间的超细小的节距，并且可增加每单位面积的引线键合焊盘的数量。
根据包括本公开的印刷电路板的电子组件封装件，外连接焊盘之间的距离形成超细小的节距，并且外连接焊盘与绝缘层设置在基本相同的高度处并且与绝缘层一起形成为平坦的，从而改善半导体芯片节点的设计自由度和集成度以及确保引线键合的可靠性。
虽然以上已经示出并描述了示例实施例，但对于本领域技术人员而言将显而易见的是，在不脱离由所附权利要求限定的本发明的范围的情况下，可做出修改和变型。

Claims (22)

1.一种印刷电路板，包括：
第一绝缘层；
外连接焊盘，嵌在所述第一绝缘层的第一表面中，并且具有第一外部暴露表面，所述第一外部暴露表面设置在与所述第一绝缘层的所述第一表面的高度基本相同的高度处；
第二绝缘层，设置在所述第一绝缘层的第二表面上，并且具有与所述第一绝缘层的所述第二表面接触的第一表面；以及
第一布线图案，嵌在所述第二绝缘层中，并且从所述第二绝缘层的所述第一表面暴露，以与所述外连接焊盘的与所述第一外部暴露表面相对的第二外部暴露表面接触。
2.根据权利要求1所述的印刷电路板，所述印刷电路板还包括第二布线图案，所述第二布线图案嵌在所述第二绝缘层中并且与所述第一布线图案间隔开，
其中，所述第二布线图案通过过孔连接到设置在所述第二绝缘层上的第三布线图案。
3.根据权利要求2所述的印刷电路板，其中，所述第三布线图案是最外的布线图案。
4.根据权利要求1所述的印刷电路板，其中，所述外连接焊盘暴露在外部，并且包括：
在所述第一绝缘层的厚度方向上堆叠的第一金属层和第二金属层，所述第一金属层包括金层，所述第二金属层包括镍层，并且
其中，所述第二金属层比所述第一金属层厚。
5.根据权利要求1-4中任一项所述的印刷电路板，所述印刷电路板还包括设置在所述第一绝缘层上以保护所述外连接焊盘的阻焊剂层。
6.根据权利要求5所述的印刷电路板，其中，所述阻焊剂层包括使所述外连接焊盘暴露的开口。
7.根据权利要求1-4中任一项所述的印刷电路板，其中，所述第一绝缘层包括热固性绝缘树脂或感光绝缘树脂。
8.根据权利要求1-4中任一项所述的印刷电路板，其中，所述第二绝缘层包括含玻璃的绝缘材料或不含玻璃的无机绝缘层。
9.一种印刷电路板，包括：
第一绝缘层；
第一外连接焊盘和第二外连接焊盘，嵌在所述第一绝缘层中，所述第二外连接焊盘与所述第一外连接焊盘间隔开；以及
第二绝缘层，包括连接到所述第一外连接焊盘和所述第二外连接焊盘中的每个的第一布线图案，
其中，所述第一外连接焊盘的第一表面和所述第二外连接焊盘的第一表面暴露于所述第一绝缘层的第一表面并且与所述第一绝缘层的所述第一表面基本共面，并且
所述第一绝缘层和所述第二绝缘层是彼此不同的层。
10.根据权利要求9所述的印刷电路板，其中，所述第一外连接焊盘和所述第二外连接焊盘的厚度与所述第一绝缘层的厚度基本相同，
所述第一外连接焊盘和所述第二外连接焊盘中的每个包括在所述第一绝缘层的厚度方向上堆叠的第一金属层和第二金属层，所述第一金属层包括金层，所述第二金属层包括镍层，并且
所述第二金属层比所述第一金属层厚。
11.根据权利要求9所述的印刷电路板，其中，所述第二绝缘层包括在同一层中与所述第一布线图案间隔开的第二布线图案，并且
其中，所述第二布线图案通过过孔连接到第三布线图案。
12.根据权利要求11所述的印刷电路板，其中，所述第三布线图案是最外的布线图案。
13.根据权利要求12所述的印刷电路板，所述印刷电路板还包括阻焊剂层，所述阻焊剂层设置在所述第一绝缘层上，以保护所述第一外连接焊盘和所述第二外连接焊盘。
14.根据权利要求13所述的印刷电路板，其中，所述阻焊剂层设置在所述第一绝缘层的位于所述第一外连接焊盘与所述第二外连接焊盘之间的部分上。
15.根据权利要求9-14中任一项所述的印刷电路板，其中，所述第一绝缘层包括热固性绝缘树脂或感光绝缘树脂。
16.根据权利要求9-14中任一项所述的印刷电路板，其中，所述第二绝缘层包括含玻璃的绝缘材料或不含玻璃的无机绝缘层。
17.一种电子组件封装件，包括：
印刷电路板，包括第一绝缘层和第二绝缘层，外连接焊盘嵌在所述第一绝缘层中，所述第一绝缘层具有与所述外连接焊盘的厚度基本相同的厚度，所述第二绝缘层具有与所述第一绝缘层接触的第一表面并且包括连接到所述外连接焊盘的第一布线图案；以及
半导体芯片，连接到所述外连接焊盘。
18.根据权利要求17所述的电子组件封装件，其中，所述外连接焊盘通过引线与连接端子和焊料凸块的组合中的至少一种连接到所述半导体芯片。
19.根据权利要求17所述的电子组件封装件，所述电子组件封装件还包括嵌在所述第二绝缘层中并且与所述第一布线图案间隔开的第二布线图案，
其中，所述第二布线图案通过过孔连接到设置在所述第二绝缘层上的第三布线图案。
20.根据权利要求19所述的电子组件封装件，所述电子组件封装件还包括：
第三绝缘层，设置在所述第二绝缘层上，覆盖所述第三布线图案，并且具有用于使所述第三布线图案的一部分暴露的开口；以及
连接结构，设置在所述第三绝缘层的所述开口中并且连接到所述第三布线图案。
21.根据权利要求17所述的电子组件封装件，其中，所述第一布线图案的与所述第一布线图案的连接到所述外连接焊盘的部分相对的表面与所述第二绝缘层的第二表面间隔开，所述第二绝缘层的所述第二表面与所述第二绝缘层的所述第一表面相对。
22.根据权利要求17-21中任一项所述的电子组件封装件，所述电子组件封装件还包括包封所述半导体芯片的包封层。
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